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FEB_1202 04.07.24 07:43:18
Info
07:43:18:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:43:18:ST3_Shared:INFO: FEB-Microcable
07:43:18:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:43:18:febtest:INFO: Testing FEB with SN 1202
07:43:19:smx_tester:INFO: Scanning setup
07:43:19:elinks:INFO: Disabling clock on downlink 0
07:43:19:elinks:INFO: Disabling clock on downlink 1
07:43:19:elinks:INFO: Disabling clock on downlink 2
07:43:19:elinks:INFO: Disabling clock on downlink 3
07:43:19:elinks:INFO: Disabling clock on downlink 4
07:43:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:43:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:43:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:43:19:elinks:INFO: Disabling clock on downlink 0
07:43:19:elinks:INFO: Disabling clock on downlink 1
07:43:19:elinks:INFO: Disabling clock on downlink 2
07:43:19:elinks:INFO: Disabling clock on downlink 3
07:43:19:elinks:INFO: Disabling clock on downlink 4
07:43:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:43:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:43:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
07:43:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
07:43:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
07:43:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
07:43:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
07:43:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
07:43:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
07:43:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
07:43:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
07:43:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
07:43:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
07:43:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
07:43:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
07:43:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
07:43:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
07:43:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
07:43:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:43:20:elinks:INFO: Disabling clock on downlink 0
07:43:20:elinks:INFO: Disabling clock on downlink 1
07:43:20:elinks:INFO: Disabling clock on downlink 2
07:43:20:elinks:INFO: Disabling clock on downlink 3
07:43:20:elinks:INFO: Disabling clock on downlink 4
07:43:20:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:43:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:43:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:43:20:elinks:INFO: Disabling clock on downlink 0
07:43:20:elinks:INFO: Disabling clock on downlink 1
07:43:20:elinks:INFO: Disabling clock on downlink 2
07:43:20:elinks:INFO: Disabling clock on downlink 3
07:43:20:elinks:INFO: Disabling clock on downlink 4
07:43:20:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:43:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
07:43:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:43:20:elinks:INFO: Disabling clock on downlink 0
07:43:20:elinks:INFO: Disabling clock on downlink 1
07:43:20:elinks:INFO: Disabling clock on downlink 2
07:43:20:elinks:INFO: Disabling clock on downlink 3
07:43:20:elinks:INFO: Disabling clock on downlink 4
07:43:20:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:43:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
07:43:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:43:20:setup_element:INFO: Scanning clock phase
07:43:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:43:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:43:20:setup_element:INFO: Clock phase scan results for group 0, downlink 1
07:43:20:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
07:43:20:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
07:43:20:setup_element:INFO: Eye window for uplink 2 : ______________________________________________________________________XXXXX_____
Clock Delay: 32
07:43:20:setup_element:INFO: Eye window for uplink 3 : ______________________________________________________________________XXXXX_____
Clock Delay: 32
07:43:20:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXX_____
Clock Delay: 32
07:43:20:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXX_____
Clock Delay: 32
07:43:20:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXX____
Clock Delay: 33
07:43:20:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXX____
Clock Delay: 33
07:43:20:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
07:43:20:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
07:43:20:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
07:43:20:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
07:43:20:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXX_____
Clock Delay: 32
07:43:20:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXX_____
Clock Delay: 32
07:43:20:setup_element:INFO: Eye window for uplink 14: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
07:43:20:setup_element:INFO: Eye window for uplink 15: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
07:43:20:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1
07:43:20:setup_element:INFO: Scanning data phases
07:43:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:43:21:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:43:26:setup_element:INFO: Data phase scan results for group 0, downlink 1
07:43:26:setup_element:INFO: Eye window for uplink 0 : _______XXXXXXX__________________________
Data delay found: 30
07:43:26:setup_element:INFO: Eye window for uplink 1 : ___XXXXXXX______________________________
Data delay found: 26
07:43:26:setup_element:INFO: Eye window for uplink 2 : _XXXXXXX________________________________
Data delay found: 24
07:43:26:setup_element:INFO: Eye window for uplink 3 : XXXX________________________________XXXX
Data delay found: 19
07:43:26:setup_element:INFO: Eye window for uplink 4 : XXXX_________________________________XXX
Data delay found: 20
07:43:26:setup_element:INFO: Eye window for uplink 5 : X_________________________________XXXXX_
Data delay found: 17
07:43:26:setup_element:INFO: Eye window for uplink 6 : X_______________________________XXXXXXXX
Data delay found: 16
07:43:26:setup_element:INFO: Eye window for uplink 7 : _____________________________XXXXXXX____
Data delay found: 12
07:43:26:setup_element:INFO: Eye window for uplink 8 : _________________XXXXXXXXX______________
Data delay found: 1
07:43:26:setup_element:INFO: Eye window for uplink 9 : ________________________XXXXXXX_________
Data delay found: 7
07:43:26:setup_element:INFO: Eye window for uplink 10: ___________________XXXXXXXX_____________
Data delay found: 2
07:43:26:setup_element:INFO: Eye window for uplink 11: ________________________XXXXXX__________
Data delay found: 6
07:43:26:setup_element:INFO: Eye window for uplink 12: ______________________XXXXXX____________
Data delay found: 4
07:43:26:setup_element:INFO: Eye window for uplink 13: _________________________XXXXXXX________
Data delay found: 8
07:43:26:setup_element:INFO: Eye window for uplink 14: ______________________XXXXXXX___________
Data delay found: 5
07:43:26:setup_element:INFO: Eye window for uplink 15: _________________________XXXXXXX________
Data delay found: 8
07:43:26:setup_element:INFO: Setting the data phase to 30 for uplink 0
07:43:26:setup_element:INFO: Setting the data phase to 26 for uplink 1
07:43:26:setup_element:INFO: Setting the data phase to 24 for uplink 2
07:43:26:setup_element:INFO: Setting the data phase to 19 for uplink 3
07:43:26:setup_element:INFO: Setting the data phase to 20 for uplink 4
07:43:26:setup_element:INFO: Setting the data phase to 17 for uplink 5
07:43:26:setup_element:INFO: Setting the data phase to 16 for uplink 6
07:43:26:setup_element:INFO: Setting the data phase to 12 for uplink 7
07:43:26:setup_element:INFO: Setting the data phase to 1 for uplink 8
07:43:26:setup_element:INFO: Setting the data phase to 7 for uplink 9
07:43:26:setup_element:INFO: Setting the data phase to 2 for uplink 10
07:43:26:setup_element:INFO: Setting the data phase to 6 for uplink 11
07:43:26:setup_element:INFO: Setting the data phase to 4 for uplink 12
07:43:26:setup_element:INFO: Setting the data phase to 8 for uplink 13
07:43:26:setup_element:INFO: Setting the data phase to 5 for uplink 14
07:43:26:setup_element:INFO: Setting the data phase to 8 for uplink 15
07:43:26:setup_element:INFO: Beginning SMX ASICs map scan
07:43:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:43:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:43:26:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
07:43:26:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
07:43:26:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
07:43:26:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
07:43:26:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
07:43:26:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
07:43:26:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
07:43:26:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
07:43:26:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
07:43:26:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
07:43:26:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
07:43:27:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
07:43:27:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
07:43:27:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
07:43:27:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
07:43:27:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
07:43:27:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
07:43:27:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
07:43:27:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
07:43:28:setup_element:INFO: Performing Elink synchronization
07:43:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:43:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:43:28:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
07:43:28:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
07:43:29:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
07:43:29:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
07:43:29:febtest:INFO: Init all SMX (CSA): 30
07:43:46:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:43:46:febtest:INFO: 01-00 | XA-000-08-003-000-003-241-12 | 28.2 | 1195.1
07:43:47:febtest:INFO: 08-01 | XA-000-08-003-000-003-048-03 | 47.3 | 1135.9
07:43:47:febtest:INFO: 03-02 | XA-000-08-003-000-003-050-03 | 34.6 | 1171.5
07:43:47:febtest:INFO: 10-03 | XA-000-08-003-000-003-044-04 | 47.3 | 1135.9
07:43:47:febtest:INFO: 05-04 | XA-000-08-003-000-003-045-04 | 37.7 | 1153.7
07:43:48:febtest:INFO: 12-05 | XA-000-08-003-000-003-040-04 | 34.6 | 1171.5
07:43:48:febtest:INFO: 07-06 | XA-000-08-003-000-003-041-04 | 34.6 | 1159.7
07:43:48:febtest:INFO: 14-07 | XA-000-08-003-000-005-150-02 | 28.2 | 1183.3
07:43:49:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
07:43:51:ST3_smx:INFO: chip: 1-0 28.225000 C 1206.851500 mV
07:43:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:43:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:43:51:ST3_smx:INFO: Electrons
07:43:51:ST3_smx:INFO: # loops 0
07:43:53:ST3_smx:INFO: # loops 1
07:43:55:ST3_smx:INFO: # loops 2
07:43:57:ST3_smx:INFO: Total # of broken channels: 0
07:43:57:ST3_smx:INFO: List of broken channels: []
07:43:57:ST3_smx:INFO: Total # of broken channels: 0
07:43:57:ST3_smx:INFO: List of broken channels: []
07:43:59:ST3_smx:INFO: chip: 8-1 47.250730 C 1147.806000 mV
07:43:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:43:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:43:59:ST3_smx:INFO: Electrons
07:43:59:ST3_smx:INFO: # loops 0
07:44:01:ST3_smx:INFO: # loops 1
07:44:04:ST3_smx:INFO: # loops 2
07:44:06:ST3_smx:INFO: Total # of broken channels: 0
07:44:06:ST3_smx:INFO: List of broken channels: []
07:44:06:ST3_smx:INFO: Total # of broken channels: 0
07:44:06:ST3_smx:INFO: List of broken channels: []
07:44:08:ST3_smx:INFO: chip: 3-2 34.556970 C 1183.292940 mV
07:44:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:44:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:44:08:ST3_smx:INFO: Electrons
07:44:08:ST3_smx:INFO: # loops 0
07:44:10:ST3_smx:INFO: # loops 1
07:44:12:ST3_smx:INFO: # loops 2
07:44:14:ST3_smx:INFO: Total # of broken channels: 0
07:44:14:ST3_smx:INFO: List of broken channels: []
07:44:14:ST3_smx:INFO: Total # of broken channels: 0
07:44:14:ST3_smx:INFO: List of broken channels: []
07:44:15:ST3_smx:INFO: chip: 10-3 50.430383 C 1147.806000 mV
07:44:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:44:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:44:15:ST3_smx:INFO: Electrons
07:44:15:ST3_smx:INFO: # loops 0
07:44:17:ST3_smx:INFO: # loops 1
07:44:19:ST3_smx:INFO: # loops 2
07:44:21:ST3_smx:INFO: Total # of broken channels: 0
07:44:21:ST3_smx:INFO: List of broken channels: []
07:44:21:ST3_smx:INFO: Total # of broken channels: 0
07:44:21:ST3_smx:INFO: List of broken channels: []
07:44:23:ST3_smx:INFO: chip: 5-4 40.898880 C 1165.571835 mV
07:44:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:44:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:44:23:ST3_smx:INFO: Electrons
07:44:23:ST3_smx:INFO: # loops 0
07:44:25:ST3_smx:INFO: # loops 1
07:44:27:ST3_smx:INFO: # loops 2
07:44:29:ST3_smx:INFO: Total # of broken channels: 0
07:44:29:ST3_smx:INFO: List of broken channels: []
07:44:29:ST3_smx:INFO: Total # of broken channels: 0
07:44:29:ST3_smx:INFO: List of broken channels: []
07:44:30:ST3_smx:INFO: chip: 12-5 37.726682 C 1183.292940 mV
07:44:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:44:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:44:30:ST3_smx:INFO: Electrons
07:44:30:ST3_smx:INFO: # loops 0
07:44:32:ST3_smx:INFO: # loops 1
07:44:34:ST3_smx:INFO: # loops 2
07:44:36:ST3_smx:INFO: Total # of broken channels: 0
07:44:36:ST3_smx:INFO: List of broken channels: []
07:44:36:ST3_smx:INFO: Total # of broken channels: 0
07:44:36:ST3_smx:INFO: List of broken channels: []
07:44:38:ST3_smx:INFO: chip: 7-6 37.726682 C 1171.483840 mV
07:44:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:44:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:44:38:ST3_smx:INFO: Electrons
07:44:38:ST3_smx:INFO: # loops 0
07:44:40:ST3_smx:INFO: # loops 1
07:44:41:ST3_smx:INFO: # loops 2
07:44:43:ST3_smx:INFO: Total # of broken channels: 0
07:44:43:ST3_smx:INFO: List of broken channels: []
07:44:43:ST3_smx:INFO: Total # of broken channels: 0
07:44:43:ST3_smx:INFO: List of broken channels: []
07:44:45:ST3_smx:INFO: chip: 14-7 31.389742 C 1195.082160 mV
07:44:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:44:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:44:45:ST3_smx:INFO: Electrons
07:44:45:ST3_smx:INFO: # loops 0
07:44:47:ST3_smx:INFO: # loops 1
07:44:49:ST3_smx:INFO: # loops 2
07:44:51:ST3_smx:INFO: Total # of broken channels: 0
07:44:51:ST3_smx:INFO: List of broken channels: []
07:44:51:ST3_smx:INFO: Total # of broken channels: 0
07:44:51:ST3_smx:INFO: List of broken channels: []
07:44:51:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:44:51:febtest:INFO: 01-00 | XA-000-08-003-000-003-241-12 | 31.4 | 1224.5
07:44:51:febtest:INFO: 08-01 | XA-000-08-003-000-003-048-03 | 50.4 | 1171.5
07:44:52:febtest:INFO: 03-02 | XA-000-08-003-000-003-050-03 | 37.7 | 1206.9
07:44:52:febtest:INFO: 10-03 | XA-000-08-003-000-003-044-04 | 50.4 | 1165.6
07:44:52:febtest:INFO: 05-04 | XA-000-08-003-000-003-045-04 | 44.1 | 1189.2
07:44:52:febtest:INFO: 12-05 | XA-000-08-003-000-003-040-04 | 37.7 | 1206.9
07:44:52:febtest:INFO: 07-06 | XA-000-08-003-000-003-041-04 | 37.7 | 1189.2
07:44:53:febtest:INFO: 14-07 | XA-000-08-003-000-005-150-02 | 34.6 | 1218.6
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_07_04-07_43_18
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1202| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.6470', '1.854', '2.0690', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9900', '1.849', '2.4940', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9600', '1.850', '0.5238', '0.000', '0.0000', '0.000', '0.0000']