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FEB_1203 04.07.24 15:51:47
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15:51:47:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:51:47:ST3_Shared:INFO: FEB-Microcable
15:51:47:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:51:47:febtest:INFO: Testing FEB with SN 1203
15:51:49:smx_tester:INFO: Scanning setup
15:51:49:elinks:INFO: Disabling clock on downlink 0
15:51:49:elinks:INFO: Disabling clock on downlink 1
15:51:49:elinks:INFO: Disabling clock on downlink 2
15:51:49:elinks:INFO: Disabling clock on downlink 3
15:51:49:elinks:INFO: Disabling clock on downlink 4
15:51:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:51:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
15:51:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:51:49:elinks:INFO: Disabling clock on downlink 0
15:51:49:elinks:INFO: Disabling clock on downlink 1
15:51:49:elinks:INFO: Disabling clock on downlink 2
15:51:49:elinks:INFO: Disabling clock on downlink 3
15:51:49:elinks:INFO: Disabling clock on downlink 4
15:51:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:51:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:51:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
15:51:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
15:51:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
15:51:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
15:51:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
15:51:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
15:51:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
15:51:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
15:51:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
15:51:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
15:51:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
15:51:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
15:51:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
15:51:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
15:51:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
15:51:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
15:51:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:51:49:elinks:INFO: Disabling clock on downlink 0
15:51:49:elinks:INFO: Disabling clock on downlink 1
15:51:49:elinks:INFO: Disabling clock on downlink 2
15:51:49:elinks:INFO: Disabling clock on downlink 3
15:51:49:elinks:INFO: Disabling clock on downlink 4
15:51:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:51:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:51:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:51:49:elinks:INFO: Disabling clock on downlink 0
15:51:49:elinks:INFO: Disabling clock on downlink 1
15:51:49:elinks:INFO: Disabling clock on downlink 2
15:51:49:elinks:INFO: Disabling clock on downlink 3
15:51:49:elinks:INFO: Disabling clock on downlink 4
15:51:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:51:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
15:51:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:51:49:elinks:INFO: Disabling clock on downlink 0
15:51:49:elinks:INFO: Disabling clock on downlink 1
15:51:49:elinks:INFO: Disabling clock on downlink 2
15:51:49:elinks:INFO: Disabling clock on downlink 3
15:51:49:elinks:INFO: Disabling clock on downlink 4
15:51:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:51:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
15:51:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:51:49:setup_element:INFO: Scanning clock phase
15:51:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:51:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:51:50:setup_element:INFO: Clock phase scan results for group 0, downlink 1
15:51:50:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
15:51:50:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
15:51:50:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXX____
Clock Delay: 33
15:51:50:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXX____
Clock Delay: 33
15:51:50:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXX____
Clock Delay: 33
15:51:50:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXX____
Clock Delay: 33
15:51:50:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________XXXXX___
Clock Delay: 34
15:51:50:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________XXXXX___
Clock Delay: 34
15:51:50:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
15:51:50:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
15:51:50:setup_element:INFO: Eye window for uplink 10: ____________________________________________________________________XXXXXX______
Clock Delay: 30
15:51:50:setup_element:INFO: Eye window for uplink 11: ____________________________________________________________________XXXXXX______
Clock Delay: 30
15:51:50:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
15:51:50:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
15:51:50:setup_element:INFO: Eye window for uplink 14: ____________________________________________________________________XXXXXX______
Clock Delay: 30
15:51:50:setup_element:INFO: Eye window for uplink 15: ____________________________________________________________________XXXXXX______
Clock Delay: 30
15:51:50:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1
15:51:50:setup_element:INFO: Scanning data phases
15:51:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:51:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:51:55:setup_element:INFO: Data phase scan results for group 0, downlink 1
15:51:55:setup_element:INFO: Eye window for uplink 0 : ________XXXXXX__________________________
Data delay found: 30
15:51:55:setup_element:INFO: Eye window for uplink 1 : ___XXXXXXXX_____________________________
Data delay found: 26
15:51:55:setup_element:INFO: Eye window for uplink 2 : _XXXXXXX________________________________
Data delay found: 24
15:51:55:setup_element:INFO: Eye window for uplink 3 : XXXX_________________________________XXX
Data delay found: 20
15:51:55:setup_element:INFO: Eye window for uplink 4 : XXXX________________________________XXXX
Data delay found: 19
15:51:55:setup_element:INFO: Eye window for uplink 5 : _________________________________XXXXXXX
Data delay found: 16
15:51:55:setup_element:INFO: Eye window for uplink 6 : XXX_____________________________XXXXXXXX
Data delay found: 17
15:51:55:setup_element:INFO: Eye window for uplink 7 : ____________________________XXXXXXXX____
Data delay found: 11
15:51:55:setup_element:INFO: Eye window for uplink 8 : __________________XXXXXXXX______________
Data delay found: 1
15:51:55:setup_element:INFO: Eye window for uplink 9 : ________________________XXXXXXX_________
Data delay found: 7
15:51:55:setup_element:INFO: Eye window for uplink 10: _________________XXXXXXX________________
Data delay found: 0
15:51:55:setup_element:INFO: Eye window for uplink 11: ______________________XXXXXX____________
Data delay found: 4
15:51:55:setup_element:INFO: Eye window for uplink 12: _____________________XXXXXX_____________
Data delay found: 3
15:51:55:setup_element:INFO: Eye window for uplink 13: _________________________XXXXX__________
Data delay found: 7
15:51:55:setup_element:INFO: Eye window for uplink 14: ____________________XXXXXX______________
Data delay found: 2
15:51:55:setup_element:INFO: Eye window for uplink 15: _______________________XXXXXX___________
Data delay found: 5
15:51:55:setup_element:INFO: Setting the data phase to 30 for uplink 0
15:51:55:setup_element:INFO: Setting the data phase to 26 for uplink 1
15:51:55:setup_element:INFO: Setting the data phase to 24 for uplink 2
15:51:55:setup_element:INFO: Setting the data phase to 20 for uplink 3
15:51:55:setup_element:INFO: Setting the data phase to 19 for uplink 4
15:51:55:setup_element:INFO: Setting the data phase to 16 for uplink 5
15:51:55:setup_element:INFO: Setting the data phase to 17 for uplink 6
15:51:55:setup_element:INFO: Setting the data phase to 11 for uplink 7
15:51:55:setup_element:INFO: Setting the data phase to 1 for uplink 8
15:51:55:setup_element:INFO: Setting the data phase to 7 for uplink 9
15:51:55:setup_element:INFO: Setting the data phase to 0 for uplink 10
15:51:55:setup_element:INFO: Setting the data phase to 4 for uplink 11
15:51:55:setup_element:INFO: Setting the data phase to 3 for uplink 12
15:51:55:setup_element:INFO: Setting the data phase to 7 for uplink 13
15:51:55:setup_element:INFO: Setting the data phase to 2 for uplink 14
15:51:55:setup_element:INFO: Setting the data phase to 5 for uplink 15
15:51:55:setup_element:INFO: Beginning SMX ASICs map scan
15:51:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:51:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:51:55:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
15:51:55:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
15:51:55:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
15:51:55:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
15:51:55:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
15:51:55:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
15:51:55:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
15:51:55:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
15:51:55:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
15:51:55:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
15:51:55:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
15:51:55:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
15:51:56:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
15:51:56:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
15:51:56:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
15:51:56:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
15:51:56:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
15:51:56:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
15:51:56:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
15:51:57:setup_element:INFO: Performing Elink synchronization
15:51:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:51:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:51:57:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
15:51:57:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
15:51:57:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
15:51:57:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
15:51:58:febtest:INFO: Init all SMX (CSA): 30
15:52:14:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:52:14:febtest:INFO: 01-00 | XA-000-08-003-000-003-220-02 | 40.9 | 1159.7
15:52:14:febtest:INFO: 08-01 | XA-000-08-003-000-003-226-11 | 44.1 | 1153.7
15:52:14:febtest:INFO: 03-02 | XA-000-08-003-000-003-232-11 | 50.4 | 1135.9
15:52:14:febtest:INFO: 10-03 | XA-000-08-003-000-003-233-11 | 53.6 | 1141.9
15:52:15:febtest:INFO: 05-04 | XA-000-08-003-000-003-234-11 | 47.3 | 1141.9
15:52:15:febtest:INFO: 12-05 | XA-000-08-003-000-003-235-11 | 50.4 | 1141.9
15:52:15:febtest:INFO: 07-06 | XA-000-08-003-000-005-151-02 | 37.7 | 1165.6
15:52:15:febtest:INFO: 14-07 | XA-000-08-003-000-003-243-12 | 37.7 | 1165.6
15:52:16:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
15:52:18:ST3_smx:INFO: chip: 1-0 44.073563 C 1171.483840 mV
15:52:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:52:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:52:18:ST3_smx:INFO: Electrons
15:52:18:ST3_smx:INFO: # loops 0
15:52:20:ST3_smx:INFO: # loops 1
15:52:22:ST3_smx:INFO: # loops 2
15:52:24:ST3_smx:INFO: Total # of broken channels: 0
15:52:24:ST3_smx:INFO: List of broken channels: []
15:52:24:ST3_smx:INFO: Total # of broken channels: 0
15:52:24:ST3_smx:INFO: List of broken channels: []
15:52:25:ST3_smx:INFO: chip: 8-1 47.250730 C 1171.483840 mV
15:52:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:52:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:52:25:ST3_smx:INFO: Electrons
15:52:25:ST3_smx:INFO: # loops 0
15:52:27:ST3_smx:INFO: # loops 1
15:52:28:ST3_smx:INFO: # loops 2
15:52:30:ST3_smx:INFO: Total # of broken channels: 0
15:52:30:ST3_smx:INFO: List of broken channels: []
15:52:30:ST3_smx:INFO: Total # of broken channels: 0
15:52:30:ST3_smx:INFO: List of broken channels: []
15:52:31:ST3_smx:INFO: chip: 3-2 53.612520 C 1147.806000 mV
15:52:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:52:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:52:31:ST3_smx:INFO: Electrons
15:52:31:ST3_smx:INFO: # loops 0
15:52:33:ST3_smx:INFO: # loops 1
15:52:35:ST3_smx:INFO: # loops 2
15:52:36:ST3_smx:INFO: Total # of broken channels: 0
15:52:36:ST3_smx:INFO: List of broken channels: []
15:52:36:ST3_smx:INFO: Total # of broken channels: 0
15:52:36:ST3_smx:INFO: List of broken channels: []
15:52:38:ST3_smx:INFO: chip: 10-3 56.797143 C 1153.732915 mV
15:52:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:52:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:52:38:ST3_smx:INFO: Electrons
15:52:38:ST3_smx:INFO: # loops 0
15:52:39:ST3_smx:INFO: # loops 1
15:52:41:ST3_smx:INFO: # loops 2
15:52:43:ST3_smx:INFO: Total # of broken channels: 0
15:52:43:ST3_smx:INFO: List of broken channels: []
15:52:43:ST3_smx:INFO: Total # of broken channels: 0
15:52:43:ST3_smx:INFO: List of broken channels: []
15:52:45:ST3_smx:INFO: chip: 5-4 50.430383 C 1153.732915 mV
15:52:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:52:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:52:45:ST3_smx:INFO: Electrons
15:52:45:ST3_smx:INFO: # loops 0
15:52:46:ST3_smx:INFO: # loops 1
15:52:48:ST3_smx:INFO: # loops 2
15:52:49:ST3_smx:INFO: Total # of broken channels: 0
15:52:49:ST3_smx:INFO: List of broken channels: []
15:52:49:ST3_smx:INFO: Total # of broken channels: 0
15:52:49:ST3_smx:INFO: List of broken channels: []
15:52:51:ST3_smx:INFO: chip: 12-5 53.612520 C 1153.732915 mV
15:52:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:52:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:52:51:ST3_smx:INFO: Electrons
15:52:51:ST3_smx:INFO: # loops 0
15:52:52:ST3_smx:INFO: # loops 1
15:52:54:ST3_smx:INFO: # loops 2
15:52:56:ST3_smx:INFO: Total # of broken channels: 0
15:52:56:ST3_smx:INFO: List of broken channels: []
15:52:56:ST3_smx:INFO: Total # of broken channels: 0
15:52:56:ST3_smx:INFO: List of broken channels: []
15:52:57:ST3_smx:INFO: chip: 7-6 40.898880 C 1177.390875 mV
15:52:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:52:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:52:57:ST3_smx:INFO: Electrons
15:52:57:ST3_smx:INFO: # loops 0
15:52:59:ST3_smx:INFO: # loops 1
15:53:01:ST3_smx:INFO: # loops 2
15:53:03:ST3_smx:INFO: Total # of broken channels: 0
15:53:03:ST3_smx:INFO: List of broken channels: []
15:53:03:ST3_smx:INFO: Total # of broken channels: 0
15:53:03:ST3_smx:INFO: List of broken channels: []
15:53:04:ST3_smx:INFO: chip: 14-7 44.073563 C 1183.292940 mV
15:53:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:53:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:53:04:ST3_smx:INFO: Electrons
15:53:04:ST3_smx:INFO: # loops 0
15:53:06:ST3_smx:INFO: # loops 1
15:53:08:ST3_smx:INFO: # loops 2
15:53:09:ST3_smx:INFO: Total # of broken channels: 0
15:53:09:ST3_smx:INFO: List of broken channels: []
15:53:09:ST3_smx:INFO: Total # of broken channels: 0
15:53:09:ST3_smx:INFO: List of broken channels: []
15:53:10:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:53:10:febtest:INFO: 01-00 | XA-000-08-003-000-003-220-02 | 50.4 | 1195.1
15:53:10:febtest:INFO: 08-01 | XA-000-08-003-000-003-226-11 | 53.6 | 1189.2
15:53:10:febtest:INFO: 03-02 | XA-000-08-003-000-003-232-11 | 56.8 | 1165.6
15:53:11:febtest:INFO: 10-03 | XA-000-08-003-000-003-233-11 | 56.8 | 1189.2
15:53:11:febtest:INFO: 05-04 | XA-000-08-003-000-003-234-11 | 53.6 | 1177.4
15:53:11:febtest:INFO: 12-05 | XA-000-08-003-000-003-235-11 | 56.8 | 1171.5
15:53:11:febtest:INFO: 07-06 | XA-000-08-003-000-005-151-02 | 44.1 | 1201.0
15:53:11:febtest:INFO: 14-07 | XA-000-08-003-000-003-243-12 | 44.1 | 1201.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_07_04-15_51_47
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1203| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.9780', '1.849', '2.7620', '2.450', '0.0000', '1.850', '0.0002']
VI_after__Init : ['2.450', '2.4640', '1.850', '2.4480', '2.450', '0.0000', '1.850', '0.0002']
VI_at__the_End : ['2.450', '2.3960', '1.850', '0.5325', '2.450', '0.0000', '1.850', '0.0002']