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FEB_1205 10.07.24 08:22:41
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08:22:41:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:22:41:ST3_Shared:INFO: FEB-Microcable
08:22:41:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:22:41:febtest:INFO: Testing FEB with SN 1205
08:22:43:smx_tester:INFO: Scanning setup
08:22:43:elinks:INFO: Disabling clock on downlink 0
08:22:43:elinks:INFO: Disabling clock on downlink 1
08:22:43:elinks:INFO: Disabling clock on downlink 2
08:22:43:elinks:INFO: Disabling clock on downlink 3
08:22:43:elinks:INFO: Disabling clock on downlink 4
08:22:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:22:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:22:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:22:43:elinks:INFO: Disabling clock on downlink 0
08:22:43:elinks:INFO: Disabling clock on downlink 1
08:22:43:elinks:INFO: Disabling clock on downlink 2
08:22:43:elinks:INFO: Disabling clock on downlink 3
08:22:43:elinks:INFO: Disabling clock on downlink 4
08:22:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:22:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:22:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
08:22:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
08:22:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
08:22:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
08:22:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
08:22:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
08:22:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
08:22:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
08:22:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
08:22:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
08:22:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
08:22:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
08:22:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
08:22:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
08:22:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
08:22:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
08:22:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:22:43:elinks:INFO: Disabling clock on downlink 0
08:22:43:elinks:INFO: Disabling clock on downlink 1
08:22:43:elinks:INFO: Disabling clock on downlink 2
08:22:43:elinks:INFO: Disabling clock on downlink 3
08:22:43:elinks:INFO: Disabling clock on downlink 4
08:22:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:22:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:22:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:22:43:elinks:INFO: Disabling clock on downlink 0
08:22:43:elinks:INFO: Disabling clock on downlink 1
08:22:43:elinks:INFO: Disabling clock on downlink 2
08:22:43:elinks:INFO: Disabling clock on downlink 3
08:22:43:elinks:INFO: Disabling clock on downlink 4
08:22:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:22:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:22:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:22:43:elinks:INFO: Disabling clock on downlink 0
08:22:43:elinks:INFO: Disabling clock on downlink 1
08:22:43:elinks:INFO: Disabling clock on downlink 2
08:22:43:elinks:INFO: Disabling clock on downlink 3
08:22:43:elinks:INFO: Disabling clock on downlink 4
08:22:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:22:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:22:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:22:43:setup_element:INFO: Scanning clock phase
08:22:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:22:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:22:44:setup_element:INFO: Clock phase scan results for group 0, downlink 1
08:22:44:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
08:22:44:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
08:22:44:setup_element:INFO: Eye window for uplink 2 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
08:22:44:setup_element:INFO: Eye window for uplink 3 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
08:22:44:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________________
Clock Delay: 40
08:22:44:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________________
Clock Delay: 40
08:22:44:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
08:22:44:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
08:22:44:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
08:22:44:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
08:22:44:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________XXXXXX__
Clock Delay: 34
08:22:44:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________XXXXXX__
Clock Delay: 34
08:22:44:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXX_____
Clock Delay: 32
08:22:44:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXX_____
Clock Delay: 32
08:22:44:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXX____
Clock Delay: 32
08:22:44:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXX____
Clock Delay: 32
08:22:44:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
08:22:44:setup_element:INFO: Scanning data phases
08:22:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:22:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:22:49:setup_element:INFO: Data phase scan results for group 0, downlink 1
08:22:49:setup_element:INFO: Eye window for uplink 0 : _____XXXXXXXX___________________________
Data delay found: 28
08:22:49:setup_element:INFO: Eye window for uplink 1 : XXXXXXXX________________________________
Data delay found: 23
08:22:49:setup_element:INFO: Eye window for uplink 2 : __XXXXXX________________________________
Data delay found: 24
08:22:49:setup_element:INFO: Eye window for uplink 3 : XXX_________________________________XXXX
Data delay found: 19
08:22:49:setup_element:INFO: Eye window for uplink 4 : XXX_____________________________XXXXXXXX
Data delay found: 17
08:22:49:setup_element:INFO: Eye window for uplink 5 : ________________________________XXXXXXXX
Data delay found: 15
08:22:49:setup_element:INFO: Eye window for uplink 6 : ____________________________XXXXXXXXX___
Data delay found: 12
08:22:49:setup_element:INFO: Eye window for uplink 7 : _________________________XXXXXXX________
Data delay found: 8
08:22:49:setup_element:INFO: Eye window for uplink 8 : __________________XXXXXXX_______________
Data delay found: 1
08:22:49:setup_element:INFO: Eye window for uplink 9 : ________________________XXXXXX__________
Data delay found: 6
08:22:49:setup_element:INFO: Eye window for uplink 10: _____________________XXXXXXXX___________
Data delay found: 4
08:22:49:setup_element:INFO: Eye window for uplink 11: _________________________XXXXXXXX_______
Data delay found: 8
08:22:49:setup_element:INFO: Eye window for uplink 12: ___________________XXXXXXX______________
Data delay found: 2
08:22:49:setup_element:INFO: Eye window for uplink 13: _______________________XXXXXXX__________
Data delay found: 6
08:22:49:setup_element:INFO: Eye window for uplink 14: ____________________XXXXXXX_____________
Data delay found: 3
08:22:49:setup_element:INFO: Eye window for uplink 15: ______________________XXXXXXXX__________
Data delay found: 5
08:22:49:setup_element:INFO: Setting the data phase to 28 for uplink 0
08:22:49:setup_element:INFO: Setting the data phase to 23 for uplink 1
08:22:49:setup_element:INFO: Setting the data phase to 24 for uplink 2
08:22:49:setup_element:INFO: Setting the data phase to 19 for uplink 3
08:22:49:setup_element:INFO: Setting the data phase to 17 for uplink 4
08:22:49:setup_element:INFO: Setting the data phase to 15 for uplink 5
08:22:49:setup_element:INFO: Setting the data phase to 12 for uplink 6
08:22:49:setup_element:INFO: Setting the data phase to 8 for uplink 7
08:22:49:setup_element:INFO: Setting the data phase to 1 for uplink 8
08:22:49:setup_element:INFO: Setting the data phase to 6 for uplink 9
08:22:49:setup_element:INFO: Setting the data phase to 4 for uplink 10
08:22:49:setup_element:INFO: Setting the data phase to 8 for uplink 11
08:22:49:setup_element:INFO: Setting the data phase to 2 for uplink 12
08:22:49:setup_element:INFO: Setting the data phase to 6 for uplink 13
08:22:49:setup_element:INFO: Setting the data phase to 3 for uplink 14
08:22:49:setup_element:INFO: Setting the data phase to 5 for uplink 15
08:22:49:setup_element:INFO: Beginning SMX ASICs map scan
08:22:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:22:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:22:49:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:22:49:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:22:49:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:22:49:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
08:22:49:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
08:22:49:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:22:49:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:22:49:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
08:22:49:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
08:22:50:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:22:50:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:22:50:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
08:22:50:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
08:22:50:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:22:50:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:22:50:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
08:22:50:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
08:22:50:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:22:50:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:22:52:setup_element:INFO: Performing Elink synchronization
08:22:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:22:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:22:52:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:22:52:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:22:52:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
08:22:52:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
08:22:52:febtest:INFO: Init all SMX (CSA): 30
08:23:07:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:23:07:febtest:INFO: 01-00 | XA-000-08-003-000-004-142-08 | 31.4 | 1183.3
08:23:07:febtest:INFO: 08-01 | XA-000-08-003-000-004-145-15 | 37.7 | 1171.5
08:23:07:febtest:INFO: 03-02 | XA-000-08-003-000-004-140-08 | 40.9 | 1147.8
08:23:08:febtest:INFO: 10-03 | XA-000-08-003-000-004-151-15 | 37.7 | 1171.5
08:23:08:febtest:INFO: 05-04 | XA-000-08-003-000-004-147-15 | 21.9 | 1218.6
08:23:08:febtest:INFO: 12-05 | XA-000-08-003-000-004-150-15 | 37.7 | 1171.5
08:23:08:febtest:INFO: 07-06 | XA-000-08-003-000-004-146-15 | 40.9 | 1147.8
08:23:08:febtest:INFO: 14-07 | XA-000-08-003-000-004-148-15 | 37.7 | 1177.4
08:23:10:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
08:23:11:ST3_smx:INFO: chip: 1-0 31.389742 C 1195.082160 mV
08:23:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:23:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:23:11:ST3_smx:INFO: Electrons
08:23:11:ST3_smx:INFO: # loops 0
08:23:13:ST3_smx:INFO: # loops 1
08:23:15:ST3_smx:INFO: # loops 2
08:23:17:ST3_smx:INFO: Total # of broken channels: 0
08:23:17:ST3_smx:INFO: List of broken channels: []
08:23:17:ST3_smx:INFO: Total # of broken channels: 0
08:23:17:ST3_smx:INFO: List of broken channels: []
08:23:18:ST3_smx:INFO: chip: 8-1 37.726682 C 1183.292940 mV
08:23:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:23:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:23:18:ST3_smx:INFO: Electrons
08:23:18:ST3_smx:INFO: # loops 0
08:23:20:ST3_smx:INFO: # loops 1
08:23:22:ST3_smx:INFO: # loops 2
08:23:24:ST3_smx:INFO: Total # of broken channels: 0
08:23:24:ST3_smx:INFO: List of broken channels: []
08:23:24:ST3_smx:INFO: Total # of broken channels: 0
08:23:24:ST3_smx:INFO: List of broken channels: []
08:23:26:ST3_smx:INFO: chip: 3-2 40.898880 C 1159.654860 mV
08:23:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:23:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:23:26:ST3_smx:INFO: Electrons
08:23:26:ST3_smx:INFO: # loops 0
08:23:27:ST3_smx:INFO: # loops 1
08:23:29:ST3_smx:INFO: # loops 2
08:23:31:ST3_smx:INFO: Total # of broken channels: 0
08:23:31:ST3_smx:INFO: List of broken channels: []
08:23:31:ST3_smx:INFO: Total # of broken channels: 0
08:23:31:ST3_smx:INFO: List of broken channels: []
08:23:32:ST3_smx:INFO: chip: 10-3 40.898880 C 1183.292940 mV
08:23:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:23:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:23:32:ST3_smx:INFO: Electrons
08:23:32:ST3_smx:INFO: # loops 0
08:23:34:ST3_smx:INFO: # loops 1
08:23:36:ST3_smx:INFO: # loops 2
08:23:38:ST3_smx:INFO: Total # of broken channels: 0
08:23:38:ST3_smx:INFO: List of broken channels: []
08:23:38:ST3_smx:INFO: Total # of broken channels: 0
08:23:38:ST3_smx:INFO: List of broken channels: []
08:23:39:ST3_smx:INFO: chip: 5-4 21.902970 C 1230.330540 mV
08:23:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:23:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:23:39:ST3_smx:INFO: Electrons
08:23:39:ST3_smx:INFO: # loops 0
08:23:41:ST3_smx:INFO: # loops 1
08:23:43:ST3_smx:INFO: # loops 2
08:23:44:ST3_smx:INFO: Total # of broken channels: 0
08:23:44:ST3_smx:INFO: List of broken channels: []
08:23:44:ST3_smx:INFO: Total # of broken channels: 0
08:23:44:ST3_smx:INFO: List of broken channels: []
08:23:46:ST3_smx:INFO: chip: 12-5 37.726682 C 1183.292940 mV
08:23:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:23:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:23:46:ST3_smx:INFO: Electrons
08:23:46:ST3_smx:INFO: # loops 0
08:23:48:ST3_smx:INFO: # loops 1
08:23:49:ST3_smx:INFO: # loops 2
08:23:51:ST3_smx:INFO: Total # of broken channels: 0
08:23:51:ST3_smx:INFO: List of broken channels: []
08:23:51:ST3_smx:INFO: Total # of broken channels: 0
08:23:51:ST3_smx:INFO: List of broken channels: []
08:23:52:ST3_smx:INFO: chip: 7-6 40.898880 C 1159.654860 mV
08:23:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:23:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:23:52:ST3_smx:INFO: Electrons
08:23:52:ST3_smx:INFO: # loops 0
08:23:54:ST3_smx:INFO: # loops 1
08:23:56:ST3_smx:INFO: # loops 2
08:23:58:ST3_smx:INFO: Total # of broken channels: 0
08:23:58:ST3_smx:INFO: List of broken channels: []
08:23:58:ST3_smx:INFO: Total # of broken channels: 0
08:23:58:ST3_smx:INFO: List of broken channels: []
08:23:59:ST3_smx:INFO: chip: 14-7 40.898880 C 1189.190035 mV
08:23:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:23:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:23:59:ST3_smx:INFO: Electrons
08:23:59:ST3_smx:INFO: # loops 0
08:24:01:ST3_smx:INFO: # loops 1
08:24:03:ST3_smx:INFO: # loops 2
08:24:05:ST3_smx:INFO: Total # of broken channels: 0
08:24:05:ST3_smx:INFO: List of broken channels: []
08:24:05:ST3_smx:INFO: Total # of broken channels: 0
08:24:05:ST3_smx:INFO: List of broken channels: []
08:24:06:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:24:06:febtest:INFO: 01-00 | XA-000-08-003-000-004-142-08 | 34.6 | 1212.7
08:24:06:febtest:INFO: 08-01 | XA-000-08-003-000-004-145-15 | 40.9 | 1212.7
08:24:06:febtest:INFO: 03-02 | XA-000-08-003-000-004-140-08 | 44.1 | 1183.3
08:24:06:febtest:INFO: 10-03 | XA-000-08-003-000-004-151-15 | 40.9 | 1206.9
08:24:07:febtest:INFO: 05-04 | XA-000-08-003-000-004-147-15 | 25.1 | 1253.7
08:24:07:febtest:INFO: 12-05 | XA-000-08-003-000-004-150-15 | 40.9 | 1206.9
08:24:07:febtest:INFO: 07-06 | XA-000-08-003-000-004-146-15 | 44.1 | 1177.4
08:24:07:febtest:INFO: 14-07 | XA-000-08-003-000-004-148-15 | 40.9 | 1206.9
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_07_10-08_22_41
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1205| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5680', '1.850', '2.4020', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0330', '1.850', '2.4400', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9960', '1.851', '0.5337', '0.000', '0.0000', '0.000', '0.0000']