Go Back
FEB_2019 22.11.23 08:02:20
TextEdit.txt
07:58:29:ST3_hmp4040:INFO: ROHDE&SCHWARZ,HMP4040,110099,HW50020003/SW2.72
07:58:30:febtest:INFO: FEB8.2 selected
Using config file: /home/cbm/ipbus-software/controlhub/sys.config
Starting ControlHub ... ok
07:58:47:smx_tester:INFO: Setting Elink clock mode to 160 MHz
07:58:51:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:58:51:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
07:58:51:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:58:51:febtest:INFO: Tsting FEB with SN 2019
07:58:53:smx_tester:INFO: Scanning setup
07:58:53:elinks:INFO: Disabling clock on downlink 0
07:58:53:elinks:INFO: Disabling clock on downlink 1
07:58:53:elinks:INFO: Disabling clock on downlink 2
07:58:53:elinks:INFO: Disabling clock on downlink 3
07:58:53:elinks:INFO: Disabling clock on downlink 4
07:58:53:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:58:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:58:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:58:53:elinks:INFO: Disabling clock on downlink 0
07:58:53:elinks:INFO: Disabling clock on downlink 1
07:58:53:elinks:INFO: Disabling clock on downlink 2
07:58:53:elinks:INFO: Disabling clock on downlink 3
07:58:53:elinks:INFO: Disabling clock on downlink 4
07:58:53:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:58:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:58:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:58:53:elinks:INFO: Disabling clock on downlink 0
07:58:53:elinks:INFO: Disabling clock on downlink 1
07:58:53:elinks:INFO: Disabling clock on downlink 2
07:58:53:elinks:INFO: Disabling clock on downlink 3
07:58:53:elinks:INFO: Disabling clock on downlink 4
07:58:53:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:58:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:58:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
07:58:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
07:58:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
07:58:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
07:58:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
07:58:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
07:58:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
07:58:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
07:58:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
07:58:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
07:58:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
07:58:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
07:58:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
07:58:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
07:58:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
07:58:53:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
07:58:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:58:53:elinks:INFO: Disabling clock on downlink 0
07:58:53:elinks:INFO: Disabling clock on downlink 1
07:58:53:elinks:INFO: Disabling clock on downlink 2
07:58:53:elinks:INFO: Disabling clock on downlink 3
07:58:53:elinks:INFO: Disabling clock on downlink 4
07:58:53:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:58:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
07:58:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:58:53:elinks:INFO: Disabling clock on downlink 0
07:58:53:elinks:INFO: Disabling clock on downlink 1
07:58:53:elinks:INFO: Disabling clock on downlink 2
07:58:53:elinks:INFO: Disabling clock on downlink 3
07:58:53:elinks:INFO: Disabling clock on downlink 4
07:58:53:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:58:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
07:58:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:58:53:setup_element:INFO: Scanning clock phase
07:58:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:58:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:58:54:setup_element:INFO: Clock phase scan results for group 0, downlink 2
07:58:54:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:58:54:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:58:54:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:58:54:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:58:54:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:58:54:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:58:54:setup_element:INFO: Eye window for uplink 22: ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:58:54:setup_element:INFO: Eye window for uplink 23: ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:58:54:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXX____
Clock Delay: 32
07:58:54:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXX____
Clock Delay: 32
07:58:54:setup_element:INFO: Eye window for uplink 26: _________________________________________________________________________XXXXX__
Clock Delay: 35
07:58:54:setup_element:INFO: Eye window for uplink 27: _________________________________________________________________________XXXXX__
Clock Delay: 35
07:58:54:setup_element:INFO: Eye window for uplink 28: _________________________________________________________________________XXXX___
Clock Delay: 34
07:58:54:setup_element:INFO: Eye window for uplink 29: _________________________________________________________________________XXXX___
Clock Delay: 34
07:58:54:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXX___
Clock Delay: 34
07:58:54:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXX___
Clock Delay: 34
07:58:54:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
07:58:54:setup_element:INFO: Scanning data phases
07:58:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:58:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:58:59:setup_element:INFO: Data phase scan results for group 0, downlink 2
07:58:59:setup_element:INFO: Eye window for uplink 16: X__________________________________XXXXX
Data delay found: 17
07:58:59:setup_element:INFO: Eye window for uplink 17: _______________________________XXXXX____
Data delay found: 13
07:58:59:setup_element:INFO: Eye window for uplink 18: ___________________________________XXXXX
Data delay found: 17
07:58:59:setup_element:INFO: Eye window for uplink 19: ________________________________XXXXX___
Data delay found: 14
07:58:59:setup_element:INFO: Eye window for uplink 20: __________________________________XXXX__
Data delay found: 15
07:58:59:setup_element:INFO: Eye window for uplink 21: _________________________________XXXX___
Data delay found: 14
07:58:59:setup_element:INFO: Eye window for uplink 22: X__________________________________XXXX_
Data delay found: 17
07:58:59:setup_element:INFO: Eye window for uplink 23: _______________________________XXXX_____
Data delay found: 12
07:58:59:setup_element:INFO: Eye window for uplink 24: XXXXX_________________________________XX
Data delay found: 21
07:58:59:setup_element:INFO: Eye window for uplink 25: ___XXXXX________________________________
Data delay found: 25
07:58:59:setup_element:INFO: Eye window for uplink 26: ____XXXXXX______________________________
Data delay found: 26
07:58:59:setup_element:INFO: Eye window for uplink 27: _________XXXXXXX________________________
Data delay found: 32
07:58:59:setup_element:INFO: Eye window for uplink 28: ___________XXXXX________________________
Data delay found: 33
07:58:59:setup_element:INFO: Eye window for uplink 29: _____________XXXXX______________________
Data delay found: 35
07:58:59:setup_element:INFO: Eye window for uplink 30: __________XXXXXX________________________
Data delay found: 32
07:58:59:setup_element:INFO: Eye window for uplink 31: __________XXXXX_________________________
Data delay found: 32
07:58:59:setup_element:INFO: Setting the data phase to 17 for uplink 16
07:58:59:setup_element:INFO: Setting the data phase to 13 for uplink 17
07:58:59:setup_element:INFO: Setting the data phase to 17 for uplink 18
07:58:59:setup_element:INFO: Setting the data phase to 14 for uplink 19
07:58:59:setup_element:INFO: Setting the data phase to 15 for uplink 20
07:58:59:setup_element:INFO: Setting the data phase to 14 for uplink 21
07:58:59:setup_element:INFO: Setting the data phase to 17 for uplink 22
07:58:59:setup_element:INFO: Setting the data phase to 12 for uplink 23
07:58:59:setup_element:INFO: Setting the data phase to 21 for uplink 24
07:58:59:setup_element:INFO: Setting the data phase to 25 for uplink 25
07:58:59:setup_element:INFO: Setting the data phase to 26 for uplink 26
07:58:59:setup_element:INFO: Setting the data phase to 32 for uplink 27
07:58:59:setup_element:INFO: Setting the data phase to 33 for uplink 28
07:58:59:setup_element:INFO: Setting the data phase to 35 for uplink 29
07:58:59:setup_element:INFO: Setting the data phase to 32 for uplink 30
07:58:59:setup_element:INFO: Setting the data phase to 32 for uplink 31
07:58:59:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 72
Eye Windows:
Uplink 16: ________________________________________________________________________XXXXXX__
Uplink 17: ________________________________________________________________________XXXXXX__
Uplink 18: ________________________________________________________________________XXXXXX__
Uplink 19: ________________________________________________________________________XXXXXX__
Uplink 20: ________________________________________________________________________XXXXXX__
Uplink 21: ________________________________________________________________________XXXXXX__
Uplink 22: ________________________________________________________________________XXXXXX__
Uplink 23: ________________________________________________________________________XXXXXX__
Uplink 24: ______________________________________________________________________XXXXXX____
Uplink 25: ______________________________________________________________________XXXXXX____
Uplink 26: _________________________________________________________________________XXXXX__
Uplink 27: _________________________________________________________________________XXXXX__
Uplink 28: _________________________________________________________________________XXXX___
Uplink 29: _________________________________________________________________________XXXX___
Uplink 30: ________________________________________________________________________XXXXX___
Uplink 31: ________________________________________________________________________XXXXX___
Data phase characteristics:
Uplink 16:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 17:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 18:
Optimal Phase: 17
Window Length: 35
Eye Window: ___________________________________XXXXX
Uplink 19:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 20:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 21:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 22:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXX_
Uplink 23:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
Uplink 24:
Optimal Phase: 21
Window Length: 33
Eye Window: XXXXX_________________________________XX
Uplink 25:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 26:
Optimal Phase: 26
Window Length: 34
Eye Window: ____XXXXXX______________________________
Uplink 27:
Optimal Phase: 32
Window Length: 33
Eye Window: _________XXXXXXX________________________
Uplink 28:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 29:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 30:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 31:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
]
07:58:59:setup_element:INFO: Beginning SMX ASICs map scan
07:58:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:58:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:58:59:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
07:58:59:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
07:58:59:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
07:58:59:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
07:58:59:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
07:58:59:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
07:58:59:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
07:59:00:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
07:59:00:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
07:59:00:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
07:59:00:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
07:59:00:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
07:59:00:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
07:59:00:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
07:59:00:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
07:59:00:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
07:59:00:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
07:59:00:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
07:59:00:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
07:59:02:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 72
Eye Windows:
Uplink 16: ________________________________________________________________________XXXXXX__
Uplink 17: ________________________________________________________________________XXXXXX__
Uplink 18: ________________________________________________________________________XXXXXX__
Uplink 19: ________________________________________________________________________XXXXXX__
Uplink 20: ________________________________________________________________________XXXXXX__
Uplink 21: ________________________________________________________________________XXXXXX__
Uplink 22: ________________________________________________________________________XXXXXX__
Uplink 23: ________________________________________________________________________XXXXXX__
Uplink 24: ______________________________________________________________________XXXXXX____
Uplink 25: ______________________________________________________________________XXXXXX____
Uplink 26: _________________________________________________________________________XXXXX__
Uplink 27: _________________________________________________________________________XXXXX__
Uplink 28: _________________________________________________________________________XXXX___
Uplink 29: _________________________________________________________________________XXXX___
Uplink 30: ________________________________________________________________________XXXXX___
Uplink 31: ________________________________________________________________________XXXXX___
Data phase characteristics:
Uplink 16:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 17:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 18:
Optimal Phase: 17
Window Length: 35
Eye Window: ___________________________________XXXXX
Uplink 19:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 20:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 21:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 22:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXX_
Uplink 23:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
Uplink 24:
Optimal Phase: 21
Window Length: 33
Eye Window: XXXXX_________________________________XX
Uplink 25:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 26:
Optimal Phase: 26
Window Length: 34
Eye Window: ____XXXXXX______________________________
Uplink 27:
Optimal Phase: 32
Window Length: 33
Eye Window: _________XXXXXXX________________________
Uplink 28:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 29:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 30:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 31:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
07:59:02:setup_element:INFO: Performing Elink synchronization
07:59:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:59:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:59:02:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
07:59:02:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
07:59:02:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
07:59:02:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
07:59:02:ST3_emu:INFO: Number of chips: 8
07:59:02:ST3_emu:INFO: Chip address: 0x0
07:59:02:ST3_emu:INFO: Chip address: 0x1
07:59:02:ST3_emu:INFO: Chip address: 0x2
07:59:02:ST3_emu:INFO: Chip address: 0x3
07:59:02:ST3_emu:INFO: Chip address: 0x4
07:59:02:ST3_emu:INFO: Chip address: 0x5
07:59:02:ST3_emu:INFO: Chip address: 0x6
07:59:02:ST3_emu:INFO: Chip address: 0x7
07:59:03:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
07:59:03:febtest:INFO: 0-0 | XA-000-08-003-000-002-232-06 | 56.8 | 1106.2
07:59:04:febtest:INFO: 0-1 | XA-000-08-003-000-000-121-08 | 44.1 | 1165.6
07:59:04:febtest:INFO: 0-2 | XA-000-08-003-000-002-225-06 | 40.9 | 1159.7
07:59:04:febtest:INFO: 0-3 | XA-000-08-003-000-002-231-06 | 44.1 | 1171.5
07:59:04:febtest:INFO: 0-4 | XA-000-08-003-000-001-161-13 | 31.4 | 1201.0
07:59:05:febtest:INFO: 0-5 | XA-000-08-003-000-002-226-06 | 47.3 | 1153.7
07:59:05:febtest:INFO: 0-6 | XA-000-08-003-000-002-029-00 | 12.4 | 1271.2
07:59:05:febtest:INFO: 0-7 | XA-000-08-003-000-000-116-08 | 40.9 | 1183.3
07:59:05:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
07:59:10:ST3_smx:INFO: chip: 0-0 50.430383 C 1112.140140 mV
07:59:10:ST3_smx:INFO: # loops 0
07:59:12:ST3_smx:INFO: # loops 1
07:59:14:ST3_smx:INFO: # loops 2
07:59:16:ST3_smx:INFO: # loops 3
07:59:18:ST3_smx:INFO: # loops 4
07:59:20:ST3_smx:INFO: Total # of broken channels: 0
07:59:20:ST3_smx:INFO: List of broken channels: []
07:59:20:ST3_smx:INFO: Total # of broken channels: 0
07:59:20:ST3_smx:INFO: List of broken channels: []
07:59:22:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
07:59:26:ST3_smx:INFO: chip: 0-1 50.430383 C 1135.937260 mV
07:59:26:ST3_smx:INFO: # loops 0
07:59:29:ST3_smx:INFO: # loops 1
07:59:31:ST3_smx:INFO: # loops 2
07:59:33:ST3_smx:INFO: # loops 3
07:59:36:ST3_smx:INFO: # loops 4
07:59:38:ST3_smx:INFO: Total # of broken channels: 0
07:59:38:ST3_smx:INFO: List of broken channels: []
07:59:38:ST3_smx:INFO: Total # of broken channels: 0
07:59:38:ST3_smx:INFO: List of broken channels: []
07:59:39:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
07:59:44:ST3_smx:INFO: chip: 0-2 40.898880 C 1147.806000 mV
07:59:44:ST3_smx:INFO: # loops 0
07:59:46:ST3_smx:INFO: # loops 1
07:59:48:ST3_smx:INFO: # loops 2
07:59:50:ST3_smx:INFO: # loops 3
07:59:52:ST3_smx:INFO: # loops 4
07:59:54:ST3_smx:INFO: Total # of broken channels: 0
07:59:54:ST3_smx:INFO: List of broken channels: []
07:59:54:ST3_smx:INFO: Total # of broken channels: 19
07:59:54:ST3_smx:INFO: List of broken channels: [3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 43, 47]
07:59:55:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
08:00:00:ST3_smx:INFO: chip: 0-3 37.726682 C 1177.390875 mV
08:00:00:ST3_smx:INFO: # loops 0
08:00:01:ST3_smx:INFO: # loops 1
08:00:04:ST3_smx:INFO: # loops 2
08:00:05:ST3_smx:INFO: # loops 3
08:00:07:ST3_smx:INFO: # loops 4
08:00:10:ST3_smx:INFO: Total # of broken channels: 0
08:00:10:ST3_smx:INFO: List of broken channels: []
08:00:10:ST3_smx:INFO: Total # of broken channels: 0
08:00:10:ST3_smx:INFO: List of broken channels: []
08:00:11:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
08:00:15:ST3_smx:INFO: chip: 0-4 31.389742 C 1183.292940 mV
08:00:15:ST3_smx:INFO: # loops 0
08:00:17:ST3_smx:INFO: # loops 1
08:00:19:ST3_smx:INFO: # loops 2
08:00:21:ST3_smx:INFO: # loops 3
08:00:23:ST3_smx:INFO: # loops 4
08:00:25:ST3_smx:INFO: Total # of broken channels: 0
08:00:25:ST3_smx:INFO: List of broken channels: []
08:00:25:ST3_smx:INFO: Total # of broken channels: 6
08:00:25:ST3_smx:INFO: List of broken channels: [7, 9, 11, 15, 43, 77]
08:00:26:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
08:00:30:ST3_smx:INFO: chip: 0-5 40.898880 C 1153.732915 mV
08:00:30:ST3_smx:INFO: # loops 0
08:00:32:ST3_smx:INFO: # loops 1
08:00:35:ST3_smx:INFO: # loops 2
08:00:37:ST3_smx:INFO: # loops 3
08:00:39:ST3_smx:INFO: # loops 4
08:00:41:ST3_smx:INFO: Total # of broken channels: 0
08:00:41:ST3_smx:INFO: List of broken channels: []
08:00:41:ST3_smx:INFO: Total # of broken channels: 6
08:00:41:ST3_smx:INFO: List of broken channels: [3, 5, 7, 9, 11, 37]
08:00:42:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
08:00:47:ST3_smx:INFO: chip: 0-6 18.745682 C 1230.330540 mV
08:00:47:ST3_smx:INFO: # loops 0
08:00:49:ST3_smx:INFO: # loops 1
08:00:51:ST3_smx:INFO: # loops 2
08:00:52:ST3_smx:INFO: # loops 3
08:00:54:ST3_smx:INFO: # loops 4
08:00:57:ST3_smx:INFO: Total # of broken channels: 0
08:00:57:ST3_smx:INFO: List of broken channels: []
08:00:57:ST3_smx:INFO: Total # of broken channels: 0
08:00:57:ST3_smx:INFO: List of broken channels: []
08:00:58:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
08:01:02:ST3_smx:INFO: chip: 0-7 50.430383 C 1135.937260 mV
08:01:02:ST3_smx:INFO: # loops 0
08:01:04:ST3_smx:INFO: # loops 1
08:01:06:ST3_smx:INFO: # loops 2
08:01:08:ST3_smx:INFO: # loops 3
08:01:10:ST3_smx:INFO: # loops 4
08:01:12:ST3_smx:INFO: Total # of broken channels: 0
08:01:12:ST3_smx:INFO: List of broken channels: []
08:01:12:ST3_smx:INFO: Total # of broken channels: 0
08:01:12:ST3_smx:INFO: List of broken channels: []
08:01:13:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
08:01:14:febtest:INFO: 0-0 | XA-000-08-003-000-002-232-06 | 53.6 | 1100.2
08:01:14:febtest:INFO: 0-1 | XA-000-08-003-000-000-121-08 | 50.4 | 1124.0
08:01:14:febtest:INFO: 0-2 | XA-000-08-003-000-002-225-06 | 44.1 | 1141.9
08:01:14:febtest:INFO: 0-3 | XA-000-08-003-000-002-231-06 | 37.7 | 1165.6
08:01:14:febtest:INFO: 0-4 | XA-000-08-003-000-001-161-13 | 34.6 | 1177.4
08:01:15:febtest:INFO: 0-5 | XA-000-08-003-000-002-226-06 | 40.9 | 1153.7
08:01:15:febtest:INFO: 0-6 | XA-000-08-003-000-002-029-00 | 18.7 | 1230.3
08:01:15:febtest:INFO: 0-7 | XA-000-08-003-000-000-116-08 | 50.4 | 1135.9
08:02:20:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:02:20:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
08:02:20:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:02:21:febtest:INFO: Tsting FEB with SN 2019
08:02:23:smx_tester:INFO: Scanning setup
08:02:23:elinks:INFO: Disabling clock on downlink 0
08:02:23:elinks:INFO: Disabling clock on downlink 1
08:02:23:elinks:INFO: Disabling clock on downlink 2
08:02:23:elinks:INFO: Disabling clock on downlink 3
08:02:23:elinks:INFO: Disabling clock on downlink 4
08:02:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:02:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:02:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:02:23:elinks:INFO: Disabling clock on downlink 0
08:02:23:elinks:INFO: Disabling clock on downlink 1
08:02:23:elinks:INFO: Disabling clock on downlink 2
08:02:23:elinks:INFO: Disabling clock on downlink 3
08:02:23:elinks:INFO: Disabling clock on downlink 4
08:02:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:02:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:02:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:02:23:elinks:INFO: Disabling clock on downlink 0
08:02:23:elinks:INFO: Disabling clock on downlink 1
08:02:23:elinks:INFO: Disabling clock on downlink 2
08:02:23:elinks:INFO: Disabling clock on downlink 3
08:02:23:elinks:INFO: Disabling clock on downlink 4
08:02:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:02:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:02:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
08:02:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
08:02:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
08:02:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
08:02:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
08:02:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
08:02:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
08:02:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
08:02:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
08:02:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
08:02:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
08:02:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
08:02:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
08:02:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
08:02:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
08:02:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
08:02:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:02:23:elinks:INFO: Disabling clock on downlink 0
08:02:23:elinks:INFO: Disabling clock on downlink 1
08:02:23:elinks:INFO: Disabling clock on downlink 2
08:02:23:elinks:INFO: Disabling clock on downlink 3
08:02:23:elinks:INFO: Disabling clock on downlink 4
08:02:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:02:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:02:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:02:23:elinks:INFO: Disabling clock on downlink 0
08:02:23:elinks:INFO: Disabling clock on downlink 1
08:02:23:elinks:INFO: Disabling clock on downlink 2
08:02:23:elinks:INFO: Disabling clock on downlink 3
08:02:23:elinks:INFO: Disabling clock on downlink 4
08:02:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:02:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:02:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:02:23:setup_element:INFO: Scanning clock phase
08:02:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:02:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:02:24:setup_element:INFO: Clock phase scan results for group 0, downlink 2
08:02:24:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________XXXXXX__
Clock Delay: 34
08:02:24:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________XXXXXX__
Clock Delay: 34
08:02:24:setup_element:INFO: Eye window for uplink 18: _________________________________________________________________________XXXXX__
Clock Delay: 35
08:02:24:setup_element:INFO: Eye window for uplink 19: _________________________________________________________________________XXXXX__
Clock Delay: 35
08:02:24:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________XXXXXX__
Clock Delay: 34
08:02:24:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________XXXXXX__
Clock Delay: 34
08:02:24:setup_element:INFO: Eye window for uplink 22: ________________________________________________________________________XXXXXX__
Clock Delay: 34
08:02:24:setup_element:INFO: Eye window for uplink 23: ________________________________________________________________________XXXXXX__
Clock Delay: 34
08:02:24:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXX____
Clock Delay: 33
08:02:24:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXX____
Clock Delay: 33
08:02:24:setup_element:INFO: Eye window for uplink 26: _________________________________________________________________________XXXXX__
Clock Delay: 35
08:02:24:setup_element:INFO: Eye window for uplink 27: _________________________________________________________________________XXXXX__
Clock Delay: 35
08:02:24:setup_element:INFO: Eye window for uplink 28: _________________________________________________________________________XXXX___
Clock Delay: 34
08:02:24:setup_element:INFO: Eye window for uplink 29: _________________________________________________________________________XXXX___
Clock Delay: 34
08:02:24:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXX___
Clock Delay: 34
08:02:24:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXX___
Clock Delay: 34
08:02:24:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
08:02:24:setup_element:INFO: Scanning data phases
08:02:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:02:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:02:29:setup_element:INFO: Data phase scan results for group 0, downlink 2
08:02:29:setup_element:INFO: Eye window for uplink 16: _________________________________XXXXXX_
Data delay found: 15
08:02:29:setup_element:INFO: Eye window for uplink 17: _______________________________XXXX_____
Data delay found: 12
08:02:29:setup_element:INFO: Eye window for uplink 18: __________________________________XXXXXX
Data delay found: 16
08:02:29:setup_element:INFO: Eye window for uplink 19: _______________________________XXXX___XX
Data delay found: 15
08:02:29:setup_element:INFO: Eye window for uplink 20: _________________________________XXXX___
Data delay found: 14
08:02:29:setup_element:INFO: Eye window for uplink 21: _______________________________XXXXX____
Data delay found: 13
08:02:29:setup_element:INFO: Eye window for uplink 22: _________________________________XXXXX__
Data delay found: 15
08:02:29:setup_element:INFO: Eye window for uplink 23: _____________________________XXXXX______
Data delay found: 11
08:02:29:setup_element:INFO: Eye window for uplink 24: XXXX_________________________________XXX
Data delay found: 20
08:02:29:setup_element:INFO: Eye window for uplink 25: _XXXXX__________________________________
Data delay found: 23
08:02:29:setup_element:INFO: Eye window for uplink 26: ___XXXXX________________________________
Data delay found: 25
08:02:29:setup_element:INFO: Eye window for uplink 27: ______XXXXXXXX__________________________
Data delay found: 29
08:02:29:setup_element:INFO: Eye window for uplink 28: __________XXXXX_________________________
Data delay found: 32
08:02:29:setup_element:INFO: Eye window for uplink 29: ____________XXXXX_______________________
Data delay found: 34
08:02:29:setup_element:INFO: Eye window for uplink 30: ________XXXXXXX_________________________
Data delay found: 31
08:02:29:setup_element:INFO: Eye window for uplink 31: __________XXX___________________________
Data delay found: 31
08:02:29:setup_element:INFO: Setting the data phase to 15 for uplink 16
08:02:29:setup_element:INFO: Setting the data phase to 12 for uplink 17
08:02:29:setup_element:INFO: Setting the data phase to 16 for uplink 18
08:02:29:setup_element:INFO: Setting the data phase to 15 for uplink 19
08:02:29:setup_element:INFO: Setting the data phase to 14 for uplink 20
08:02:29:setup_element:INFO: Setting the data phase to 13 for uplink 21
08:02:29:setup_element:INFO: Setting the data phase to 15 for uplink 22
08:02:29:setup_element:INFO: Setting the data phase to 11 for uplink 23
08:02:29:setup_element:INFO: Setting the data phase to 20 for uplink 24
08:02:29:setup_element:INFO: Setting the data phase to 23 for uplink 25
08:02:29:setup_element:INFO: Setting the data phase to 25 for uplink 26
08:02:29:setup_element:INFO: Setting the data phase to 29 for uplink 27
08:02:29:setup_element:INFO: Setting the data phase to 32 for uplink 28
08:02:29:setup_element:INFO: Setting the data phase to 34 for uplink 29
08:02:29:setup_element:INFO: Setting the data phase to 31 for uplink 30
08:02:29:setup_element:INFO: Setting the data phase to 31 for uplink 31
08:02:29:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 73
Eye Windows:
Uplink 16: ________________________________________________________________________XXXXXX__
Uplink 17: ________________________________________________________________________XXXXXX__
Uplink 18: _________________________________________________________________________XXXXX__
Uplink 19: _________________________________________________________________________XXXXX__
Uplink 20: ________________________________________________________________________XXXXXX__
Uplink 21: ________________________________________________________________________XXXXXX__
Uplink 22: ________________________________________________________________________XXXXXX__
Uplink 23: ________________________________________________________________________XXXXXX__
Uplink 24: _______________________________________________________________________XXXXX____
Uplink 25: _______________________________________________________________________XXXXX____
Uplink 26: _________________________________________________________________________XXXXX__
Uplink 27: _________________________________________________________________________XXXXX__
Uplink 28: _________________________________________________________________________XXXX___
Uplink 29: _________________________________________________________________________XXXX___
Uplink 30: ________________________________________________________________________XXXXX___
Uplink 31: ________________________________________________________________________XXXXX___
Data phase characteristics:
Uplink 16:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 17:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
Uplink 18:
Optimal Phase: 16
Window Length: 34
Eye Window: __________________________________XXXXXX
Uplink 19:
Optimal Phase: 15
Window Length: 31
Eye Window: _______________________________XXXX___XX
Uplink 20:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 21:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 22:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 23:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 24:
Optimal Phase: 20
Window Length: 33
Eye Window: XXXX_________________________________XXX
Uplink 25:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 26:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 27:
Optimal Phase: 29
Window Length: 32
Eye Window: ______XXXXXXXX__________________________
Uplink 28:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 29:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 30:
Optimal Phase: 31
Window Length: 33
Eye Window: ________XXXXXXX_________________________
Uplink 31:
Optimal Phase: 31
Window Length: 37
Eye Window: __________XXX___________________________
]
08:02:29:setup_element:INFO: Beginning SMX ASICs map scan
08:02:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:02:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:02:29:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:02:29:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:02:29:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
08:02:29:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
08:02:29:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
08:02:29:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
08:02:29:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
08:02:29:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
08:02:29:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
08:02:30:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
08:02:30:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
08:02:30:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
08:02:30:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
08:02:30:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
08:02:30:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
08:02:30:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
08:02:30:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
08:02:30:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
08:02:30:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
08:02:32:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 73
Eye Windows:
Uplink 16: ________________________________________________________________________XXXXXX__
Uplink 17: ________________________________________________________________________XXXXXX__
Uplink 18: _________________________________________________________________________XXXXX__
Uplink 19: _________________________________________________________________________XXXXX__
Uplink 20: ________________________________________________________________________XXXXXX__
Uplink 21: ________________________________________________________________________XXXXXX__
Uplink 22: ________________________________________________________________________XXXXXX__
Uplink 23: ________________________________________________________________________XXXXXX__
Uplink 24: _______________________________________________________________________XXXXX____
Uplink 25: _______________________________________________________________________XXXXX____
Uplink 26: _________________________________________________________________________XXXXX__
Uplink 27: _________________________________________________________________________XXXXX__
Uplink 28: _________________________________________________________________________XXXX___
Uplink 29: _________________________________________________________________________XXXX___
Uplink 30: ________________________________________________________________________XXXXX___
Uplink 31: ________________________________________________________________________XXXXX___
Data phase characteristics:
Uplink 16:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 17:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
Uplink 18:
Optimal Phase: 16
Window Length: 34
Eye Window: __________________________________XXXXXX
Uplink 19:
Optimal Phase: 15
Window Length: 31
Eye Window: _______________________________XXXX___XX
Uplink 20:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 21:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 22:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 23:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 24:
Optimal Phase: 20
Window Length: 33
Eye Window: XXXX_________________________________XXX
Uplink 25:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 26:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 27:
Optimal Phase: 29
Window Length: 32
Eye Window: ______XXXXXXXX__________________________
Uplink 28:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 29:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 30:
Optimal Phase: 31
Window Length: 33
Eye Window: ________XXXXXXX_________________________
Uplink 31:
Optimal Phase: 31
Window Length: 37
Eye Window: __________XXX___________________________
08:02:32:setup_element:INFO: Performing Elink synchronization
08:02:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:02:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:02:32:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:02:32:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:02:32:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
08:02:32:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
08:02:32:ST3_emu:INFO: Number of chips: 8
08:02:32:ST3_emu:INFO: Chip address: 0x0
08:02:32:ST3_emu:INFO: Chip address: 0x1
08:02:32:ST3_emu:INFO: Chip address: 0x2
08:02:32:ST3_emu:INFO: Chip address: 0x3
08:02:32:ST3_emu:INFO: Chip address: 0x4
08:02:32:ST3_emu:INFO: Chip address: 0x5
08:02:32:ST3_emu:INFO: Chip address: 0x6
08:02:32:ST3_emu:INFO: Chip address: 0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_0
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_1
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_2 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_2
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_3
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_4
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_5
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_6
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
08:02:33:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
08:02:33:febtest:INFO: 0-0 | XA-000-08-003-000-002-232-06 | 56.8 | 1112.1
08:02:33:febtest:INFO: 0-1 | XA-000-08-003-000-000-121-08 | 44.1 | 1165.6
08:02:34:febtest:INFO: 0-2 | XA-000-08-003-000-002-225-06 | 44.1 | 1159.7
08:02:34:febtest:INFO: 0-3 | XA-000-08-003-000-002-231-06 | 44.1 | 1171.5
08:02:34:febtest:INFO: 0-4 | XA-000-08-003-000-001-161-13 | 31.4 | 1201.0
08:02:34:febtest:INFO: 0-5 | XA-000-08-003-000-002-226-06 | 47.3 | 1153.7
08:02:34:febtest:INFO: 0-6 | XA-000-08-003-000-002-029-00 | 21.9 | 1242.0
08:02:35:febtest:INFO: 0-7 | XA-000-08-003-000-000-116-08 | 40.9 | 1183.3
08:02:35:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
08:02:38:ST3_smx:INFO: chip: 0-0 53.612520 C 1106.178435 mV
08:02:38:ST3_smx:INFO: # loops 0
08:02:40:ST3_smx:INFO: # loops 1
08:02:41:ST3_smx:INFO: # loops 2
08:02:43:ST3_smx:INFO: # loops 3
08:02:44:ST3_smx:INFO: # loops 4
08:02:46:ST3_smx:INFO: Total # of broken channels: 0
08:02:46:ST3_smx:INFO: List of broken channels: []
08:02:46:ST3_smx:INFO: Total # of broken channels: 0
08:02:46:ST3_smx:INFO: List of broken channels: []
08:02:47:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
08:02:50:ST3_smx:INFO: chip: 0-1 50.430383 C 1135.937260 mV
08:02:50:ST3_smx:INFO: # loops 0
08:02:52:ST3_smx:INFO: # loops 1
08:02:54:ST3_smx:INFO: # loops 2
08:02:55:ST3_smx:INFO: # loops 3
08:02:57:ST3_smx:INFO: # loops 4
08:02:58:ST3_smx:INFO: Total # of broken channels: 0
08:02:58:ST3_smx:INFO: List of broken channels: []
08:02:58:ST3_smx:INFO: Total # of broken channels: 0
08:02:58:ST3_smx:INFO: List of broken channels: []
08:02:59:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
08:03:02:ST3_smx:INFO: chip: 0-2 40.898880 C 1147.806000 mV
08:03:02:ST3_smx:INFO: # loops 0
08:03:04:ST3_smx:INFO: # loops 1
08:03:06:ST3_smx:INFO: # loops 2
08:03:07:ST3_smx:INFO: # loops 3
08:03:09:ST3_smx:INFO: # loops 4
08:03:10:ST3_smx:INFO: Total # of broken channels: 0
08:03:10:ST3_smx:INFO: List of broken channels: []
08:03:10:ST3_smx:INFO: Total # of broken channels: 0
08:03:10:ST3_smx:INFO: List of broken channels: []
08:03:11:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
08:03:14:ST3_smx:INFO: chip: 0-3 37.726682 C 1177.390875 mV
08:03:15:ST3_smx:INFO: # loops 0
08:03:16:ST3_smx:INFO: # loops 1
08:03:18:ST3_smx:INFO: # loops 2
08:03:19:ST3_smx:INFO: # loops 3
08:03:21:ST3_smx:INFO: # loops 4
08:03:22:ST3_smx:INFO: Total # of broken channels: 0
08:03:22:ST3_smx:INFO: List of broken channels: []
08:03:22:ST3_smx:INFO: Total # of broken channels: 0
08:03:22:ST3_smx:INFO: List of broken channels: []
08:03:23:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
08:03:26:ST3_smx:INFO: chip: 0-4 34.556970 C 1177.390875 mV
08:03:26:ST3_smx:INFO: # loops 0
08:03:28:ST3_smx:INFO: # loops 1
08:03:29:ST3_smx:INFO: # loops 2
08:03:31:ST3_smx:INFO: # loops 3
08:03:32:ST3_smx:INFO: # loops 4
08:03:34:ST3_smx:INFO: Total # of broken channels: 0
08:03:34:ST3_smx:INFO: List of broken channels: []
08:03:34:ST3_smx:INFO: Total # of broken channels: 0
08:03:34:ST3_smx:INFO: List of broken channels: []
08:03:35:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
08:03:38:ST3_smx:INFO: chip: 0-5 40.898880 C 1153.732915 mV
08:03:38:ST3_smx:INFO: # loops 0
08:03:40:ST3_smx:INFO: # loops 1
08:03:42:ST3_smx:INFO: # loops 2
08:03:43:ST3_smx:INFO: # loops 3
08:03:45:ST3_smx:INFO: # loops 4
08:03:46:ST3_smx:INFO: Total # of broken channels: 0
08:03:46:ST3_smx:INFO: List of broken channels: []
08:03:46:ST3_smx:INFO: Total # of broken channels: 0
08:03:46:ST3_smx:INFO: List of broken channels: []
08:03:47:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
08:03:51:ST3_smx:INFO: chip: 0-6 18.745682 C 1230.330540 mV
08:03:51:ST3_smx:INFO: # loops 0
08:03:52:ST3_smx:INFO: # loops 1
08:03:54:ST3_smx:INFO: # loops 2
08:03:55:ST3_smx:INFO: # loops 3
08:03:57:ST3_smx:INFO: # loops 4
08:03:58:ST3_smx:INFO: Total # of broken channels: 0
08:03:58:ST3_smx:INFO: List of broken channels: []
08:03:58:ST3_smx:INFO: Total # of broken channels: 0
08:03:58:ST3_smx:INFO: List of broken channels: []
08:03:59:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
08:04:03:ST3_smx:INFO: chip: 0-7 50.430383 C 1135.937260 mV
08:04:03:ST3_smx:INFO: # loops 0
08:04:04:ST3_smx:INFO: # loops 1
08:04:06:ST3_smx:INFO: # loops 2
08:04:07:ST3_smx:INFO: # loops 3
08:04:09:ST3_smx:INFO: # loops 4
08:04:10:ST3_smx:INFO: Total # of broken channels: 0
08:04:10:ST3_smx:INFO: List of broken channels: []
08:04:10:ST3_smx:INFO: Total # of broken channels: 0
08:04:10:ST3_smx:INFO: List of broken channels: []
08:04:11:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
08:04:11:febtest:INFO: 0-0 | XA-000-08-003-000-002-232-06 | 53.6 | 1100.2
08:04:12:febtest:INFO: 0-1 | XA-000-08-003-000-000-121-08 | 53.6 | 1124.0
08:04:12:febtest:INFO: 0-2 | XA-000-08-003-000-002-225-06 | 44.1 | 1141.9
08:04:12:febtest:INFO: 0-3 | XA-000-08-003-000-002-231-06 | 37.7 | 1171.5
08:04:12:febtest:INFO: 0-4 | XA-000-08-003-000-001-161-13 | 34.6 | 1171.5
08:04:12:febtest:INFO: 0-5 | XA-000-08-003-000-002-226-06 | 44.1 | 1153.7
08:04:13:febtest:INFO: 0-6 | XA-000-08-003-000-002-029-00 | 18.7 | 1230.3
08:04:13:febtest:INFO: 0-7 | XA-000-08-003-000-000-116-08 | 50.4 | 1135.9
08:05:28:ST3_Shared:INFO: /home/cbm/public_html/Test_LogDir//FEB/FEB_2019/TestDate_2023_11_22-08_02_20/