FEB_2019    22.11.23 10:37:38

TextEdit.txt
            10:35:08:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:35:08:ST3_Shared:INFO:	-----------------------FEB-Microcable-----------------------
10:35:08:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:35:08:febtest:INFO:	Tsting FEB with SN 2019
10:35:10:smx_tester:INFO:	Scanning setup
10:35:10:elinks:INFO:	Disabling clock on downlink 0
10:35:10:elinks:INFO:	Disabling clock on downlink 1
10:35:10:elinks:INFO:	Disabling clock on downlink 2
10:35:10:elinks:INFO:	Disabling clock on downlink 3
10:35:10:elinks:INFO:	Disabling clock on downlink 4
10:35:10:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:35:10:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:35:10:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:35:10:elinks:INFO:	Disabling clock on downlink 0
10:35:10:elinks:INFO:	Disabling clock on downlink 1
10:35:10:elinks:INFO:	Disabling clock on downlink 2
10:35:10:elinks:INFO:	Disabling clock on downlink 3
10:35:10:elinks:INFO:	Disabling clock on downlink 4
10:35:10:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:35:10:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:35:10:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:35:10:elinks:INFO:	Disabling clock on downlink 0
10:35:10:elinks:INFO:	Disabling clock on downlink 1
10:35:10:elinks:INFO:	Disabling clock on downlink 2
10:35:10:elinks:INFO:	Disabling clock on downlink 3
10:35:10:elinks:INFO:	Disabling clock on downlink 4
10:35:10:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:35:10:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:35:10:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:35:10:elinks:INFO:	Disabling clock on downlink 0
10:35:10:elinks:INFO:	Disabling clock on downlink 1
10:35:10:elinks:INFO:	Disabling clock on downlink 2
10:35:10:elinks:INFO:	Disabling clock on downlink 3
10:35:10:elinks:INFO:	Disabling clock on downlink 4
10:35:10:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:35:10:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:35:11:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 16
10:35:11:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 17
10:35:11:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 18
10:35:11:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 19
10:35:11:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 20
10:35:11:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 21
10:35:11:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 22
10:35:11:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 23
10:35:11:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 24
10:35:11:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 25
10:35:11:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 26
10:35:11:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 27
10:35:11:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 28
10:35:11:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 29
10:35:11:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 30
10:35:11:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 31
10:35:11:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:35:11:elinks:INFO:	Disabling clock on downlink 0
10:35:11:elinks:INFO:	Disabling clock on downlink 1
10:35:11:elinks:INFO:	Disabling clock on downlink 2
10:35:11:elinks:INFO:	Disabling clock on downlink 3
10:35:11:elinks:INFO:	Disabling clock on downlink 4
10:35:11:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:35:11:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
10:35:11:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:35:11:setup_element:INFO:	Scanning clock phase
10:35:11:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:35:11:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
10:35:11:setup_element:INFO:	Clock phase scan results for group 0, downlink 3
10:35:11:setup_element:INFO:	Eye window for uplink 16: __________________________________________________________________________XXXXX_
Clock Delay: 36
10:35:11:setup_element:INFO:	Eye window for uplink 17: __________________________________________________________________________XXXXX_
Clock Delay: 36
10:35:11:setup_element:INFO:	Eye window for uplink 18: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:35:11:setup_element:INFO:	Eye window for uplink 19: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:35:11:setup_element:INFO:	Eye window for uplink 20: ________________________________________________________________________XXXXX___
Clock Delay: 34
10:35:11:setup_element:INFO:	Eye window for uplink 21: ________________________________________________________________________XXXXX___
Clock Delay: 34
10:35:11:setup_element:INFO:	Eye window for uplink 22: _________________________________________________________________________XXXXXX_
Clock Delay: 35
10:35:11:setup_element:INFO:	Eye window for uplink 23: _________________________________________________________________________XXXXXX_
Clock Delay: 35
10:35:11:setup_element:INFO:	Eye window for uplink 24: _______________________________________________________________________XXXXX____
Clock Delay: 33
10:35:11:setup_element:INFO:	Eye window for uplink 25: _______________________________________________________________________XXXXX____
Clock Delay: 33
10:35:11:setup_element:INFO:	Eye window for uplink 26: _______________________________________________________________________XXXXX____
Clock Delay: 33
10:35:11:setup_element:INFO:	Eye window for uplink 27: _______________________________________________________________________XXXXX____
Clock Delay: 33
10:35:11:setup_element:INFO:	Eye window for uplink 28: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:35:11:setup_element:INFO:	Eye window for uplink 29: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:35:11:setup_element:INFO:	Eye window for uplink 30: __________________________________________________________________________XXXX__
Clock Delay: 35
10:35:11:setup_element:INFO:	Eye window for uplink 31: __________________________________________________________________________XXXX__
Clock Delay: 35
10:35:11:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 3
10:35:11:setup_element:INFO:	Scanning data phases
10:35:11:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:35:11:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
10:35:16:setup_element:INFO:	Data phase scan results for group 0, downlink 3
10:35:16:setup_element:INFO:	Eye window for uplink 16: __________XXXXXXX_______________________
Data delay found: 33
10:35:16:setup_element:INFO:	Eye window for uplink 17: _______XXXXX____________________________
Data delay found: 29
10:35:16:setup_element:INFO:	Eye window for uplink 18: _______XXXXX____________________________
Data delay found: 29
10:35:16:setup_element:INFO:	Eye window for uplink 19: ____XXXXX_______________________________
Data delay found: 26
10:35:16:setup_element:INFO:	Eye window for uplink 20: __XXXX__________________________________
Data delay found: 23
10:35:16:setup_element:INFO:	Eye window for uplink 21: XXXX__________________________________XX
Data delay found: 20
10:35:16:setup_element:INFO:	Eye window for uplink 22: __XXXXX_________________________________
Data delay found: 24
10:35:16:setup_element:INFO:	Eye window for uplink 23: XX__________________________________XXXX
Data delay found: 18
10:35:16:setup_element:INFO:	Eye window for uplink 24: _____________________________XXXXX______
Data delay found: 11
10:35:16:setup_element:INFO:	Eye window for uplink 25: _________________________________XXXXX__
Data delay found: 15
10:35:16:setup_element:INFO:	Eye window for uplink 26: ___________________________XXXXX________
Data delay found: 9
10:35:16:setup_element:INFO:	Eye window for uplink 27: ________________________________XXXXXXX_
Data delay found: 15
10:35:16:setup_element:INFO:	Eye window for uplink 28: _______________________________XXXXX____
Data delay found: 13
10:35:16:setup_element:INFO:	Eye window for uplink 29: __________________________________XXXXX_
Data delay found: 16
10:35:16:setup_element:INFO:	Eye window for uplink 30: ________________________________XXXXXX__
Data delay found: 14
10:35:16:setup_element:INFO:	Eye window for uplink 31: _________________________________XXX____
Data delay found: 14
10:35:16:setup_element:INFO:	Setting the data phase to 33 for uplink 16
10:35:16:setup_element:INFO:	Setting the data phase to 29 for uplink 17
10:35:16:setup_element:INFO:	Setting the data phase to 29 for uplink 18
10:35:16:setup_element:INFO:	Setting the data phase to 26 for uplink 19
10:35:16:setup_element:INFO:	Setting the data phase to 23 for uplink 20
10:35:16:setup_element:INFO:	Setting the data phase to 20 for uplink 21
10:35:16:setup_element:INFO:	Setting the data phase to 24 for uplink 22
10:35:16:setup_element:INFO:	Setting the data phase to 18 for uplink 23
10:35:16:setup_element:INFO:	Setting the data phase to 11 for uplink 24
10:35:16:setup_element:INFO:	Setting the data phase to 15 for uplink 25
10:35:16:setup_element:INFO:	Setting the data phase to 9 for uplink 26
10:35:16:setup_element:INFO:	Setting the data phase to 15 for uplink 27
10:35:16:setup_element:INFO:	Setting the data phase to 13 for uplink 28
10:35:16:setup_element:INFO:	Setting the data phase to 16 for uplink 29
10:35:16:setup_element:INFO:	Setting the data phase to 14 for uplink 30
10:35:16:setup_element:INFO:	Setting the data phase to 14 for uplink 31
10:35:16:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 3
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 72
    Eye Windows:
      Uplink 16: __________________________________________________________________________XXXXX_
      Uplink 17: __________________________________________________________________________XXXXX_
      Uplink 18: ________________________________________________________________________XXXXXX__
      Uplink 19: ________________________________________________________________________XXXXXX__
      Uplink 20: ________________________________________________________________________XXXXX___
      Uplink 21: ________________________________________________________________________XXXXX___
      Uplink 22: _________________________________________________________________________XXXXXX_
      Uplink 23: _________________________________________________________________________XXXXXX_
      Uplink 24: _______________________________________________________________________XXXXX____
      Uplink 25: _______________________________________________________________________XXXXX____
      Uplink 26: _______________________________________________________________________XXXXX____
      Uplink 27: _______________________________________________________________________XXXXX____
      Uplink 28: ________________________________________________________________________XXXXXX__
      Uplink 29: ________________________________________________________________________XXXXXX__
      Uplink 30: __________________________________________________________________________XXXX__
      Uplink 31: __________________________________________________________________________XXXX__
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 33
      Window Length: 33
      Eye Window: __________XXXXXXX_______________________
    Uplink 17:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 18:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 19:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 20:
      Optimal Phase: 23
      Window Length: 36
      Eye Window: __XXXX__________________________________
    Uplink 21:
      Optimal Phase: 20
      Window Length: 34
      Eye Window: XXXX__________________________________XX
    Uplink 22:
      Optimal Phase: 24
      Window Length: 35
      Eye Window: __XXXXX_________________________________
    Uplink 23:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 24:
      Optimal Phase: 11
      Window Length: 35
      Eye Window: _____________________________XXXXX______
    Uplink 25:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 26:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 27:
      Optimal Phase: 15
      Window Length: 33
      Eye Window: ________________________________XXXXXXX_
    Uplink 28:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 29:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 30:
      Optimal Phase: 14
      Window Length: 34
      Eye Window: ________________________________XXXXXX__
    Uplink 31:
      Optimal Phase: 14
      Window Length: 37
      Eye Window: _________________________________XXX____
]
10:35:16:setup_element:INFO:	Beginning SMX ASICs map scan
10:35:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:35:16:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
10:35:16:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [3]
10:35:16:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [3]
10:35:16:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:35:16:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 17
10:35:16:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 16
10:35:17:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 24
10:35:17:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 25
10:35:17:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 19
10:35:17:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 18
10:35:17:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 26
10:35:17:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 27
10:35:17:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 21
10:35:17:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 20
10:35:17:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 28
10:35:17:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 29
10:35:17:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 23
10:35:18:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 22
10:35:18:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 30
10:35:18:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 31
10:35:19:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 3
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 24), (1, 25)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 30), (1, 31)
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 72
    Eye Windows:
      Uplink 16: __________________________________________________________________________XXXXX_
      Uplink 17: __________________________________________________________________________XXXXX_
      Uplink 18: ________________________________________________________________________XXXXXX__
      Uplink 19: ________________________________________________________________________XXXXXX__
      Uplink 20: ________________________________________________________________________XXXXX___
      Uplink 21: ________________________________________________________________________XXXXX___
      Uplink 22: _________________________________________________________________________XXXXXX_
      Uplink 23: _________________________________________________________________________XXXXXX_
      Uplink 24: _______________________________________________________________________XXXXX____
      Uplink 25: _______________________________________________________________________XXXXX____
      Uplink 26: _______________________________________________________________________XXXXX____
      Uplink 27: _______________________________________________________________________XXXXX____
      Uplink 28: ________________________________________________________________________XXXXXX__
      Uplink 29: ________________________________________________________________________XXXXXX__
      Uplink 30: __________________________________________________________________________XXXX__
      Uplink 31: __________________________________________________________________________XXXX__
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 33
      Window Length: 33
      Eye Window: __________XXXXXXX_______________________
    Uplink 17:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 18:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 19:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 20:
      Optimal Phase: 23
      Window Length: 36
      Eye Window: __XXXX__________________________________
    Uplink 21:
      Optimal Phase: 20
      Window Length: 34
      Eye Window: XXXX__________________________________XX
    Uplink 22:
      Optimal Phase: 24
      Window Length: 35
      Eye Window: __XXXXX_________________________________
    Uplink 23:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 24:
      Optimal Phase: 11
      Window Length: 35
      Eye Window: _____________________________XXXXX______
    Uplink 25:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 26:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 27:
      Optimal Phase: 15
      Window Length: 33
      Eye Window: ________________________________XXXXXXX_
    Uplink 28:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 29:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 30:
      Optimal Phase: 14
      Window Length: 34
      Eye Window: ________________________________XXXXXX__
    Uplink 31:
      Optimal Phase: 14
      Window Length: 37
      Eye Window: _________________________________XXX____

10:35:19:setup_element:INFO:	Performing Elink synchronization
10:35:19:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:35:19:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
10:35:19:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [3]
10:35:19:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [3]
10:35:19:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 3
10:35:19:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:35:19:ST3_emu:INFO:	Number of chips: 8
10:35:19:ST3_emu:INFO:	Chip address:  	0x0
10:35:19:ST3_emu:INFO:	Chip address:  	0x1
10:35:19:ST3_emu:INFO:	Chip address:  	0x2
10:35:19:ST3_emu:INFO:	Chip address:  	0x3
10:35:19:ST3_emu:INFO:	Chip address:  	0x4
10:35:19:ST3_emu:INFO:	Chip address:  	0x5
10:35:19:ST3_emu:INFO:	Chip address:  	0x6
10:35:19:ST3_emu:INFO:	Chip address:  	0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_0
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_1
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_2 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_2
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_3
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_4
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_5
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_6
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
10:35:20:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:35:21:febtest:INFO:	0-0 | XA-000-08-003-000-002-227-06 |  12.4 | 1282.9
10:35:21:febtest:INFO:	0-1 | XA-000-08-003-000-002-229-06 |  31.4 | 1218.6
10:35:21:febtest:INFO:	0-2 | XA-000-08-003-000-002-230-06 |  31.4 | 1206.9
10:35:21:febtest:INFO:	0-3 | XA-000-08-003-000-000-140-14 |  56.8 | 1118.1
10:35:21:febtest:INFO:	0-4 | XA-000-08-003-000-000-139-14 |  44.1 | 1171.5
10:35:22:febtest:INFO:	0-5 | XA-000-08-001-064-042-064-12 |  40.9 | 1189.2
10:35:22:febtest:INFO:	0-6 | XA-000-08-003-000-002-228-06 |  37.7 | 1189.2
10:35:22:febtest:INFO:	0-7 | XA-000-08-001-064-042-056-00 |  34.6 | 1201.0
10:35:22:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:35:26:ST3_smx:INFO:	chip: 0-0 	 21.902970 C 	 1236.187875 mV
10:35:26:ST3_smx:INFO:	# loops 0
10:35:28:ST3_smx:INFO:	# loops 1
10:35:30:ST3_smx:INFO:	# loops 2
10:35:32:ST3_smx:INFO:	# loops 3
10:35:34:ST3_smx:INFO:	# loops 4
10:35:36:ST3_smx:INFO:	Total # of broken channels: 0
10:35:36:ST3_smx:INFO:	List of broken channels: []
10:35:36:ST3_smx:INFO:	Total # of broken channels: 0
10:35:36:ST3_smx:INFO:	List of broken channels: []
10:35:37:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:35:40:ST3_smx:INFO:	chip: 0-1 	 31.389742 C 	 1195.082160 mV
10:35:40:ST3_smx:INFO:	# loops 0
10:35:42:ST3_smx:INFO:	# loops 1
10:35:44:ST3_smx:INFO:	# loops 2
10:35:45:ST3_smx:INFO:	# loops 3
10:35:47:ST3_smx:INFO:	# loops 4
10:35:49:ST3_smx:INFO:	Total # of broken channels: 0
10:35:49:ST3_smx:INFO:	List of broken channels: []
10:35:49:ST3_smx:INFO:	Total # of broken channels: 0
10:35:49:ST3_smx:INFO:	List of broken channels: []
10:35:50:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:35:54:ST3_smx:INFO:	chip: 0-2 	 37.726682 C 	 1171.483840 mV
10:35:54:ST3_smx:INFO:	# loops 0
10:35:55:ST3_smx:INFO:	# loops 1
10:35:57:ST3_smx:INFO:	# loops 2
10:35:59:ST3_smx:INFO:	# loops 3
10:36:00:ST3_smx:INFO:	# loops 4
10:36:02:ST3_smx:INFO:	Total # of broken channels: 0
10:36:02:ST3_smx:INFO:	List of broken channels: []
10:36:02:ST3_smx:INFO:	Total # of broken channels: 0
10:36:02:ST3_smx:INFO:	List of broken channels: []
10:36:03:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:36:06:ST3_smx:INFO:	chip: 0-3 	 53.612520 C 	 1118.096875 mV
10:36:06:ST3_smx:INFO:	# loops 0
10:36:08:ST3_smx:INFO:	# loops 1
10:36:09:ST3_smx:INFO:	# loops 2
10:36:11:ST3_smx:INFO:	# loops 3
10:36:13:ST3_smx:INFO:	# loops 4
10:36:14:ST3_smx:INFO:	Total # of broken channels: 0
10:36:14:ST3_smx:INFO:	List of broken channels: []
10:36:14:ST3_smx:INFO:	Total # of broken channels: 2
10:36:14:ST3_smx:INFO:	List of broken channels: [93, 105]
10:36:15:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:36:19:ST3_smx:INFO:	chip: 0-4 	 47.250730 C 	 1147.806000 mV
10:36:19:ST3_smx:INFO:	# loops 0
10:36:20:ST3_smx:INFO:	# loops 1
10:36:22:ST3_smx:INFO:	# loops 2
10:36:24:ST3_smx:INFO:	# loops 3
10:36:25:ST3_smx:INFO:	# loops 4
10:36:27:ST3_smx:INFO:	Total # of broken channels: 51
10:36:27:ST3_smx:INFO:	List of broken channels: [6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 64, 66, 70, 72, 74, 76, 78, 80, 82, 84, 86, 88, 90, 92, 94, 96, 98, 100, 102, 104, 106, 108, 110, 116]
10:36:27:ST3_smx:INFO:	Total # of broken channels: 61
10:36:27:ST3_smx:INFO:	List of broken channels: [0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 66, 68, 70, 72, 74, 76, 78, 80, 82, 84, 86, 88, 90, 92, 94, 96, 98, 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120]
10:36:28:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:36:32:ST3_smx:INFO:	chip: 0-5 	 40.898880 C 	 1171.483840 mV
10:36:32:ST3_smx:INFO:	# loops 0
10:36:34:ST3_smx:INFO:	# loops 1
10:36:35:ST3_smx:INFO:	# loops 2
10:36:37:ST3_smx:INFO:	# loops 3
10:36:39:ST3_smx:INFO:	# loops 4
10:36:40:ST3_smx:INFO:	Total # of broken channels: 0
10:36:40:ST3_smx:INFO:	List of broken channels: []
10:36:40:ST3_smx:INFO:	Total # of broken channels: 0
10:36:40:ST3_smx:INFO:	List of broken channels: []
10:36:41:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:36:45:ST3_smx:INFO:	chip: 0-6 	 34.556970 C 	 1183.292940 mV
10:36:45:ST3_smx:INFO:	# loops 0
10:36:47:ST3_smx:INFO:	# loops 1
10:36:49:ST3_smx:INFO:	# loops 2
10:36:50:ST3_smx:INFO:	# loops 3
10:36:52:ST3_smx:INFO:	# loops 4
10:36:54:ST3_smx:INFO:	Total # of broken channels: 0
10:36:54:ST3_smx:INFO:	List of broken channels: []
10:36:54:ST3_smx:INFO:	Total # of broken channels: 1
10:36:54:ST3_smx:INFO:	List of broken channels: [120]
10:36:54:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:36:58:ST3_smx:INFO:	chip: 0-7 	 28.225000 C 	 1212.728715 mV
10:36:58:ST3_smx:INFO:	# loops 0
10:37:00:ST3_smx:INFO:	# loops 1
10:37:01:ST3_smx:INFO:	# loops 2
10:37:03:ST3_smx:INFO:	# loops 3
10:37:05:ST3_smx:INFO:	# loops 4
10:37:06:ST3_smx:INFO:	Total # of broken channels: 0
10:37:06:ST3_smx:INFO:	List of broken channels: []
10:37:06:ST3_smx:INFO:	Total # of broken channels: 0
10:37:06:ST3_smx:INFO:	List of broken channels: []
10:37:07:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:37:07:febtest:INFO:	0-0 | XA-000-08-003-000-002-227-06 |  21.9 | 1224.5
10:37:08:febtest:INFO:	0-1 | XA-000-08-003-000-002-229-06 |  34.6 | 1183.3
10:37:08:febtest:INFO:	0-2 | XA-000-08-003-000-002-230-06 |  37.7 | 1159.7
10:37:08:febtest:INFO:	0-3 | XA-000-08-003-000-000-140-14 |  53.6 | 1112.1
10:37:08:febtest:INFO:	0-4 | XA-000-08-003-000-000-139-14 |  47.3 | 1141.9
10:37:08:febtest:INFO:	0-5 | XA-000-08-001-064-042-064-12 |  40.9 | 1165.6
10:37:09:febtest:INFO:	0-6 | XA-000-08-003-000-002-228-06 |  34.6 | 1183.3
10:37:09:febtest:INFO:	0-7 | XA-000-08-001-064-042-056-00 |  28.2 | 1206.9
10:37:38:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:37:38:ST3_Shared:INFO:	--------------------------FEB-ASIC--------------------------
10:37:38:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:37:38:febtest:INFO:	Tsting FEB with SN 2019
10:37:40:smx_tester:INFO:	Scanning setup
10:37:40:elinks:INFO:	Disabling clock on downlink 0
10:37:40:elinks:INFO:	Disabling clock on downlink 1
10:37:40:elinks:INFO:	Disabling clock on downlink 2
10:37:40:elinks:INFO:	Disabling clock on downlink 3
10:37:40:elinks:INFO:	Disabling clock on downlink 4
10:37:40:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:37:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:37:40:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:37:40:elinks:INFO:	Disabling clock on downlink 0
10:37:40:elinks:INFO:	Disabling clock on downlink 1
10:37:40:elinks:INFO:	Disabling clock on downlink 2
10:37:40:elinks:INFO:	Disabling clock on downlink 3
10:37:40:elinks:INFO:	Disabling clock on downlink 4
10:37:40:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:37:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:37:40:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:37:40:elinks:INFO:	Disabling clock on downlink 0
10:37:40:elinks:INFO:	Disabling clock on downlink 1
10:37:40:elinks:INFO:	Disabling clock on downlink 2
10:37:40:elinks:INFO:	Disabling clock on downlink 3
10:37:40:elinks:INFO:	Disabling clock on downlink 4
10:37:40:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:37:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:37:40:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:37:40:elinks:INFO:	Disabling clock on downlink 0
10:37:40:elinks:INFO:	Disabling clock on downlink 1
10:37:40:elinks:INFO:	Disabling clock on downlink 2
10:37:40:elinks:INFO:	Disabling clock on downlink 3
10:37:40:elinks:INFO:	Disabling clock on downlink 4
10:37:40:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:37:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:37:40:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 16
10:37:40:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 17
10:37:40:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 18
10:37:40:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 19
10:37:40:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 20
10:37:40:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 21
10:37:40:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 22
10:37:40:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 23
10:37:40:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 24
10:37:40:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 25
10:37:40:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 26
10:37:40:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 27
10:37:40:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 28
10:37:40:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 29
10:37:40:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 30
10:37:40:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 31
10:37:40:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:37:40:elinks:INFO:	Disabling clock on downlink 0
10:37:40:elinks:INFO:	Disabling clock on downlink 1
10:37:40:elinks:INFO:	Disabling clock on downlink 2
10:37:40:elinks:INFO:	Disabling clock on downlink 3
10:37:40:elinks:INFO:	Disabling clock on downlink 4
10:37:40:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:37:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
10:37:40:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:37:40:setup_element:INFO:	Scanning clock phase
10:37:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:37:41:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
10:37:41:setup_element:INFO:	Clock phase scan results for group 0, downlink 3
10:37:41:setup_element:INFO:	Eye window for uplink 16: __________________________________________________________________________XXXXX_
Clock Delay: 36
10:37:41:setup_element:INFO:	Eye window for uplink 17: __________________________________________________________________________XXXXX_
Clock Delay: 36
10:37:41:setup_element:INFO:	Eye window for uplink 18: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:37:41:setup_element:INFO:	Eye window for uplink 19: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:37:41:setup_element:INFO:	Eye window for uplink 20: ________________________________________________________________________XXXXX___
Clock Delay: 34
10:37:41:setup_element:INFO:	Eye window for uplink 21: ________________________________________________________________________XXXXX___
Clock Delay: 34
10:37:41:setup_element:INFO:	Eye window for uplink 22: _________________________________________________________________________XXXXXX_
Clock Delay: 35
10:37:41:setup_element:INFO:	Eye window for uplink 23: _________________________________________________________________________XXXXXX_
Clock Delay: 35
10:37:41:setup_element:INFO:	Eye window for uplink 24: _______________________________________________________________________XXXXXX___
Clock Delay: 33
10:37:41:setup_element:INFO:	Eye window for uplink 25: _______________________________________________________________________XXXXXX___
Clock Delay: 33
10:37:41:setup_element:INFO:	Eye window for uplink 26: _______________________________________________________________________XXXXXX___
Clock Delay: 33
10:37:41:setup_element:INFO:	Eye window for uplink 27: _______________________________________________________________________XXXXXX___
Clock Delay: 33
10:37:41:setup_element:INFO:	Eye window for uplink 28: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:37:41:setup_element:INFO:	Eye window for uplink 29: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:37:41:setup_element:INFO:	Eye window for uplink 30: __________________________________________________________________________XXXX__
Clock Delay: 35
10:37:41:setup_element:INFO:	Eye window for uplink 31: __________________________________________________________________________XXXX__
Clock Delay: 35
10:37:41:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 3
10:37:41:setup_element:INFO:	Scanning data phases
10:37:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:37:41:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
10:37:46:setup_element:INFO:	Data phase scan results for group 0, downlink 3
10:37:46:setup_element:INFO:	Eye window for uplink 16: __________XXXXXXX_______________________
Data delay found: 33
10:37:46:setup_element:INFO:	Eye window for uplink 17: _______XXXXX____________________________
Data delay found: 29
10:37:46:setup_element:INFO:	Eye window for uplink 18: _______XXXXX____________________________
Data delay found: 29
10:37:46:setup_element:INFO:	Eye window for uplink 19: ____XXXXX_______________________________
Data delay found: 26
10:37:46:setup_element:INFO:	Eye window for uplink 20: __XXXXX_________________________________
Data delay found: 24
10:37:46:setup_element:INFO:	Eye window for uplink 21: XXXX___________________________________X
Data delay found: 21
10:37:46:setup_element:INFO:	Eye window for uplink 22: __XXXX__________________________________
Data delay found: 23
10:37:46:setup_element:INFO:	Eye window for uplink 23: XX__________________________________XXXX
Data delay found: 18
10:37:46:setup_element:INFO:	Eye window for uplink 24: _____________________________XXXXX______
Data delay found: 11
10:37:46:setup_element:INFO:	Eye window for uplink 25: _________________________________XXXXX__
Data delay found: 15
10:37:46:setup_element:INFO:	Eye window for uplink 26: ___________________________XXXXX________
Data delay found: 9
10:37:46:setup_element:INFO:	Eye window for uplink 27: _______________________________XXXXXXX__
Data delay found: 14
10:37:46:setup_element:INFO:	Eye window for uplink 28: _______________________________XXXXX____
Data delay found: 13
10:37:46:setup_element:INFO:	Eye window for uplink 29: ___________________________________XXXX_
Data delay found: 16
10:37:46:setup_element:INFO:	Eye window for uplink 30: _______________________________XXXXXXX__
Data delay found: 14
10:37:46:setup_element:INFO:	Eye window for uplink 31: _________________________________XXXX___
Data delay found: 14
10:37:46:setup_element:INFO:	Setting the data phase to 33 for uplink 16
10:37:46:setup_element:INFO:	Setting the data phase to 29 for uplink 17
10:37:46:setup_element:INFO:	Setting the data phase to 29 for uplink 18
10:37:46:setup_element:INFO:	Setting the data phase to 26 for uplink 19
10:37:46:setup_element:INFO:	Setting the data phase to 24 for uplink 20
10:37:46:setup_element:INFO:	Setting the data phase to 21 for uplink 21
10:37:46:setup_element:INFO:	Setting the data phase to 23 for uplink 22
10:37:46:setup_element:INFO:	Setting the data phase to 18 for uplink 23
10:37:46:setup_element:INFO:	Setting the data phase to 11 for uplink 24
10:37:46:setup_element:INFO:	Setting the data phase to 15 for uplink 25
10:37:46:setup_element:INFO:	Setting the data phase to 9 for uplink 26
10:37:46:setup_element:INFO:	Setting the data phase to 14 for uplink 27
10:37:46:setup_element:INFO:	Setting the data phase to 13 for uplink 28
10:37:46:setup_element:INFO:	Setting the data phase to 16 for uplink 29
10:37:46:setup_element:INFO:	Setting the data phase to 14 for uplink 30
10:37:46:setup_element:INFO:	Setting the data phase to 14 for uplink 31
10:37:46:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 3
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 72
    Eye Windows:
      Uplink 16: __________________________________________________________________________XXXXX_
      Uplink 17: __________________________________________________________________________XXXXX_
      Uplink 18: ________________________________________________________________________XXXXXX__
      Uplink 19: ________________________________________________________________________XXXXXX__
      Uplink 20: ________________________________________________________________________XXXXX___
      Uplink 21: ________________________________________________________________________XXXXX___
      Uplink 22: _________________________________________________________________________XXXXXX_
      Uplink 23: _________________________________________________________________________XXXXXX_
      Uplink 24: _______________________________________________________________________XXXXXX___
      Uplink 25: _______________________________________________________________________XXXXXX___
      Uplink 26: _______________________________________________________________________XXXXXX___
      Uplink 27: _______________________________________________________________________XXXXXX___
      Uplink 28: ________________________________________________________________________XXXXXX__
      Uplink 29: ________________________________________________________________________XXXXXX__
      Uplink 30: __________________________________________________________________________XXXX__
      Uplink 31: __________________________________________________________________________XXXX__
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 33
      Window Length: 33
      Eye Window: __________XXXXXXX_______________________
    Uplink 17:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 18:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 19:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 20:
      Optimal Phase: 24
      Window Length: 35
      Eye Window: __XXXXX_________________________________
    Uplink 21:
      Optimal Phase: 21
      Window Length: 35
      Eye Window: XXXX___________________________________X
    Uplink 22:
      Optimal Phase: 23
      Window Length: 36
      Eye Window: __XXXX__________________________________
    Uplink 23:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 24:
      Optimal Phase: 11
      Window Length: 35
      Eye Window: _____________________________XXXXX______
    Uplink 25:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 26:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 27:
      Optimal Phase: 14
      Window Length: 33
      Eye Window: _______________________________XXXXXXX__
    Uplink 28:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 29:
      Optimal Phase: 16
      Window Length: 36
      Eye Window: ___________________________________XXXX_
    Uplink 30:
      Optimal Phase: 14
      Window Length: 33
      Eye Window: _______________________________XXXXXXX__
    Uplink 31:
      Optimal Phase: 14
      Window Length: 36
      Eye Window: _________________________________XXXX___
]
10:37:46:setup_element:INFO:	Beginning SMX ASICs map scan
10:37:46:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:37:46:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
10:37:46:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [3]
10:37:46:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [3]
10:37:46:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:37:46:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 17
10:37:46:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 16
10:37:46:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 24
10:37:46:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 25
10:37:47:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 19
10:37:47:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 18
10:37:47:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 26
10:37:47:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 27
10:37:47:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 21
10:37:47:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 20
10:37:47:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 28
10:37:47:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 29
10:37:47:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 23
10:37:47:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 22
10:37:48:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 30
10:37:48:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 31
10:37:49:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 3
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 24), (1, 25)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 30), (1, 31)
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 72
    Eye Windows:
      Uplink 16: __________________________________________________________________________XXXXX_
      Uplink 17: __________________________________________________________________________XXXXX_
      Uplink 18: ________________________________________________________________________XXXXXX__
      Uplink 19: ________________________________________________________________________XXXXXX__
      Uplink 20: ________________________________________________________________________XXXXX___
      Uplink 21: ________________________________________________________________________XXXXX___
      Uplink 22: _________________________________________________________________________XXXXXX_
      Uplink 23: _________________________________________________________________________XXXXXX_
      Uplink 24: _______________________________________________________________________XXXXXX___
      Uplink 25: _______________________________________________________________________XXXXXX___
      Uplink 26: _______________________________________________________________________XXXXXX___
      Uplink 27: _______________________________________________________________________XXXXXX___
      Uplink 28: ________________________________________________________________________XXXXXX__
      Uplink 29: ________________________________________________________________________XXXXXX__
      Uplink 30: __________________________________________________________________________XXXX__
      Uplink 31: __________________________________________________________________________XXXX__
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 33
      Window Length: 33
      Eye Window: __________XXXXXXX_______________________
    Uplink 17:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 18:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 19:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 20:
      Optimal Phase: 24
      Window Length: 35
      Eye Window: __XXXXX_________________________________
    Uplink 21:
      Optimal Phase: 21
      Window Length: 35
      Eye Window: XXXX___________________________________X
    Uplink 22:
      Optimal Phase: 23
      Window Length: 36
      Eye Window: __XXXX__________________________________
    Uplink 23:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 24:
      Optimal Phase: 11
      Window Length: 35
      Eye Window: _____________________________XXXXX______
    Uplink 25:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 26:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 27:
      Optimal Phase: 14
      Window Length: 33
      Eye Window: _______________________________XXXXXXX__
    Uplink 28:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 29:
      Optimal Phase: 16
      Window Length: 36
      Eye Window: ___________________________________XXXX_
    Uplink 30:
      Optimal Phase: 14
      Window Length: 33
      Eye Window: _______________________________XXXXXXX__
    Uplink 31:
      Optimal Phase: 14
      Window Length: 36
      Eye Window: _________________________________XXXX___

10:37:49:setup_element:INFO:	Performing Elink synchronization
10:37:49:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:37:49:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
10:37:49:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [3]
10:37:49:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [3]
10:37:49:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 3
10:37:49:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:37:49:ST3_emu:INFO:	Number of chips: 8
10:37:49:ST3_emu:INFO:	Chip address:  	0x0
10:37:49:ST3_emu:INFO:	Chip address:  	0x1
10:37:49:ST3_emu:INFO:	Chip address:  	0x2
10:37:49:ST3_emu:INFO:	Chip address:  	0x3
10:37:49:ST3_emu:INFO:	Chip address:  	0x4
10:37:49:ST3_emu:INFO:	Chip address:  	0x5
10:37:49:ST3_emu:INFO:	Chip address:  	0x6
10:37:49:ST3_emu:INFO:	Chip address:  	0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_0
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_1
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_2 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_2
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_3
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_4
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_5
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_6
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
10:37:50:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:37:50:febtest:INFO:	0-0 | XA-000-08-003-000-002-227-06 |  12.4 | 1282.9
10:37:51:febtest:INFO:	0-1 | XA-000-08-003-000-002-229-06 |  31.4 | 1212.7
10:37:51:febtest:INFO:	0-2 | XA-000-08-003-000-002-230-06 |  34.6 | 1201.0
10:37:51:febtest:INFO:	0-3 | XA-000-08-003-000-000-140-14 |  60.0 | 1124.0
10:37:51:febtest:INFO:	0-4 | XA-000-08-003-000-000-139-14 |  44.1 | 1171.5
10:37:52:febtest:INFO:	0-5 | XA-000-08-001-064-042-064-12 |  40.9 | 1189.2
10:37:52:febtest:INFO:	0-6 | XA-000-08-003-000-002-228-06 |  40.9 | 1183.3
10:37:52:febtest:INFO:	0-7 | XA-000-08-001-064-042-056-00 |  34.6 | 1201.0
10:37:52:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:37:57:ST3_smx:INFO:	chip: 0-0 	 21.902970 C 	 1230.330540 mV
10:37:57:ST3_smx:INFO:	PROCESS 2: Checking channel response with internal pulse
10:37:57:ST3_smx:INFO:		Electrons
10:37:57:ST3_smx:INFO:			Injected pulses: 110LSB, amp_cal 6.160000 fC
10:37:59:ST3_smx:INFO:	----> Checking Analog response
10:37:59:ST3_smx:INFO:	----> Checking broken channels
10:38:00:ST3_smx:INFO:	Total # broken ch: 4
10:38:00:ST3_smx:INFO:	List FAST: [6, 55, 59, 106]
10:38:00:ST3_smx:INFO:	List SLOW: []
10:38:00:ST3_smx:INFO:		Holes
10:38:00:ST3_smx:INFO:			Injected pulses: 110LSB, amp_cal 6.160000 fC
10:38:02:ST3_smx:INFO:	----> Checking Analog response
10:38:02:ST3_smx:INFO:	----> Checking broken channels
10:38:02:ST3_smx:INFO:	Total # broken ch: 4
10:38:02:ST3_smx:INFO:	List FAST: [6, 55, 59, 106]
10:38:02:ST3_smx:INFO:	List SLOW: []
10:38:02:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:38:03:febtest:INFO:	0-0 | XA-000-08-003-000-002-227-06 |  21.9 | 1230.3
10:38:03:febtest:INFO:	0-1 | XA-000-08-003-000-002-229-06 |  31.4 | 1212.7
10:38:03:febtest:INFO:	0-2 | XA-000-08-003-000-002-230-06 |  34.6 | 1201.0
10:38:03:febtest:INFO:	0-3 | XA-000-08-003-000-000-140-14 |  56.8 | 1124.0
10:38:03:febtest:INFO:	0-4 | XA-000-08-003-000-000-139-14 |  44.1 | 1171.5
10:38:04:febtest:INFO:	0-5 | XA-000-08-001-064-042-064-12 |  40.9 | 1189.2
10:38:04:febtest:INFO:	0-6 | XA-000-08-003-000-002-228-06 |  40.9 | 1183.3
10:38:04:febtest:INFO:	0-7 | XA-000-08-001-064-042-056-00 |  34.6 | 1201.0
10:38:05:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:38:09:ST3_smx:INFO:	chip: 0-1 	 34.556970 C 	 1189.190035 mV
10:38:09:ST3_smx:INFO:	PROCESS 2: Checking channel response with internal pulse
10:38:09:ST3_smx:INFO:		Electrons
10:38:09:ST3_smx:INFO:			Injected pulses: 110LSB, amp_cal 6.160000 fC
10:38:12:ST3_smx:INFO:	----> Checking Analog response
10:38:12:ST3_smx:INFO:	----> Checking broken channels
10:38:12:ST3_smx:INFO:	Total # broken ch: 2
10:38:12:ST3_smx:INFO:	List FAST: [76, 86]
10:38:12:ST3_smx:INFO:	List SLOW: []
10:38:12:ST3_smx:INFO:		Holes
10:38:12:ST3_smx:INFO:			Injected pulses: 110LSB, amp_cal 6.160000 fC
10:38:14:ST3_smx:INFO:	----> Checking Analog response
10:38:14:ST3_smx:INFO:	----> Checking broken channels
10:38:15:ST3_smx:INFO:	Total # broken ch: 2
10:38:15:ST3_smx:INFO:	List FAST: [76, 86]
10:38:15:ST3_smx:INFO:	List SLOW: []
10:38:15:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:38:15:febtest:INFO:	0-0 | XA-000-08-003-000-002-227-06 |  25.1 | 1230.3
10:38:15:febtest:INFO:	0-1 | XA-000-08-003-000-002-229-06 |  34.6 | 1189.2
10:38:15:febtest:INFO:	0-2 | XA-000-08-003-000-002-230-06 |  34.6 | 1201.0
10:38:16:febtest:INFO:	0-3 | XA-000-08-003-000-000-140-14 |  56.8 | 1118.1
10:38:16:febtest:INFO:	0-4 | XA-000-08-003-000-000-139-14 |  44.1 | 1165.6
10:38:16:febtest:INFO:	0-5 | XA-000-08-001-064-042-064-12 |  40.9 | 1189.2
10:38:16:febtest:INFO:	0-6 | XA-000-08-003-000-002-228-06 |  40.9 | 1189.2
10:38:16:febtest:INFO:	0-7 | XA-000-08-001-064-042-056-00 |  37.7 | 1201.0
10:38:17:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:38:22:ST3_smx:INFO:	chip: 0-2 	 40.898880 C 	 1171.483840 mV
10:38:22:ST3_smx:INFO:	PROCESS 2: Checking channel response with internal pulse
10:38:22:ST3_smx:INFO:		Electrons
10:38:22:ST3_smx:INFO:			Injected pulses: 110LSB, amp_cal 6.160000 fC
10:38:24:ST3_smx:INFO:	----> Checking Analog response
10:38:24:ST3_smx:INFO:	----> Checking broken channels
10:38:24:ST3_smx:INFO:	Total # broken ch: 2
10:38:24:ST3_smx:INFO:	List FAST: [14, 114]
10:38:24:ST3_smx:INFO:	List SLOW: []
10:38:24:ST3_smx:INFO:		Holes
10:38:24:ST3_smx:INFO:			Injected pulses: 110LSB, amp_cal 6.160000 fC
10:38:27:ST3_smx:INFO:	----> Checking Analog response
10:38:27:ST3_smx:INFO:	----> Checking broken channels
10:38:27:ST3_smx:INFO:	Total # broken ch: 2
10:38:27:ST3_smx:INFO:	List FAST: [14, 114]
10:38:27:ST3_smx:INFO:	List SLOW: []
10:38:27:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:38:27:febtest:INFO:	0-0 | XA-000-08-003-000-002-227-06 |  21.9 | 1230.3
10:38:27:febtest:INFO:	0-1 | XA-000-08-003-000-002-229-06 |  34.6 | 1189.2
10:38:28:febtest:INFO:	0-2 | XA-000-08-003-000-002-230-06 |  40.9 | 1159.7
10:38:28:febtest:INFO:	0-3 | XA-000-08-003-000-000-140-14 |  56.8 | 1118.1
10:38:28:febtest:INFO:	0-4 | XA-000-08-003-000-000-139-14 |  44.1 | 1165.6
10:38:28:febtest:INFO:	0-5 | XA-000-08-001-064-042-064-12 |  40.9 | 1183.3
10:38:29:febtest:INFO:	0-6 | XA-000-08-003-000-002-228-06 |  40.9 | 1183.3
10:38:29:febtest:INFO:	0-7 | XA-000-08-001-064-042-056-00 |  34.6 | 1201.0
10:38:29:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:38:34:ST3_smx:INFO:	chip: 0-3 	 53.612520 C 	 1118.096875 mV
10:38:34:ST3_smx:INFO:	PROCESS 2: Checking channel response with internal pulse
10:38:34:ST3_smx:INFO:		Electrons
10:38:34:ST3_smx:INFO:			Injected pulses: 110LSB, amp_cal 6.160000 fC
10:38:36:ST3_smx:INFO:	----> Checking Analog response
10:38:36:ST3_smx:INFO:	----> Checking broken channels
10:38:37:ST3_smx:INFO:	Total # broken ch: 1
10:38:37:ST3_smx:INFO:	List FAST: [50]
10:38:37:ST3_smx:INFO:	List SLOW: []
10:38:37:ST3_smx:INFO:		Holes
10:38:37:ST3_smx:INFO:			Injected pulses: 110LSB, amp_cal 6.160000 fC
10:38:39:ST3_smx:INFO:	----> Checking Analog response
10:38:39:ST3_smx:INFO:	----> Checking broken channels
10:38:39:ST3_smx:INFO:	Total # broken ch: 1
10:38:39:ST3_smx:INFO:	List FAST: [50]
10:38:39:ST3_smx:INFO:	List SLOW: []
10:38:39:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:38:40:febtest:INFO:	0-0 | XA-000-08-003-000-002-227-06 |  21.9 | 1230.3
10:38:40:febtest:INFO:	0-1 | XA-000-08-003-000-002-229-06 |  34.6 | 1183.3
10:38:40:febtest:INFO:	0-2 | XA-000-08-003-000-002-230-06 |  40.9 | 1165.6
10:38:40:febtest:INFO:	0-3 | XA-000-08-003-000-000-140-14 |  56.8 | 1118.1
10:38:41:febtest:INFO:	0-4 | XA-000-08-003-000-000-139-14 |  44.1 | 1165.6
10:38:41:febtest:INFO:	0-5 | XA-000-08-001-064-042-064-12 |  40.9 | 1183.3
10:38:41:febtest:INFO:	0-6 | XA-000-08-003-000-002-228-06 |  40.9 | 1183.3
10:38:41:febtest:INFO:	0-7 | XA-000-08-001-064-042-056-00 |  34.6 | 1201.0
10:38:42:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:38:47:ST3_smx:INFO:	chip: 0-4 	 47.250730 C 	 1147.806000 mV
10:38:47:ST3_smx:INFO:	PROCESS 2: Checking channel response with internal pulse
10:38:47:ST3_smx:INFO:		Electrons
10:38:47:ST3_smx:INFO:			Injected pulses: 110LSB, amp_cal 6.160000 fC
10:38:49:ST3_smx:INFO:	----> Checking Analog response
10:38:49:ST3_smx:INFO:	----> Checking broken channels
10:38:49:ST3_smx:INFO:	Total # broken ch: 0
10:38:49:ST3_smx:INFO:	List FAST: []
10:38:49:ST3_smx:INFO:	List SLOW: []
10:38:49:ST3_smx:INFO:		Holes
10:38:49:ST3_smx:INFO:			Injected pulses: 110LSB, amp_cal 6.160000 fC
10:38:52:ST3_smx:INFO:	----> Checking Analog response
10:38:52:ST3_smx:INFO:	----> Checking broken channels
10:38:52:ST3_smx:INFO:	Total # broken ch: 0
10:38:52:ST3_smx:INFO:	List FAST: []
10:38:52:ST3_smx:INFO:	List SLOW: []
10:38:52:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:38:53:febtest:INFO:	0-0 | XA-000-08-003-000-002-227-06 |  21.9 | 1224.5
10:38:53:febtest:INFO:	0-1 | XA-000-08-003-000-002-229-06 |  34.6 | 1183.3
10:38:53:febtest:INFO:	0-2 | XA-000-08-003-000-002-230-06 |  40.9 | 1165.6
10:38:53:febtest:INFO:	0-3 | XA-000-08-003-000-000-140-14 |  56.8 | 1118.1
10:38:53:febtest:INFO:	0-4 | XA-000-08-003-000-000-139-14 |  47.3 | 1141.9
10:38:54:febtest:INFO:	0-5 | XA-000-08-001-064-042-064-12 |  40.9 | 1183.3
10:38:54:febtest:INFO:	0-6 | XA-000-08-003-000-002-228-06 |  40.9 | 1183.3
10:38:54:febtest:INFO:	0-7 | XA-000-08-001-064-042-056-00 |  34.6 | 1195.1
10:38:55:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:38:59:ST3_smx:INFO:	chip: 0-5 	 40.898880 C 	 1171.483840 mV
10:38:59:ST3_smx:INFO:	PROCESS 2: Checking channel response with internal pulse
10:38:59:ST3_smx:INFO:		Electrons
10:38:59:ST3_smx:INFO:			Injected pulses: 110LSB, amp_cal 6.160000 fC
10:39:02:ST3_smx:INFO:	----> Checking Analog response
10:39:02:ST3_smx:INFO:	----> Checking broken channels
10:39:02:ST3_smx:INFO:	Total # broken ch: 5
10:39:02:ST3_smx:INFO:	List FAST: [26, 38, 69, 70, 99]
10:39:02:ST3_smx:INFO:	List SLOW: []
10:39:02:ST3_smx:INFO:		Holes
10:39:02:ST3_smx:INFO:			Injected pulses: 110LSB, amp_cal 6.160000 fC
10:39:04:ST3_smx:INFO:	----> Checking Analog response
10:39:04:ST3_smx:INFO:	----> Checking broken channels
10:39:05:ST3_smx:INFO:	Total # broken ch: 5
10:39:05:ST3_smx:INFO:	List FAST: [26, 38, 69, 70, 99]
10:39:05:ST3_smx:INFO:	List SLOW: []
10:39:05:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:39:05:febtest:INFO:	0-0 | XA-000-08-003-000-002-227-06 |  21.9 | 1224.5
10:39:05:febtest:INFO:	0-1 | XA-000-08-003-000-002-229-06 |  34.6 | 1183.3
10:39:05:febtest:INFO:	0-2 | XA-000-08-003-000-002-230-06 |  40.9 | 1159.7
10:39:06:febtest:INFO:	0-3 | XA-000-08-003-000-000-140-14 |  56.8 | 1112.1
10:39:06:febtest:INFO:	0-4 | XA-000-08-003-000-000-139-14 |  47.3 | 1141.9
10:39:06:febtest:INFO:	0-5 | XA-000-08-001-064-042-064-12 |  40.9 | 1165.6
10:39:06:febtest:INFO:	0-6 | XA-000-08-003-000-002-228-06 |  40.9 | 1183.3
10:39:07:febtest:INFO:	0-7 | XA-000-08-001-064-042-056-00 |  37.7 | 1195.1
10:39:07:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:39:12:ST3_smx:INFO:	chip: 0-6 	 34.556970 C 	 1183.292940 mV
10:39:12:ST3_smx:INFO:	PROCESS 2: Checking channel response with internal pulse
10:39:12:ST3_smx:INFO:		Electrons
10:39:12:ST3_smx:INFO:			Injected pulses: 110LSB, amp_cal 6.160000 fC
10:39:14:ST3_smx:INFO:	----> Checking Analog response
10:39:14:ST3_smx:INFO:	----> Checking broken channels
10:39:14:ST3_smx:INFO:	Total # broken ch: 8
10:39:14:ST3_smx:INFO:	List FAST: [1, 17, 33, 47, 63, 108]
10:39:14:ST3_smx:INFO:	List SLOW: [1, 17]
10:39:14:ST3_smx:INFO:		Holes
10:39:14:ST3_smx:INFO:			Injected pulses: 110LSB, amp_cal 6.160000 fC
10:39:17:ST3_smx:INFO:	----> Checking Analog response
10:39:17:ST3_smx:INFO:	----> Checking broken channels
10:39:17:ST3_smx:INFO:	Total # broken ch: 8
10:39:17:ST3_smx:INFO:	List FAST: [1, 17, 33, 47, 63, 108]
10:39:17:ST3_smx:INFO:	List SLOW: [1, 17]
10:39:17:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:39:18:febtest:INFO:	0-0 | XA-000-08-003-000-002-227-06 |  21.9 | 1224.5
10:39:18:febtest:INFO:	0-1 | XA-000-08-003-000-002-229-06 |  34.6 | 1183.3
10:39:18:febtest:INFO:	0-2 | XA-000-08-003-000-002-230-06 |  40.9 | 1159.7
10:39:18:febtest:INFO:	0-3 | XA-000-08-003-000-000-140-14 |  56.8 | 1112.1
10:39:18:febtest:INFO:	0-4 | XA-000-08-003-000-000-139-14 |  47.3 | 1141.9
10:39:19:febtest:INFO:	0-5 | XA-000-08-001-064-042-064-12 |  40.9 | 1165.6
10:39:19:febtest:INFO:	0-6 | XA-000-08-003-000-002-228-06 |  37.7 | 1183.3
10:39:19:febtest:INFO:	0-7 | XA-000-08-001-064-042-056-00 |  37.7 | 1195.1
10:39:20:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:39:24:ST3_smx:INFO:	chip: 0-7 	 28.225000 C 	 1212.728715 mV
10:39:24:ST3_smx:INFO:	PROCESS 2: Checking channel response with internal pulse
10:39:24:ST3_smx:INFO:		Electrons
10:39:24:ST3_smx:INFO:			Injected pulses: 110LSB, amp_cal 6.160000 fC
10:39:27:ST3_smx:INFO:	----> Checking Analog response
10:39:27:ST3_smx:INFO:	----> Checking broken channels
10:39:27:ST3_smx:INFO:	Total # broken ch: 4
10:39:27:ST3_smx:INFO:	List FAST: [26, 55, 99, 105]
10:39:27:ST3_smx:INFO:	List SLOW: []
10:39:27:ST3_smx:INFO:		Holes
10:39:27:ST3_smx:INFO:			Injected pulses: 110LSB, amp_cal 6.160000 fC
10:39:30:ST3_smx:INFO:	----> Checking Analog response
10:39:30:ST3_smx:INFO:	----> Checking broken channels
10:39:30:ST3_smx:INFO:	Total # broken ch: 4
10:39:30:ST3_smx:INFO:	List FAST: [26, 55, 99, 105]
10:39:30:ST3_smx:INFO:	List SLOW: []
10:39:30:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:39:30:febtest:INFO:	0-0 | XA-000-08-003-000-002-227-06 |  21.9 | 1224.5
10:39:31:febtest:INFO:	0-1 | XA-000-08-003-000-002-229-06 |  34.6 | 1183.3
10:39:31:febtest:INFO:	0-2 | XA-000-08-003-000-002-230-06 |  40.9 | 1159.7
10:39:31:febtest:INFO:	0-3 | XA-000-08-003-000-000-140-14 |  56.8 | 1112.1
10:39:31:febtest:INFO:	0-4 | XA-000-08-003-000-000-139-14 |  47.3 | 1141.9
10:39:31:febtest:INFO:	0-5 | XA-000-08-001-064-042-064-12 |  44.1 | 1165.6
10:39:32:febtest:INFO:	0-6 | XA-000-08-003-000-002-228-06 |  37.7 | 1183.3
10:39:32:febtest:INFO:	0-7 | XA-000-08-001-064-042-056-00 |  31.4 | 1206.9
############################################################
#                   S U M M A R Y                          #
############################################################
{'TEST_NAME': 'FEB-ASIC', 'TEST_DATE': '2023_11_22-10_37_38', 'OPERATOR': 'Alois Alzheimer', 'PROJECT': 'Test', 'SITE': 'KIT', 'SETUP': 'KIT_TEST_SETUP_1', 'ASIC_ID': 'XA-000-08-001-064-042-056-00', 'FUSED_ID': 6359364698915382144, 'HW_ADDR': 7, 'VERS_NO': '2.2', 'CABLE_SET_ID': '', 'IC_TEMP': '0', 'VDDM': '0', 'AUX': '0', 'CSABIAS': '0', 'VDDM_INT': '0', 'ADC_Chi2': 0.0, 'ADC_NDF': 0, 'ADC_P0': 0.0, 'ADC_P1': 0.006824, 'ADC_P2': -2.485e-06, 'ADC_P0err': 0.001, 'ADC_P1err': 0.001, 'ADC_P2err': 1e-05, 'ADC_VREF_P': 58, 'ADC_VREF_N': 30, 'ADC_VREF_T': 128, 'ADC_VREF_TR': 122, 'THR2_GLB': 30, 'LOOP__PLS': 100, 'CALIB_PLS': 250, 'SnsLoop': 5, 'IFED': 31, 'CSA_BIAS': 15, 'CSA_Chi2': 0.0, 'CSA_NDF': 0, 'CSA_P0': 0.0, 'CSA_P1': 0.0, 'CSA_P2': 0.0, 'CSA_P0err': 0.0, 'CSA_P1err': 0.0, 'CSA_P2err': 0.0, 'CONF_FAIL_REG': 0, 'N_BROKEN_DISC': 4, 'N_BROKEN_FAST': '[26, 55, 99, 105]', 'N_BROKEN_SLOW': '[]', 'P_BROKEN_DISC': 4, 'P_BROKEN_FAST': '[26, 55, 99, 105]', 'P_BROKEN_SLOW': '[]', 'ASIC_QA_category': '', 'N_BROKEN_CABLE': 0, 'LIST_OF_BROKEN_CABLES': 0, 'VI_bInit': ['2.800', '1.9970', '2.201', '2.7370', '0.000', '0.0000', '7.000', '0.7839'], 'VI_aInit': ['0', '0', '0', '0', '0', '0'], 'VI_atEnd': ['0', '0', '0', '0', '0', '0'], 'AMP_CAL': 110, 'PlsLoop': 3, 'N_ANA_PRESENT': 'Analog response OK', 'N_DISC_FAIL_CH': 0, 'N_ANA_FAIL_CH': '0', 'P_ANA_PRESENT': 'Analog response OK', 'P_DISC_FAIL_CH': 0, 'P_ANA_FAIL_CH': '0'}
===============================

{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

10:39:58:ST3_Shared:INFO:	/home/cbm/public_html/Test_LogDir//FEB/FEB_2019/TestDate_2023_11_22-10_37_38/