
FEB_2019 30.11.23 10:57:50
TextEdit.txt
10:53:15:ST3_hmp4040:INFO: ROHDE&SCHWARZ,HMP4040,110099,HW50020003/SW2.72 10:53:15:febtest:INFO: FEB8.2 selected 10:53:28:smx_tester:INFO: Setting Elink clock mode to 160 MHz 10:53:28:ST3_emu:ERROR: device described in file: ../ST3_BASE/config/feb8_2_devices.xml not found!!! 10:53:32:smx_tester:INFO: Setting Elink clock mode to 160 MHz 10:53:39:febtest:INFO: FEB 8-2 B @ GSI 10:53:45:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 10:53:45:ST3_Shared:INFO: -------------------------FEB-Sensor------------------------- 10:53:45:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 10:56:22:ST3_ModuleSelector:INFO: 10:56:22:ST3_ModuleSelector:INFO: 13152 10:56:22:febtest:INFO: Tsting FEB with SN 2019 10:56:24:smx_tester:INFO: Scanning setup 10:56:24:elinks:INFO: Disabling clock on downlink 0 10:56:24:elinks:INFO: Disabling clock on downlink 1 10:56:24:elinks:INFO: Disabling clock on downlink 2 10:56:24:elinks:INFO: Disabling clock on downlink 3 10:56:24:elinks:INFO: Disabling clock on downlink 4 10:56:24:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:56:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 10:56:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:56:24:elinks:INFO: Disabling clock on downlink 0 10:56:24:elinks:INFO: Disabling clock on downlink 1 10:56:24:elinks:INFO: Disabling clock on downlink 2 10:56:24:elinks:INFO: Disabling clock on downlink 3 10:56:24:elinks:INFO: Disabling clock on downlink 4 10:56:24:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:56:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 10:56:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:56:24:elinks:INFO: Disabling clock on downlink 0 10:56:24:elinks:INFO: Disabling clock on downlink 1 10:56:24:elinks:INFO: Disabling clock on downlink 2 10:56:24:elinks:INFO: Disabling clock on downlink 3 10:56:24:elinks:INFO: Disabling clock on downlink 4 10:56:24:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:56:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:56:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 10:56:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 10:56:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 10:56:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 10:56:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 10:56:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 10:56:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 10:56:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 10:56:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 10:56:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 10:56:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 10:56:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 10:56:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 10:56:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 10:56:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 10:56:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 10:56:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:56:24:elinks:INFO: Disabling clock on downlink 0 10:56:24:elinks:INFO: Disabling clock on downlink 1 10:56:24:elinks:INFO: Disabling clock on downlink 2 10:56:24:elinks:INFO: Disabling clock on downlink 3 10:56:24:elinks:INFO: Disabling clock on downlink 4 10:56:24:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:56:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 10:56:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:56:25:elinks:INFO: Disabling clock on downlink 0 10:56:25:elinks:INFO: Disabling clock on downlink 1 10:56:25:elinks:INFO: Disabling clock on downlink 2 10:56:25:elinks:INFO: Disabling clock on downlink 3 10:56:25:elinks:INFO: Disabling clock on downlink 4 10:56:25:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:56:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 10:56:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:56:25:setup_element:INFO: Scanning clock phase 10:56:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:56:25:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:56:25:setup_element:INFO: Clock phase scan results for group 0, downlink 2 10:56:25:setup_element:INFO: Eye window for uplink 16: _________________________________________________________________________XXXXX__ Clock Delay: 35 10:56:25:setup_element:INFO: Eye window for uplink 17: _________________________________________________________________________XXXXX__ Clock Delay: 35 10:56:25:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________________XXX_____ Clock Delay: 33 10:56:25:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________________XXX_____ Clock Delay: 33 10:56:25:setup_element:INFO: Eye window for uplink 20: _________________________________________________________________________XXXXX__ Clock Delay: 35 10:56:25:setup_element:INFO: Eye window for uplink 21: _________________________________________________________________________XXXXX__ Clock Delay: 35 10:56:25:setup_element:INFO: Eye window for uplink 22: ________________________________________________________________________XXXXXX__ Clock Delay: 34 10:56:25:setup_element:INFO: Eye window for uplink 23: ________________________________________________________________________XXXXXX__ Clock Delay: 34 10:56:25:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXX____ Clock Delay: 32 10:56:25:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXX____ Clock Delay: 32 10:56:25:setup_element:INFO: Eye window for uplink 26: _________________________________________________________________________XXXXX__ Clock Delay: 35 10:56:25:setup_element:INFO: Eye window for uplink 27: _________________________________________________________________________XXXXX__ Clock Delay: 35 10:56:25:setup_element:INFO: Eye window for uplink 28: _________________________________________________________________________XXXXX__ Clock Delay: 35 10:56:25:setup_element:INFO: Eye window for uplink 29: _________________________________________________________________________XXXXX__ Clock Delay: 35 10:56:25:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXX___ Clock Delay: 34 10:56:25:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXX___ Clock Delay: 34 10:56:25:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2 10:56:25:setup_element:INFO: Scanning data phases 10:56:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:56:25:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:56:30:setup_element:INFO: Data phase scan results for group 0, downlink 2 10:56:30:setup_element:INFO: Eye window for uplink 16: X__________________________________XXXXX Data delay found: 17 10:56:30:setup_element:INFO: Eye window for uplink 17: _________________________________XXXX___ Data delay found: 14 10:56:30:setup_element:INFO: Eye window for uplink 18: X___________________________________XXXX Data delay found: 18 10:56:30:setup_element:INFO: Eye window for uplink 19: _________________________________XXXXX__ Data delay found: 15 10:56:30:setup_element:INFO: Eye window for uplink 20: ___________________________________XXXX_ Data delay found: 16 10:56:30:setup_element:INFO: Eye window for uplink 21: _________________________________XXXXX__ Data delay found: 15 10:56:30:setup_element:INFO: Eye window for uplink 22: X___________________________________XXXX Data delay found: 18 10:56:30:setup_element:INFO: Eye window for uplink 23: ________________________________XXXX____ Data delay found: 13 10:56:30:setup_element:INFO: Eye window for uplink 24: _XXXXX_________________________________X Data delay found: 22 10:56:30:setup_element:INFO: Eye window for uplink 25: ____XXXXXX______________________________ Data delay found: 26 10:56:30:setup_element:INFO: Eye window for uplink 26: _____XXXXXX_____________________________ Data delay found: 27 10:56:30:setup_element:INFO: Eye window for uplink 27: __________XXXXXXX_______________________ Data delay found: 33 10:56:30:setup_element:INFO: Eye window for uplink 28: _____________XXXX_______________________ Data delay found: 34 10:56:30:setup_element:INFO: Eye window for uplink 29: ______________XXXXX_____________________ Data delay found: 36 10:56:30:setup_element:INFO: Eye window for uplink 30: __________XXXXXXX_______________________ Data delay found: 33 10:56:30:setup_element:INFO: Eye window for uplink 31: ___________XXXXX________________________ Data delay found: 33 10:56:30:setup_element:INFO: Setting the data phase to 17 for uplink 16 10:56:30:setup_element:INFO: Setting the data phase to 14 for uplink 17 10:56:30:setup_element:INFO: Setting the data phase to 18 for uplink 18 10:56:30:setup_element:INFO: Setting the data phase to 15 for uplink 19 10:56:30:setup_element:INFO: Setting the data phase to 16 for uplink 20 10:56:30:setup_element:INFO: Setting the data phase to 15 for uplink 21 10:56:30:setup_element:INFO: Setting the data phase to 18 for uplink 22 10:56:30:setup_element:INFO: Setting the data phase to 13 for uplink 23 10:56:30:setup_element:INFO: Setting the data phase to 22 for uplink 24 10:56:30:setup_element:INFO: Setting the data phase to 26 for uplink 25 10:56:30:setup_element:INFO: Setting the data phase to 27 for uplink 26 10:56:30:setup_element:INFO: Setting the data phase to 33 for uplink 27 10:56:30:setup_element:INFO: Setting the data phase to 34 for uplink 28 10:56:30:setup_element:INFO: Setting the data phase to 36 for uplink 29 10:56:30:setup_element:INFO: Setting the data phase to 33 for uplink 30 10:56:30:setup_element:INFO: Setting the data phase to 33 for uplink 31 10:56:30:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 33 Window Length: 72 Eye Windows: Uplink 16: _________________________________________________________________________XXXXX__ Uplink 17: _________________________________________________________________________XXXXX__ Uplink 18: ________________________________________________________________________XXX_____ Uplink 19: ________________________________________________________________________XXX_____ Uplink 20: _________________________________________________________________________XXXXX__ Uplink 21: _________________________________________________________________________XXXXX__ Uplink 22: ________________________________________________________________________XXXXXX__ Uplink 23: ________________________________________________________________________XXXXXX__ Uplink 24: ______________________________________________________________________XXXXXX____ Uplink 25: ______________________________________________________________________XXXXXX____ Uplink 26: _________________________________________________________________________XXXXX__ Uplink 27: _________________________________________________________________________XXXXX__ Uplink 28: _________________________________________________________________________XXXXX__ Uplink 29: _________________________________________________________________________XXXXX__ Uplink 30: ________________________________________________________________________XXXXX___ Uplink 31: ________________________________________________________________________XXXXX___ Data phase characteristics: Uplink 16: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXXX Uplink 17: Optimal Phase: 14 Window Length: 36 Eye Window: _________________________________XXXX___ Uplink 18: Optimal Phase: 18 Window Length: 35 Eye Window: X___________________________________XXXX Uplink 19: Optimal Phase: 15 Window Length: 35 Eye Window: _________________________________XXXXX__ Uplink 20: Optimal Phase: 16 Window Length: 36 Eye Window: ___________________________________XXXX_ Uplink 21: Optimal Phase: 15 Window Length: 35 Eye Window: _________________________________XXXXX__ Uplink 22: Optimal Phase: 18 Window Length: 35 Eye Window: X___________________________________XXXX Uplink 23: Optimal Phase: 13 Window Length: 36 Eye Window: ________________________________XXXX____ Uplink 24: Optimal Phase: 22 Window Length: 33 Eye Window: _XXXXX_________________________________X Uplink 25: Optimal Phase: 26 Window Length: 34 Eye Window: ____XXXXXX______________________________ Uplink 26: Optimal Phase: 27 Window Length: 34 Eye Window: _____XXXXXX_____________________________ Uplink 27: Optimal Phase: 33 Window Length: 33 Eye Window: __________XXXXXXX_______________________ Uplink 28: Optimal Phase: 34 Window Length: 36 Eye Window: _____________XXXX_______________________ Uplink 29: Optimal Phase: 36 Window Length: 35 Eye Window: ______________XXXXX_____________________ Uplink 30: Optimal Phase: 33 Window Length: 33 Eye Window: __________XXXXXXX_______________________ Uplink 31: Optimal Phase: 33 Window Length: 35 Eye Window: ___________XXXXX________________________ ] 10:56:30:setup_element:INFO: Beginning SMX ASICs map scan 10:56:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:56:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:56:30:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 10:56:30:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 10:56:30:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 10:56:30:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 10:56:30:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 10:56:30:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 10:56:30:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 10:56:31:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 10:56:31:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 10:56:31:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 10:56:31:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 10:56:31:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 10:56:31:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 10:56:31:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 10:56:31:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 10:56:31:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 10:56:31:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 10:56:31:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 10:56:32:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 10:56:33:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 33 Window Length: 72 Eye Windows: Uplink 16: _________________________________________________________________________XXXXX__ Uplink 17: _________________________________________________________________________XXXXX__ Uplink 18: ________________________________________________________________________XXX_____ Uplink 19: ________________________________________________________________________XXX_____ Uplink 20: _________________________________________________________________________XXXXX__ Uplink 21: _________________________________________________________________________XXXXX__ Uplink 22: ________________________________________________________________________XXXXXX__ Uplink 23: ________________________________________________________________________XXXXXX__ Uplink 24: ______________________________________________________________________XXXXXX____ Uplink 25: ______________________________________________________________________XXXXXX____ Uplink 26: _________________________________________________________________________XXXXX__ Uplink 27: _________________________________________________________________________XXXXX__ Uplink 28: _________________________________________________________________________XXXXX__ Uplink 29: _________________________________________________________________________XXXXX__ Uplink 30: ________________________________________________________________________XXXXX___ Uplink 31: ________________________________________________________________________XXXXX___ Data phase characteristics: Uplink 16: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXXX Uplink 17: Optimal Phase: 14 Window Length: 36 Eye Window: _________________________________XXXX___ Uplink 18: Optimal Phase: 18 Window Length: 35 Eye Window: X___________________________________XXXX Uplink 19: Optimal Phase: 15 Window Length: 35 Eye Window: _________________________________XXXXX__ Uplink 20: Optimal Phase: 16 Window Length: 36 Eye Window: ___________________________________XXXX_ Uplink 21: Optimal Phase: 15 Window Length: 35 Eye Window: _________________________________XXXXX__ Uplink 22: Optimal Phase: 18 Window Length: 35 Eye Window: X___________________________________XXXX Uplink 23: Optimal Phase: 13 Window Length: 36 Eye Window: ________________________________XXXX____ Uplink 24: Optimal Phase: 22 Window Length: 33 Eye Window: _XXXXX_________________________________X Uplink 25: Optimal Phase: 26 Window Length: 34 Eye Window: ____XXXXXX______________________________ Uplink 26: Optimal Phase: 27 Window Length: 34 Eye Window: _____XXXXXX_____________________________ Uplink 27: Optimal Phase: 33 Window Length: 33 Eye Window: __________XXXXXXX_______________________ Uplink 28: Optimal Phase: 34 Window Length: 36 Eye Window: _____________XXXX_______________________ Uplink 29: Optimal Phase: 36 Window Length: 35 Eye Window: ______________XXXXX_____________________ Uplink 30: Optimal Phase: 33 Window Length: 33 Eye Window: __________XXXXXXX_______________________ Uplink 31: Optimal Phase: 33 Window Length: 35 Eye Window: ___________XXXXX________________________ 10:56:33:setup_element:INFO: Performing Elink synchronization 10:56:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:56:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:56:33:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 10:56:33:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 10:56:33:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 10:56:33:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 10:56:33:ST3_emu:INFO: Number of chips: 8 addr | upli | dwnli | grp | uplinks | uplinks_map 0 | [0] | 2 | 0 | [23] | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)] 10:56:34:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 10:56:35:febtest:INFO: 0-0 | XA-000-08-003-000-002-232-06 | 56.8 | 1106.2 10:56:35:febtest:INFO: 0-1 | XA-000-08-003-000-000-121-08 | 44.1 | 1165.6 10:56:35:febtest:INFO: 0-2 | XA-000-08-003-000-002-225-06 | 40.9 | 1171.5 10:56:35:febtest:INFO: 0-3 | XA-000-08-003-000-002-231-06 | 40.9 | 1171.5 10:56:35:febtest:INFO: 0-4 | XA-000-08-003-000-001-161-13 | 34.6 | 1201.0 10:56:36:febtest:INFO: 0-5 | XA-000-08-003-000-002-226-06 | 44.1 | 1153.7 10:56:36:febtest:INFO: 0-6 | XA-000-08-003-000-002-029-00 | 21.9 | 1242.0 10:56:36:febtest:INFO: 0-7 | XA-000-08-003-000-000-116-08 | 40.9 | 1177.4 10:56:36:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:56:39:ST3_smx:INFO: chip: 0-0 53.612520 C 1118.096875 mV 10:56:40:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:56:44:ST3_smx:INFO: chip: 0-1 47.250730 C 1147.806000 mV 10:56:44:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:56:48:ST3_smx:INFO: chip: 0-2 40.898880 C 1171.483840 mV 10:56:49:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:56:52:ST3_smx:INFO: chip: 0-3 34.556970 C 1195.082160 mV 10:56:53:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:56:56:ST3_smx:INFO: chip: 0-4 34.556970 C 1195.082160 mV 10:56:57:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:57:01:ST3_smx:INFO: chip: 0-5 40.898880 C 1171.483840 mV 10:57:01:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:57:05:ST3_smx:INFO: chip: 0-6 18.745682 C 1253.730060 mV 10:57:05:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:57:09:ST3_smx:INFO: chip: 0-7 50.430383 C 1147.806000 mV 10:57:09:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 10:57:09:febtest:INFO: 0-0 | XA-000-08-003-000-002-232-06 | 53.6 | 1118.1 10:57:10:febtest:INFO: 0-1 | XA-000-08-003-000-000-121-08 | 47.3 | 1147.8 10:57:10:febtest:INFO: 0-2 | XA-000-08-003-000-002-225-06 | 40.9 | 1171.5 10:57:10:febtest:INFO: 0-3 | XA-000-08-003-000-002-231-06 | 34.6 | 1195.1 10:57:10:febtest:INFO: 0-4 | XA-000-08-003-000-001-161-13 | 34.6 | 1195.1 10:57:10:febtest:INFO: 0-5 | XA-000-08-003-000-002-226-06 | 40.9 | 1171.5 10:57:11:febtest:INFO: 0-6 | XA-000-08-003-000-002-029-00 | 18.7 | 1253.7 10:57:11:febtest:INFO: 0-7 | XA-000-08-003-000-000-116-08 | 50.4 | 1147.8 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Sensor TEST_DATE : 2023_11_30-10_53_45 OPERATOR : Alois Alzheimer SITE : KIT SETUP : KIT_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : FEB_SN : 1022 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 1 FEB_B : 0 --------------------------------------- SENSOR_ID: 13152 MODULE_NAME: MODULE_TYPE: PB MODULE_LADDER: MODULE_MODULE: MODULE_SIZE: 0 MODULE_GRADE: --------------------------------------- VI_before_Init : ['2.800', '1.6300', '2.203', '1.8950', '0.000', '0.0000', '7.000', '1.5950'] VI_after__Init : ['0', '0', '0', '0', '0', '0'] VI_at__the_End : ['0', '0', '0', '0', '0', '0'] 10:57:50:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 10:57:50:ST3_Shared:INFO: -----------------------FEB-Microcable----------------------- 10:57:50:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 10:57:50:febtest:INFO: Tsting FEB with SN 2019 10:57:52:smx_tester:INFO: Scanning setup 10:57:52:elinks:INFO: Disabling clock on downlink 0 10:57:52:elinks:INFO: Disabling clock on downlink 1 10:57:52:elinks:INFO: Disabling clock on downlink 2 10:57:52:elinks:INFO: Disabling clock on downlink 3 10:57:52:elinks:INFO: Disabling clock on downlink 4 10:57:52:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:57:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 10:57:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:57:52:elinks:INFO: Disabling clock on downlink 0 10:57:52:elinks:INFO: Disabling clock on downlink 1 10:57:52:elinks:INFO: Disabling clock on downlink 2 10:57:52:elinks:INFO: Disabling clock on downlink 3 10:57:52:elinks:INFO: Disabling clock on downlink 4 10:57:52:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:57:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 10:57:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:57:52:elinks:INFO: Disabling clock on downlink 0 10:57:52:elinks:INFO: Disabling clock on downlink 1 10:57:52:elinks:INFO: Disabling clock on downlink 2 10:57:52:elinks:INFO: Disabling clock on downlink 3 10:57:52:elinks:INFO: Disabling clock on downlink 4 10:57:52:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:57:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:57:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 10:57:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 10:57:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 10:57:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 10:57:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 10:57:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 10:57:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 10:57:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 10:57:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 10:57:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 10:57:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 10:57:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 10:57:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 10:57:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 10:57:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 10:57:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 10:57:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:57:52:elinks:INFO: Disabling clock on downlink 0 10:57:52:elinks:INFO: Disabling clock on downlink 1 10:57:52:elinks:INFO: Disabling clock on downlink 2 10:57:52:elinks:INFO: Disabling clock on downlink 3 10:57:52:elinks:INFO: Disabling clock on downlink 4 10:57:52:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:57:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 10:57:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:57:52:elinks:INFO: Disabling clock on downlink 0 10:57:52:elinks:INFO: Disabling clock on downlink 1 10:57:52:elinks:INFO: Disabling clock on downlink 2 10:57:52:elinks:INFO: Disabling clock on downlink 3 10:57:52:elinks:INFO: Disabling clock on downlink 4 10:57:52:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:57:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 10:57:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:57:53:setup_element:INFO: Scanning clock phase 10:57:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:57:53:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:57:53:setup_element:INFO: Clock phase scan results for group 0, downlink 2 10:57:53:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________XXXXXX__ Clock Delay: 34 10:57:53:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________XXXXXX__ Clock Delay: 34 10:57:53:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________________XXXXXX__ Clock Delay: 34 10:57:53:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________________XXXXXX__ Clock Delay: 34 10:57:53:setup_element:INFO: Eye window for uplink 20: _________________________________________________________________________XXXXX__ Clock Delay: 35 10:57:53:setup_element:INFO: Eye window for uplink 21: _________________________________________________________________________XXXXX__ Clock Delay: 35 10:57:53:setup_element:INFO: Eye window for uplink 22: ________________________________________________________________________XXXXXX__ Clock Delay: 34 10:57:53:setup_element:INFO: Eye window for uplink 23: ________________________________________________________________________XXXXXX__ Clock Delay: 34 10:57:53:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXX____ Clock Delay: 33 10:57:53:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXX____ Clock Delay: 33 10:57:53:setup_element:INFO: Eye window for uplink 26: _________________________________________________________________________XXXXX__ Clock Delay: 35 10:57:53:setup_element:INFO: Eye window for uplink 27: _________________________________________________________________________XXXXX__ Clock Delay: 35 10:57:53:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________XXXXXX__ Clock Delay: 34 10:57:53:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________XXXXXX__ Clock Delay: 34 10:57:53:setup_element:INFO: Eye window for uplink 30: _________________________________________________________________________XXXX___ Clock Delay: 34 10:57:53:setup_element:INFO: Eye window for uplink 31: _________________________________________________________________________XXXX___ Clock Delay: 34 10:57:53:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2 10:57:53:setup_element:INFO: Scanning data phases 10:57:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:57:53:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:57:58:setup_element:INFO: Data phase scan results for group 0, downlink 2 10:57:58:setup_element:INFO: Eye window for uplink 16: ___________________________________XXXXX Data delay found: 17 10:57:58:setup_element:INFO: Eye window for uplink 17: ________________________________XXXX____ Data delay found: 13 10:57:58:setup_element:INFO: Eye window for uplink 18: ___________________________________XXXXX Data delay found: 17 10:57:58:setup_element:INFO: Eye window for uplink 19: ________________________________XXXX____ Data delay found: 13 10:57:58:setup_element:INFO: Eye window for uplink 20: _________________________________XXXXX__ Data delay found: 15 10:57:58:setup_element:INFO: Eye window for uplink 21: ________________________________XXXXX___ Data delay found: 14 10:57:58:setup_element:INFO: Eye window for uplink 22: __________________________________XXXXX_ Data delay found: 16 10:57:58:setup_element:INFO: Eye window for uplink 23: ______________________________XXXXX_____ Data delay found: 12 10:57:58:setup_element:INFO: Eye window for uplink 24: XXXXX_________________________________XX Data delay found: 21 10:57:58:setup_element:INFO: Eye window for uplink 25: ___XXXXX________________________________ Data delay found: 25 10:57:58:setup_element:INFO: Eye window for uplink 26: ____XXXXXX______________________________ Data delay found: 26 10:57:58:setup_element:INFO: Eye window for uplink 27: ________XXXXXXX_________________________ Data delay found: 31 10:57:58:setup_element:INFO: Eye window for uplink 28: ___________XXXXX________________________ Data delay found: 33 10:57:58:setup_element:INFO: Eye window for uplink 29: _____________XXXXX______________________ Data delay found: 35 10:57:58:setup_element:INFO: Eye window for uplink 30: _________XXXXXXX________________________ Data delay found: 32 10:57:58:setup_element:INFO: Eye window for uplink 31: ___________XXXX_________________________ Data delay found: 32 10:57:58:setup_element:INFO: Setting the data phase to 17 for uplink 16 10:57:58:setup_element:INFO: Setting the data phase to 13 for uplink 17 10:57:58:setup_element:INFO: Setting the data phase to 17 for uplink 18 10:57:58:setup_element:INFO: Setting the data phase to 13 for uplink 19 10:57:58:setup_element:INFO: Setting the data phase to 15 for uplink 20 10:57:58:setup_element:INFO: Setting the data phase to 14 for uplink 21 10:57:58:setup_element:INFO: Setting the data phase to 16 for uplink 22 10:57:58:setup_element:INFO: Setting the data phase to 12 for uplink 23 10:57:58:setup_element:INFO: Setting the data phase to 21 for uplink 24 10:57:58:setup_element:INFO: Setting the data phase to 25 for uplink 25 10:57:58:setup_element:INFO: Setting the data phase to 26 for uplink 26 10:57:58:setup_element:INFO: Setting the data phase to 31 for uplink 27 10:57:58:setup_element:INFO: Setting the data phase to 33 for uplink 28 10:57:58:setup_element:INFO: Setting the data phase to 35 for uplink 29 10:57:58:setup_element:INFO: Setting the data phase to 32 for uplink 30 10:57:58:setup_element:INFO: Setting the data phase to 32 for uplink 31 10:57:58:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 34 Window Length: 73 Eye Windows: Uplink 16: ________________________________________________________________________XXXXXX__ Uplink 17: ________________________________________________________________________XXXXXX__ Uplink 18: ________________________________________________________________________XXXXXX__ Uplink 19: ________________________________________________________________________XXXXXX__ Uplink 20: _________________________________________________________________________XXXXX__ Uplink 21: _________________________________________________________________________XXXXX__ Uplink 22: ________________________________________________________________________XXXXXX__ Uplink 23: ________________________________________________________________________XXXXXX__ Uplink 24: _______________________________________________________________________XXXXX____ Uplink 25: _______________________________________________________________________XXXXX____ Uplink 26: _________________________________________________________________________XXXXX__ Uplink 27: _________________________________________________________________________XXXXX__ Uplink 28: ________________________________________________________________________XXXXXX__ Uplink 29: ________________________________________________________________________XXXXXX__ Uplink 30: _________________________________________________________________________XXXX___ Uplink 31: _________________________________________________________________________XXXX___ Data phase characteristics: Uplink 16: Optimal Phase: 17 Window Length: 35 Eye Window: ___________________________________XXXXX Uplink 17: Optimal Phase: 13 Window Length: 36 Eye Window: ________________________________XXXX____ Uplink 18: Optimal Phase: 17 Window Length: 35 Eye Window: ___________________________________XXXXX Uplink 19: Optimal Phase: 13 Window Length: 36 Eye Window: ________________________________XXXX____ Uplink 20: Optimal Phase: 15 Window Length: 35 Eye Window: _________________________________XXXXX__ Uplink 21: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ Uplink 22: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 23: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 24: Optimal Phase: 21 Window Length: 33 Eye Window: XXXXX_________________________________XX Uplink 25: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 26: Optimal Phase: 26 Window Length: 34 Eye Window: ____XXXXXX______________________________ Uplink 27: Optimal Phase: 31 Window Length: 33 Eye Window: ________XXXXXXX_________________________ Uplink 28: Optimal Phase: 33 Window Length: 35 Eye Window: ___________XXXXX________________________ Uplink 29: Optimal Phase: 35 Window Length: 35 Eye Window: _____________XXXXX______________________ Uplink 30: Optimal Phase: 32 Window Length: 33 Eye Window: _________XXXXXXX________________________ Uplink 31: Optimal Phase: 32 Window Length: 36 Eye Window: ___________XXXX_________________________ ] 10:57:58:setup_element:INFO: Beginning SMX ASICs map scan 10:57:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:57:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:57:58:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 10:57:58:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 10:57:58:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 10:57:58:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 10:57:58:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 10:57:58:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 10:57:58:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 10:57:59:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 10:57:59:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 10:57:59:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 10:57:59:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 10:57:59:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 10:57:59:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 10:57:59:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 10:57:59:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 10:57:59:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 10:57:59:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 10:57:59:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 10:57:59:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 10:58:01:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 34 Window Length: 73 Eye Windows: Uplink 16: ________________________________________________________________________XXXXXX__ Uplink 17: ________________________________________________________________________XXXXXX__ Uplink 18: ________________________________________________________________________XXXXXX__ Uplink 19: ________________________________________________________________________XXXXXX__ Uplink 20: _________________________________________________________________________XXXXX__ Uplink 21: _________________________________________________________________________XXXXX__ Uplink 22: ________________________________________________________________________XXXXXX__ Uplink 23: ________________________________________________________________________XXXXXX__ Uplink 24: _______________________________________________________________________XXXXX____ Uplink 25: _______________________________________________________________________XXXXX____ Uplink 26: _________________________________________________________________________XXXXX__ Uplink 27: _________________________________________________________________________XXXXX__ Uplink 28: ________________________________________________________________________XXXXXX__ Uplink 29: ________________________________________________________________________XXXXXX__ Uplink 30: _________________________________________________________________________XXXX___ Uplink 31: _________________________________________________________________________XXXX___ Data phase characteristics: Uplink 16: Optimal Phase: 17 Window Length: 35 Eye Window: ___________________________________XXXXX Uplink 17: Optimal Phase: 13 Window Length: 36 Eye Window: ________________________________XXXX____ Uplink 18: Optimal Phase: 17 Window Length: 35 Eye Window: ___________________________________XXXXX Uplink 19: Optimal Phase: 13 Window Length: 36 Eye Window: ________________________________XXXX____ Uplink 20: Optimal Phase: 15 Window Length: 35 Eye Window: _________________________________XXXXX__ Uplink 21: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ Uplink 22: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 23: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 24: Optimal Phase: 21 Window Length: 33 Eye Window: XXXXX_________________________________XX Uplink 25: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 26: Optimal Phase: 26 Window Length: 34 Eye Window: ____XXXXXX______________________________ Uplink 27: Optimal Phase: 31 Window Length: 33 Eye Window: ________XXXXXXX_________________________ Uplink 28: Optimal Phase: 33 Window Length: 35 Eye Window: ___________XXXXX________________________ Uplink 29: Optimal Phase: 35 Window Length: 35 Eye Window: _____________XXXXX______________________ Uplink 30: Optimal Phase: 32 Window Length: 33 Eye Window: _________XXXXXXX________________________ Uplink 31: Optimal Phase: 32 Window Length: 36 Eye Window: ___________XXXX_________________________ 10:58:01:setup_element:INFO: Performing Elink synchronization 10:58:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:58:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:58:01:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 10:58:01:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 10:58:01:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 10:58:01:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 10:58:01:ST3_emu:INFO: Number of chips: 8 addr | upli | dwnli | grp | uplinks | uplinks_map 0 | [0] | 2 | 0 | [23] | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)] TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0_23 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_0__upli_23 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_30 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_1__upli_30 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_2_21 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_2_21 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_2_21 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_2_21 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_2_21 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_2_21 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_2_21 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_2_21 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_2_21 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_2_21 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_2_21 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_2_21 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_2__upli_21 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_28 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_28 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_28 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_28 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_28 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_28 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_28 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_28 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_28 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_28 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_28 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_28 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_3__upli_28 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4_19 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4_19 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4_19 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4_19 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4_19 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4_19 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4_19 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4_19 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4_19 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4_19 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4_19 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4_19 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_4__upli_19 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_26 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_26 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_26 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_26 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_26 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_26 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_26 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_26 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_26 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_26 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_26 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_26 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_5__upli_26 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6_17 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6_17 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6_17 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6_17 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6_17 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6_17 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6_17 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6_17 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6_17 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6_17 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6_17 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6_17 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_6__upli_17 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_24 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_24 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_24 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_24 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_24 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_24 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_24 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_24 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_24 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_24 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_24 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_24 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_7__upli_24 10:58:02:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 10:58:03:febtest:INFO: 0-0 | XA-000-08-003-000-002-232-06 | 53.6 | 1112.1 10:58:03:febtest:INFO: 0-1 | XA-000-08-003-000-000-121-08 | 44.1 | 1165.6 10:58:03:febtest:INFO: 0-2 | XA-000-08-003-000-002-225-06 | 37.7 | 1171.5 10:58:03:febtest:INFO: 0-3 | XA-000-08-003-000-002-231-06 | 40.9 | 1171.5 10:58:03:febtest:INFO: 0-4 | XA-000-08-003-000-001-161-13 | 34.6 | 1195.1 10:58:04:febtest:INFO: 0-5 | XA-000-08-003-000-002-226-06 | 47.3 | 1153.7 10:58:04:febtest:INFO: 0-6 | XA-000-08-003-000-002-029-00 | 12.4 | 1271.2 10:58:04:febtest:INFO: 0-7 | XA-000-08-003-000-000-116-08 | 40.9 | 1177.4 10:58:04:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:58:08:ST3_smx:INFO: chip: 0-0 53.612520 C 1118.096875 mV 10:58:08:ST3_smx:INFO: Electrons 10:58:08:ST3_smx:INFO: # loops 0 10:58:09:ST3_smx:INFO: # loops 1 10:58:11:ST3_smx:INFO: # loops 2 10:58:12:ST3_smx:INFO: # loops 3 10:58:14:ST3_smx:INFO: # loops 4 10:58:15:ST3_smx:INFO: Total # of broken channels: 0 10:58:15:ST3_smx:INFO: List of broken channels: [] 10:58:15:ST3_smx:INFO: Total # of broken channels: 0 10:58:15:ST3_smx:INFO: List of broken channels: [] 10:58:17:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:58:20:ST3_smx:INFO: chip: 0-1 47.250730 C 1147.806000 mV 10:58:20:ST3_smx:INFO: Electrons 10:58:20:ST3_smx:INFO: # loops 0 10:58:22:ST3_smx:INFO: # loops 1 10:58:23:ST3_smx:INFO: # loops 2 10:58:25:ST3_smx:INFO: # loops 3 10:58:26:ST3_smx:INFO: # loops 4 10:58:28:ST3_smx:INFO: Total # of broken channels: 0 10:58:28:ST3_smx:INFO: List of broken channels: [] 10:58:28:ST3_smx:INFO: Total # of broken channels: 6 10:58:28:ST3_smx:INFO: List of broken channels: [0, 2, 4, 6, 8, 10] 10:58:29:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:58:32:ST3_smx:INFO: chip: 0-2 40.898880 C 1171.483840 mV 10:58:33:ST3_smx:INFO: Electrons 10:58:33:ST3_smx:INFO: # loops 0 10:58:35:ST3_smx:INFO: # loops 1 10:58:36:ST3_smx:INFO: # loops 2 10:58:38:ST3_smx:INFO: # loops 3 10:58:39:ST3_smx:INFO: # loops 4 10:58:41:ST3_smx:INFO: Total # of broken channels: 0 10:58:41:ST3_smx:INFO: List of broken channels: [] 10:58:41:ST3_smx:INFO: Total # of broken channels: 0 10:58:41:ST3_smx:INFO: List of broken channels: [] 10:58:42:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:58:45:ST3_smx:INFO: chip: 0-3 34.556970 C 1195.082160 mV 10:58:45:ST3_smx:INFO: Electrons 10:58:45:ST3_smx:INFO: # loops 0 10:58:47:ST3_smx:INFO: # loops 1 10:58:48:ST3_smx:INFO: # loops 2 10:58:50:ST3_smx:INFO: # loops 3 10:58:51:ST3_smx:INFO: # loops 4 10:58:53:ST3_smx:INFO: Total # of broken channels: 0 10:58:53:ST3_smx:INFO: List of broken channels: [] 10:58:53:ST3_smx:INFO: Total # of broken channels: 1 10:58:53:ST3_smx:INFO: List of broken channels: [0] 10:58:54:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:58:57:ST3_smx:INFO: chip: 0-4 34.556970 C 1195.082160 mV 10:58:57:ST3_smx:INFO: Electrons 10:58:57:ST3_smx:INFO: # loops 0 10:58:59:ST3_smx:INFO: # loops 1 10:59:00:ST3_smx:INFO: # loops 2 10:59:02:ST3_smx:INFO: # loops 3 10:59:03:ST3_smx:INFO: # loops 4 10:59:05:ST3_smx:INFO: Total # of broken channels: 0 10:59:05:ST3_smx:INFO: List of broken channels: [] 10:59:05:ST3_smx:INFO: Total # of broken channels: 0 10:59:05:ST3_smx:INFO: List of broken channels: [] 10:59:06:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:59:09:ST3_smx:INFO: chip: 0-5 40.898880 C 1171.483840 mV 10:59:09:ST3_smx:INFO: Electrons 10:59:09:ST3_smx:INFO: # loops 0 10:59:11:ST3_smx:INFO: # loops 1 10:59:12:ST3_smx:INFO: # loops 2 10:59:14:ST3_smx:INFO: # loops 3 10:59:15:ST3_smx:INFO: # loops 4 10:59:17:ST3_smx:INFO: Total # of broken channels: 1 10:59:17:ST3_smx:INFO: List of broken channels: [97] 10:59:17:ST3_smx:INFO: Total # of broken channels: 1 10:59:17:ST3_smx:INFO: List of broken channels: [97] 10:59:18:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:59:22:ST3_smx:INFO: chip: 0-6 18.745682 C 1253.730060 mV 10:59:22:ST3_smx:INFO: Electrons 10:59:22:ST3_smx:INFO: # loops 0 10:59:23:ST3_smx:INFO: # loops 1 10:59:25:ST3_smx:INFO: # loops 2 10:59:26:ST3_smx:INFO: # loops 3 10:59:28:ST3_smx:INFO: # loops 4 10:59:29:ST3_smx:INFO: Total # of broken channels: 0 10:59:29:ST3_smx:INFO: List of broken channels: [] 10:59:29:ST3_smx:INFO: Total # of broken channels: 0 10:59:29:ST3_smx:INFO: List of broken channels: [] 10:59:30:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:59:33:ST3_smx:INFO: chip: 0-7 50.430383 C 1153.732915 mV 10:59:33:ST3_smx:INFO: Electrons 10:59:33:ST3_smx:INFO: # loops 0 10:59:35:ST3_smx:INFO: # loops 1 10:59:37:ST3_smx:INFO: # loops 2 10:59:38:ST3_smx:INFO: # loops 3 10:59:40:ST3_smx:INFO: # loops 4 10:59:41:ST3_smx:INFO: Total # of broken channels: 0 10:59:41:ST3_smx:INFO: List of broken channels: [] 10:59:41:ST3_smx:INFO: Total # of broken channels: 0 10:59:41:ST3_smx:INFO: List of broken channels: [] 10:59:42:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 10:59:42:febtest:INFO: 0-0 | XA-000-08-003-000-002-232-06 | 53.6 | 1118.1 10:59:43:febtest:INFO: 0-1 | XA-000-08-003-000-000-121-08 | 50.4 | 1147.8 10:59:43:febtest:INFO: 0-2 | XA-000-08-003-000-002-225-06 | 40.9 | 1171.5 10:59:43:febtest:INFO: 0-3 | XA-000-08-003-000-002-231-06 | 34.6 | 1195.1 10:59:43:febtest:INFO: 0-4 | XA-000-08-003-000-001-161-13 | 34.6 | 1195.1 10:59:43:febtest:INFO: 0-5 | XA-000-08-003-000-002-226-06 | 40.9 | 1171.5 10:59:44:febtest:INFO: 0-6 | XA-000-08-003-000-002-029-00 | 18.7 | 1253.7 10:59:44:febtest:INFO: 0-7 | XA-000-08-003-000-000-116-08 | 50.4 | 1153.7 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 2023_11_30-10_57_50 OPERATOR : Alois Alzheimer SITE : KIT SETUP : KIT_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : FEB_SN : 1022 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 1 FEB_B : 0 --------------------------------------- --------------------------------------- VI_before_Init : ['2.800', '1.9450', '2.203', '2.0210', '0.000', '0.0000', '6.999', '1.6080'] VI_after__Init : ['0', '0', '0', '0', '0', '0'] VI_at__the_End : ['0', '0', '0', '0', '0', '0'] 11:00:14:ST3_Shared:INFO: /home/cbm/public_html/KIT_LogDir//FEB/FEB_2019/TestDate_2023_11_30-10_57_50/