FEB_2200 05.07.24 09:19:24
Info
09:19:24:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:19:24:ST3_Shared:INFO: FEB-Microcable
09:19:24:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:19:24:febtest:INFO: Testing FEB with SN 2200
09:19:26:smx_tester:INFO: Scanning setup
09:19:26:elinks:INFO: Disabling clock on downlink 0
09:19:26:elinks:INFO: Disabling clock on downlink 1
09:19:26:elinks:INFO: Disabling clock on downlink 2
09:19:26:elinks:INFO: Disabling clock on downlink 3
09:19:26:elinks:INFO: Disabling clock on downlink 4
09:19:26:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:19:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:19:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:19:26:elinks:INFO: Disabling clock on downlink 0
09:19:26:elinks:INFO: Disabling clock on downlink 1
09:19:26:elinks:INFO: Disabling clock on downlink 2
09:19:26:elinks:INFO: Disabling clock on downlink 3
09:19:26:elinks:INFO: Disabling clock on downlink 4
09:19:26:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:19:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:19:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:19:26:elinks:INFO: Disabling clock on downlink 0
09:19:26:elinks:INFO: Disabling clock on downlink 1
09:19:26:elinks:INFO: Disabling clock on downlink 2
09:19:26:elinks:INFO: Disabling clock on downlink 3
09:19:26:elinks:INFO: Disabling clock on downlink 4
09:19:26:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:19:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:19:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
09:19:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
09:19:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
09:19:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
09:19:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
09:19:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
09:19:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
09:19:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
09:19:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:19:26:elinks:INFO: Disabling clock on downlink 0
09:19:26:elinks:INFO: Disabling clock on downlink 1
09:19:26:elinks:INFO: Disabling clock on downlink 2
09:19:26:elinks:INFO: Disabling clock on downlink 3
09:19:26:elinks:INFO: Disabling clock on downlink 4
09:19:26:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:19:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:19:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:19:26:elinks:INFO: Disabling clock on downlink 0
09:19:26:elinks:INFO: Disabling clock on downlink 1
09:19:26:elinks:INFO: Disabling clock on downlink 2
09:19:26:elinks:INFO: Disabling clock on downlink 3
09:19:26:elinks:INFO: Disabling clock on downlink 4
09:19:26:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:19:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:19:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:19:26:setup_element:INFO: Scanning clock phase
09:19:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:19:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:19:27:setup_element:INFO: Clock phase scan results for group 0, downlink 2
09:19:27:setup_element:INFO: Eye window for uplink 24: _________________________________________________________________XXXXX__________
Clock Delay: 27
09:19:27:setup_element:INFO: Eye window for uplink 25: _________________________________________________________________XXXXX__________
Clock Delay: 27
09:19:27:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________XXXXXXX__________
Clock Delay: 26
09:19:27:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________XXXXXXX__________
Clock Delay: 26
09:19:27:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________________
Clock Delay: 40
09:19:27:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________________
Clock Delay: 40
09:19:27:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________XXXXX____________
Clock Delay: 25
09:19:27:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________XXXXX____________
Clock Delay: 25
09:19:27:setup_element:INFO: Setting the clock phase to 26 for group 0, downlink 2
09:19:27:setup_element:INFO: Scanning data phases
09:19:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:19:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:19:32:setup_element:INFO: Data phase scan results for group 0, downlink 2
09:19:32:setup_element:INFO: Eye window for uplink 24: _____XXXXXXX____________________________
Data delay found: 28
09:19:32:setup_element:INFO: Eye window for uplink 25: _______XXXXXXXX_________________________
Data delay found: 30
09:19:32:setup_element:INFO: Eye window for uplink 26: ______XXXXXXX___________________________
Data delay found: 29
09:19:32:setup_element:INFO: Eye window for uplink 27: __________XXXXXXXXX_____________________
Data delay found: 34
09:19:32:setup_element:INFO: Eye window for uplink 28: ____________XXXXXXX_____________________
Data delay found: 35
09:19:32:setup_element:INFO: Eye window for uplink 29: _______________XXXXXX___________________
Data delay found: 37
09:19:32:setup_element:INFO: Eye window for uplink 30: ____________XXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 5
09:19:32:setup_element:INFO: Eye window for uplink 31: ____________XXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 5
09:19:32:setup_element:INFO: Setting the data phase to 28 for uplink 24
09:19:32:setup_element:INFO: Setting the data phase to 30 for uplink 25
09:19:32:setup_element:INFO: Setting the data phase to 29 for uplink 26
09:19:32:setup_element:INFO: Setting the data phase to 34 for uplink 27
09:19:32:setup_element:INFO: Setting the data phase to 35 for uplink 28
09:19:32:setup_element:INFO: Setting the data phase to 37 for uplink 29
09:19:32:setup_element:INFO: Setting the data phase to 5 for uplink 30
09:19:32:setup_element:INFO: Setting the data phase to 5 for uplink 31
09:19:32:setup_element:INFO: Beginning SMX ASICs map scan
09:19:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:19:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:19:32:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:19:32:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:19:32:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
09:19:32:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:19:32:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:19:32:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:19:32:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:19:33:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:19:33:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:19:33:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:19:33:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:19:34:setup_element:INFO: Performing Elink synchronization
09:19:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:19:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:19:34:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:19:34:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:19:34:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
09:19:34:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
09:19:35:febtest:INFO: Init all SMX (CSA): 30
09:19:43:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:19:43:febtest:INFO: 30-01 | XA-000-08-003-000-004-095-00 | 47.3 | 1135.9
09:19:43:febtest:INFO: 28-03 | XA-000-08-003-000-004-088-00 | 50.4 | 1124.0
09:19:43:febtest:INFO: 26-05 | XA-000-08-003-000-004-089-00 | 34.6 | 1177.4
09:19:43:febtest:INFO: 24-07 | XA-000-08-003-000-004-090-00 | 25.1 | 1201.0
09:19:44:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
09:19:46:ST3_smx:INFO: chip: 30-1 44.073563 C 1147.806000 mV
09:19:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:19:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:19:46:ST3_smx:INFO: Electrons
09:19:46:ST3_smx:INFO: # loops 0
09:19:48:ST3_smx:INFO: # loops 1
09:19:51:ST3_smx:INFO: # loops 2
09:19:53:ST3_smx:INFO: Total # of broken channels: 0
09:19:53:ST3_smx:INFO: List of broken channels: []
09:19:53:ST3_smx:INFO: Total # of broken channels: 0
09:19:53:ST3_smx:INFO: List of broken channels: []
09:19:54:ST3_smx:INFO: chip: 28-3 50.430383 C 1135.937260 mV
09:19:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:19:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:19:54:ST3_smx:INFO: Electrons
09:19:54:ST3_smx:INFO: # loops 0
09:19:56:ST3_smx:INFO: # loops 1
09:19:57:ST3_smx:INFO: # loops 2
09:19:59:ST3_smx:INFO: Total # of broken channels: 0
09:19:59:ST3_smx:INFO: List of broken channels: []
09:19:59:ST3_smx:INFO: Total # of broken channels: 0
09:19:59:ST3_smx:INFO: List of broken channels: []
09:20:01:ST3_smx:INFO: chip: 26-5 34.556970 C 1189.190035 mV
09:20:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:20:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:20:01:ST3_smx:INFO: Electrons
09:20:01:ST3_smx:INFO: # loops 0
09:20:02:ST3_smx:INFO: # loops 1
09:20:04:ST3_smx:INFO: # loops 2
09:20:05:ST3_smx:INFO: Total # of broken channels: 0
09:20:05:ST3_smx:INFO: List of broken channels: []
09:20:06:ST3_smx:INFO: Total # of broken channels: 0
09:20:06:ST3_smx:INFO: List of broken channels: []
09:20:07:ST3_smx:INFO: chip: 24-7 25.062742 C 1212.728715 mV
09:20:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:20:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:20:07:ST3_smx:INFO: Electrons
09:20:07:ST3_smx:INFO: # loops 0
09:20:09:ST3_smx:INFO: # loops 1
09:20:11:ST3_smx:INFO: # loops 2
09:20:13:ST3_smx:INFO: Total # of broken channels: 0
09:20:13:ST3_smx:INFO: List of broken channels: []
09:20:13:ST3_smx:INFO: Total # of broken channels: 0
09:20:13:ST3_smx:INFO: List of broken channels: []
09:20:14:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:20:14:febtest:INFO: 30-01 | XA-000-08-003-000-004-095-00 | 47.3 | 1165.6
09:20:14:febtest:INFO: 28-03 | XA-000-08-003-000-004-088-00 | 50.4 | 1153.7
09:20:14:febtest:INFO: 26-05 | XA-000-08-003-000-004-089-00 | 34.6 | 1212.7
09:20:15:febtest:INFO: 24-07 | XA-000-08-003-000-004-090-00 | 28.2 | 1236.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_07_05-09_19_24
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2200| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.451', '0.8517', '1.850', '1.1840']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0120', '1.850', '1.2990']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9970', '1.850', '0.2688']