FEB_2201 04.07.24 09:43:03
Info
09:43:03:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:43:03:ST3_Shared:INFO: FEB-Microcable
09:43:03:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:43:03:febtest:INFO: Testing FEB with SN 2201
09:43:05:smx_tester:INFO: Scanning setup
09:43:05:elinks:INFO: Disabling clock on downlink 0
09:43:05:elinks:INFO: Disabling clock on downlink 1
09:43:05:elinks:INFO: Disabling clock on downlink 2
09:43:05:elinks:INFO: Disabling clock on downlink 3
09:43:05:elinks:INFO: Disabling clock on downlink 4
09:43:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:43:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:43:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:43:05:elinks:INFO: Disabling clock on downlink 0
09:43:05:elinks:INFO: Disabling clock on downlink 1
09:43:05:elinks:INFO: Disabling clock on downlink 2
09:43:05:elinks:INFO: Disabling clock on downlink 3
09:43:05:elinks:INFO: Disabling clock on downlink 4
09:43:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:43:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:43:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:43:05:elinks:INFO: Disabling clock on downlink 0
09:43:05:elinks:INFO: Disabling clock on downlink 1
09:43:05:elinks:INFO: Disabling clock on downlink 2
09:43:05:elinks:INFO: Disabling clock on downlink 3
09:43:05:elinks:INFO: Disabling clock on downlink 4
09:43:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:43:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:43:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
09:43:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
09:43:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
09:43:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
09:43:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
09:43:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
09:43:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
09:43:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
09:43:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:43:06:elinks:INFO: Disabling clock on downlink 0
09:43:06:elinks:INFO: Disabling clock on downlink 1
09:43:06:elinks:INFO: Disabling clock on downlink 2
09:43:06:elinks:INFO: Disabling clock on downlink 3
09:43:06:elinks:INFO: Disabling clock on downlink 4
09:43:06:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:43:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:43:06:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:43:06:elinks:INFO: Disabling clock on downlink 0
09:43:06:elinks:INFO: Disabling clock on downlink 1
09:43:06:elinks:INFO: Disabling clock on downlink 2
09:43:06:elinks:INFO: Disabling clock on downlink 3
09:43:06:elinks:INFO: Disabling clock on downlink 4
09:43:06:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:43:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:43:06:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:43:06:setup_element:INFO: Scanning clock phase
09:43:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:43:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:43:06:setup_element:INFO: Clock phase scan results for group 0, downlink 2
09:43:06:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________XXXXXX__________
Clock Delay: 26
09:43:06:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________XXXXXX__________
Clock Delay: 26
09:43:06:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________XXXXXXXX__________
Clock Delay: 25
09:43:06:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________XXXXXXXX__________
Clock Delay: 25
09:43:06:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________XXXXXX____________
Clock Delay: 24
09:43:06:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________XXXXXX____________
Clock Delay: 24
09:43:06:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________XXXXXX____________
Clock Delay: 24
09:43:06:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________XXXXXX____________
Clock Delay: 24
09:43:06:setup_element:INFO: Setting the clock phase to 25 for group 0, downlink 2
09:43:06:setup_element:INFO: Scanning data phases
09:43:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:43:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:43:11:setup_element:INFO: Data phase scan results for group 0, downlink 2
09:43:11:setup_element:INFO: Eye window for uplink 24: _____XXXXXXX_______________________XXXXX
Data delay found: 23
09:43:11:setup_element:INFO: Eye window for uplink 25: _______XXXXXXXX____________________XXXXX
Data delay found: 24
09:43:11:setup_element:INFO: Eye window for uplink 26: ______XXXXXXXX__________________________
Data delay found: 29
09:43:11:setup_element:INFO: Eye window for uplink 27: __________XXXXXXXXX_____________________
Data delay found: 34
09:43:11:setup_element:INFO: Eye window for uplink 28: _________XXXXXXXXX______________________
Data delay found: 33
09:43:11:setup_element:INFO: Eye window for uplink 29: _____________XXXXXXX____________________
Data delay found: 36
09:43:11:setup_element:INFO: Eye window for uplink 30: ____XXXXXXXXXXXXXXXXXXXXXXXXXXX_________
Data delay found: 37
09:43:11:setup_element:INFO: Eye window for uplink 31: ____XXXXXXXXXXXXXXXXXXXXXXXXXXX_________
Data delay found: 37
09:43:11:setup_element:INFO: Setting the data phase to 23 for uplink 24
09:43:11:setup_element:INFO: Setting the data phase to 24 for uplink 25
09:43:11:setup_element:INFO: Setting the data phase to 29 for uplink 26
09:43:11:setup_element:INFO: Setting the data phase to 34 for uplink 27
09:43:11:setup_element:INFO: Setting the data phase to 33 for uplink 28
09:43:11:setup_element:INFO: Setting the data phase to 36 for uplink 29
09:43:11:setup_element:INFO: Setting the data phase to 37 for uplink 30
09:43:11:setup_element:INFO: Setting the data phase to 37 for uplink 31
09:43:11:setup_element:INFO: Beginning SMX ASICs map scan
09:43:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:43:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:43:11:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:43:11:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:43:11:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
09:43:11:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:43:11:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:43:12:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:43:12:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:43:12:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:43:12:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:43:12:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:43:12:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:43:14:setup_element:INFO: Performing Elink synchronization
09:43:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:43:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:43:14:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:43:14:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:43:14:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
09:43:14:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
09:43:14:febtest:INFO: Init all SMX (CSA): 30
09:43:21:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:43:22:febtest:INFO: 30-01 | XA-000-08-003-000-004-083-00 | 40.9 | 1135.9
09:43:22:febtest:INFO: 28-03 | XA-000-08-003-000-004-077-07 | 37.7 | 1147.8
09:43:22:febtest:INFO: 26-05 | XA-000-08-003-000-004-078-07 | 44.1 | 1130.0
09:43:22:febtest:INFO: 24-07 | XA-000-08-003-000-004-079-07 | 40.9 | 1141.9
09:43:23:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
09:43:25:ST3_smx:INFO: chip: 30-1 40.898880 C 1147.806000 mV
09:43:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:43:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:43:25:ST3_smx:INFO: Electrons
09:43:25:ST3_smx:INFO: # loops 0
09:43:27:ST3_smx:INFO: # loops 1
09:43:29:ST3_smx:INFO: # loops 2
09:43:30:ST3_smx:INFO: Total # of broken channels: 0
09:43:30:ST3_smx:INFO: List of broken channels: []
09:43:30:ST3_smx:INFO: Total # of broken channels: 0
09:43:30:ST3_smx:INFO: List of broken channels: []
09:43:32:ST3_smx:INFO: chip: 28-3 37.726682 C 1159.654860 mV
09:43:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:43:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:43:32:ST3_smx:INFO: Electrons
09:43:32:ST3_smx:INFO: # loops 0
09:43:33:ST3_smx:INFO: # loops 1
09:43:35:ST3_smx:INFO: # loops 2
09:43:36:ST3_smx:INFO: Total # of broken channels: 0
09:43:36:ST3_smx:INFO: List of broken channels: []
09:43:36:ST3_smx:INFO: Total # of broken channels: 0
09:43:36:ST3_smx:INFO: List of broken channels: []
09:43:38:ST3_smx:INFO: chip: 26-5 44.073563 C 1141.874115 mV
09:43:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:43:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:43:38:ST3_smx:INFO: Electrons
09:43:38:ST3_smx:INFO: # loops 0
09:43:40:ST3_smx:INFO: # loops 1
09:43:41:ST3_smx:INFO: # loops 2
09:43:43:ST3_smx:INFO: Total # of broken channels: 0
09:43:43:ST3_smx:INFO: List of broken channels: []
09:43:43:ST3_smx:INFO: Total # of broken channels: 0
09:43:43:ST3_smx:INFO: List of broken channels: []
09:43:44:ST3_smx:INFO: chip: 24-7 40.898880 C 1147.806000 mV
09:43:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:43:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:43:44:ST3_smx:INFO: Electrons
09:43:44:ST3_smx:INFO: # loops 0
09:43:46:ST3_smx:INFO: # loops 1
09:43:48:ST3_smx:INFO: # loops 2
09:43:49:ST3_smx:INFO: Total # of broken channels: 0
09:43:49:ST3_smx:INFO: List of broken channels: []
09:43:49:ST3_smx:INFO: Total # of broken channels: 0
09:43:49:ST3_smx:INFO: List of broken channels: []
09:43:50:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:43:50:febtest:INFO: 30-01 | XA-000-08-003-000-004-083-00 | 44.1 | 1171.5
09:43:50:febtest:INFO: 28-03 | XA-000-08-003-000-004-077-07 | 40.9 | 1183.3
09:43:50:febtest:INFO: 26-05 | XA-000-08-003-000-004-078-07 | 44.1 | 1159.7
09:43:51:febtest:INFO: 24-07 | XA-000-08-003-000-004-079-07 | 40.9 | 1165.6
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_07_04-09_43_03
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2201| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7278', '1.849', '1.5490']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0170', '1.850', '1.3240']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9972', '1.850', '0.2701']