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FEB_3006 13.05.24 09:10:45
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09:10:45:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:10:45:ST3_Shared:INFO: FEB-Microcable
09:10:45:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:10:45:febtest:INFO: Testing FEB with SN 3006
09:10:48:smx_tester:INFO: Scanning setup
09:10:48:elinks:INFO: Disabling clock on downlink 0
09:10:48:elinks:INFO: Disabling clock on downlink 1
09:10:48:elinks:INFO: Disabling clock on downlink 2
09:10:48:elinks:INFO: Disabling clock on downlink 3
09:10:48:elinks:INFO: Disabling clock on downlink 4
09:10:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:10:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:10:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:10:48:elinks:INFO: Disabling clock on downlink 0
09:10:48:elinks:INFO: Disabling clock on downlink 1
09:10:48:elinks:INFO: Disabling clock on downlink 2
09:10:48:elinks:INFO: Disabling clock on downlink 3
09:10:48:elinks:INFO: Disabling clock on downlink 4
09:10:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:10:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:10:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
09:10:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
09:10:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
09:10:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
09:10:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
09:10:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
09:10:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
09:10:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
09:10:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
09:10:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
09:10:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
09:10:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
09:10:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
09:10:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
09:10:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
09:10:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
09:10:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:10:48:elinks:INFO: Disabling clock on downlink 0
09:10:48:elinks:INFO: Disabling clock on downlink 1
09:10:48:elinks:INFO: Disabling clock on downlink 2
09:10:48:elinks:INFO: Disabling clock on downlink 3
09:10:48:elinks:INFO: Disabling clock on downlink 4
09:10:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:10:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:10:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:10:48:elinks:INFO: Disabling clock on downlink 0
09:10:48:elinks:INFO: Disabling clock on downlink 1
09:10:48:elinks:INFO: Disabling clock on downlink 2
09:10:48:elinks:INFO: Disabling clock on downlink 3
09:10:48:elinks:INFO: Disabling clock on downlink 4
09:10:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:10:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:10:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:10:48:elinks:INFO: Disabling clock on downlink 0
09:10:48:elinks:INFO: Disabling clock on downlink 1
09:10:48:elinks:INFO: Disabling clock on downlink 2
09:10:48:elinks:INFO: Disabling clock on downlink 3
09:10:48:elinks:INFO: Disabling clock on downlink 4
09:10:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:10:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:10:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:10:48:setup_element:INFO: Scanning clock phase
09:10:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:10:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:10:49:setup_element:INFO: Clock phase scan results for group 0, downlink 1
09:10:49:setup_element:INFO: Eye window for uplink 0 : ____________________________________________________________________________XXXX
Clock Delay: 37
09:10:49:setup_element:INFO: Eye window for uplink 1 : ____________________________________________________________________________XXXX
Clock Delay: 37
09:10:49:setup_element:INFO: Eye window for uplink 2 : ___________________________________________________________________________XXXXX
Clock Delay: 37
09:10:49:setup_element:INFO: Eye window for uplink 3 : ___________________________________________________________________________XXXXX
Clock Delay: 37
09:10:49:setup_element:INFO: Eye window for uplink 4 : ____________________________________________________________________________XXXX
Clock Delay: 37
09:10:49:setup_element:INFO: Eye window for uplink 5 : ____________________________________________________________________________XXXX
Clock Delay: 37
09:10:49:setup_element:INFO: Eye window for uplink 6 : ___________________________________________________________________________XXXXX
Clock Delay: 37
09:10:49:setup_element:INFO: Eye window for uplink 7 : ___________________________________________________________________________XXXXX
Clock Delay: 37
09:10:49:setup_element:INFO: Eye window for uplink 8 : _________________________________________________________________________XXXXX__
Clock Delay: 35
09:10:49:setup_element:INFO: Eye window for uplink 9 : _________________________________________________________________________XXXXX__
Clock Delay: 35
09:10:49:setup_element:INFO: Eye window for uplink 10: _________________________________________________________________________XXXXX__
Clock Delay: 35
09:10:49:setup_element:INFO: Eye window for uplink 11: _________________________________________________________________________XXXXX__
Clock Delay: 35
09:10:49:setup_element:INFO: Eye window for uplink 12: __XXXXXXX_______________________________________________________________________
Clock Delay: 45
09:10:49:setup_element:INFO: Eye window for uplink 13: __XXXXXXX_______________________________________________________________________
Clock Delay: 45
09:10:49:setup_element:INFO: Eye window for uplink 14: ___________________________________________________________________________XXXX_
Clock Delay: 36
09:10:49:setup_element:INFO: Eye window for uplink 15: ___________________________________________________________________________XXXX_
Clock Delay: 36
09:10:49:setup_element:INFO: Setting the clock phase to 40 for group 0, downlink 1
09:10:49:setup_element:INFO: Scanning data phases
09:10:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:10:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:10:54:setup_element:INFO: Data phase scan results for group 0, downlink 1
09:10:54:setup_element:INFO: Eye window for uplink 0 : ___XXXXX________________________________
Data delay found: 25
09:10:54:setup_element:INFO: Eye window for uplink 1 : XXXX___________________________________X
Data delay found: 21
09:10:54:setup_element:INFO: Eye window for uplink 2 : XXXX__________________________________XX
Data delay found: 20
09:10:54:setup_element:INFO: Eye window for uplink 3 : __________________________________XXXXX_
Data delay found: 16
09:10:54:setup_element:INFO: Eye window for uplink 4 : XXX__________________________________XXX
Data delay found: 19
09:10:54:setup_element:INFO: Eye window for uplink 5 : _________________________________XXXXX__
Data delay found: 15
09:10:54:setup_element:INFO: Eye window for uplink 6 : _____________________________XXXX_______
Data delay found: 10
09:10:54:setup_element:INFO: Eye window for uplink 7 : _________________________XXXX___________
Data delay found: 6
09:10:54:setup_element:INFO: Eye window for uplink 8 : _______________XXXXXX___________________
Data delay found: 37
09:10:54:setup_element:INFO: Eye window for uplink 9 : ___________________XXXXXX_______________
Data delay found: 1
09:10:54:setup_element:INFO: Eye window for uplink 10: ________________XXXXXX__________________
Data delay found: 38
09:10:54:setup_element:INFO: Eye window for uplink 11: ___________________XXXXXXX______________
Data delay found: 2
09:10:54:setup_element:INFO: Eye window for uplink 12: __________________XXXXX_________________
Data delay found: 0
09:10:54:setup_element:INFO: Eye window for uplink 13: ______________________XXXXX_____________
Data delay found: 4
09:10:54:setup_element:INFO: Eye window for uplink 14: ___________________XXXXX________________
Data delay found: 1
09:10:54:setup_element:INFO: Eye window for uplink 15: _____________________XXXXXX_____________
Data delay found: 3
09:10:54:setup_element:INFO: Setting the data phase to 25 for uplink 0
09:10:54:setup_element:INFO: Setting the data phase to 21 for uplink 1
09:10:54:setup_element:INFO: Setting the data phase to 20 for uplink 2
09:10:54:setup_element:INFO: Setting the data phase to 16 for uplink 3
09:10:54:setup_element:INFO: Setting the data phase to 19 for uplink 4
09:10:54:setup_element:INFO: Setting the data phase to 15 for uplink 5
09:10:54:setup_element:INFO: Setting the data phase to 10 for uplink 6
09:10:54:setup_element:INFO: Setting the data phase to 6 for uplink 7
09:10:54:setup_element:INFO: Setting the data phase to 37 for uplink 8
09:10:54:setup_element:INFO: Setting the data phase to 1 for uplink 9
09:10:54:setup_element:INFO: Setting the data phase to 38 for uplink 10
09:10:54:setup_element:INFO: Setting the data phase to 2 for uplink 11
09:10:54:setup_element:INFO: Setting the data phase to 0 for uplink 12
09:10:54:setup_element:INFO: Setting the data phase to 4 for uplink 13
09:10:54:setup_element:INFO: Setting the data phase to 1 for uplink 14
09:10:54:setup_element:INFO: Setting the data phase to 3 for uplink 15
09:10:54:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 40
Window Length: 64
Eye Windows:
Uplink 0: ____________________________________________________________________________XXXX
Uplink 1: ____________________________________________________________________________XXXX
Uplink 2: ___________________________________________________________________________XXXXX
Uplink 3: ___________________________________________________________________________XXXXX
Uplink 4: ____________________________________________________________________________XXXX
Uplink 5: ____________________________________________________________________________XXXX
Uplink 6: ___________________________________________________________________________XXXXX
Uplink 7: ___________________________________________________________________________XXXXX
Uplink 8: _________________________________________________________________________XXXXX__
Uplink 9: _________________________________________________________________________XXXXX__
Uplink 10: _________________________________________________________________________XXXXX__
Uplink 11: _________________________________________________________________________XXXXX__
Uplink 12: __XXXXXXX_______________________________________________________________________
Uplink 13: __XXXXXXX_______________________________________________________________________
Uplink 14: ___________________________________________________________________________XXXX_
Uplink 15: ___________________________________________________________________________XXXX_
Data phase characteristics:
Uplink 0:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 1:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 2:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 3:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 4:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 5:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 6:
Optimal Phase: 10
Window Length: 36
Eye Window: _____________________________XXXX_______
Uplink 7:
Optimal Phase: 6
Window Length: 36
Eye Window: _________________________XXXX___________
Uplink 8:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 9:
Optimal Phase: 1
Window Length: 34
Eye Window: ___________________XXXXXX_______________
Uplink 10:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
Uplink 11:
Optimal Phase: 2
Window Length: 33
Eye Window: ___________________XXXXXXX______________
Uplink 12:
Optimal Phase: 0
Window Length: 35
Eye Window: __________________XXXXX_________________
Uplink 13:
Optimal Phase: 4
Window Length: 35
Eye Window: ______________________XXXXX_____________
Uplink 14:
Optimal Phase: 1
Window Length: 35
Eye Window: ___________________XXXXX________________
Uplink 15:
Optimal Phase: 3
Window Length: 34
Eye Window: _____________________XXXXXX_____________
]
09:10:54:setup_element:INFO: Beginning SMX ASICs map scan
09:10:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:10:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:10:54:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:10:54:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:10:54:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:10:54:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:10:54:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:10:54:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:10:54:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:10:54:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:10:54:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:10:55:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:10:55:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:10:55:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:10:55:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:10:55:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:10:55:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:10:55:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:10:55:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:10:55:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:10:55:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:10:57:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 40
Window Length: 64
Eye Windows:
Uplink 0: ____________________________________________________________________________XXXX
Uplink 1: ____________________________________________________________________________XXXX
Uplink 2: ___________________________________________________________________________XXXXX
Uplink 3: ___________________________________________________________________________XXXXX
Uplink 4: ____________________________________________________________________________XXXX
Uplink 5: ____________________________________________________________________________XXXX
Uplink 6: ___________________________________________________________________________XXXXX
Uplink 7: ___________________________________________________________________________XXXXX
Uplink 8: _________________________________________________________________________XXXXX__
Uplink 9: _________________________________________________________________________XXXXX__
Uplink 10: _________________________________________________________________________XXXXX__
Uplink 11: _________________________________________________________________________XXXXX__
Uplink 12: __XXXXXXX_______________________________________________________________________
Uplink 13: __XXXXXXX_______________________________________________________________________
Uplink 14: ___________________________________________________________________________XXXX_
Uplink 15: ___________________________________________________________________________XXXX_
Data phase characteristics:
Uplink 0:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 1:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 2:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 3:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 4:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 5:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 6:
Optimal Phase: 10
Window Length: 36
Eye Window: _____________________________XXXX_______
Uplink 7:
Optimal Phase: 6
Window Length: 36
Eye Window: _________________________XXXX___________
Uplink 8:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 9:
Optimal Phase: 1
Window Length: 34
Eye Window: ___________________XXXXXX_______________
Uplink 10:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
Uplink 11:
Optimal Phase: 2
Window Length: 33
Eye Window: ___________________XXXXXXX______________
Uplink 12:
Optimal Phase: 0
Window Length: 35
Eye Window: __________________XXXXX_________________
Uplink 13:
Optimal Phase: 4
Window Length: 35
Eye Window: ______________________XXXXX_____________
Uplink 14:
Optimal Phase: 1
Window Length: 35
Eye Window: ___________________XXXXX________________
Uplink 15:
Optimal Phase: 3
Window Length: 34
Eye Window: _____________________XXXXXX_____________
09:10:57:setup_element:INFO: Performing Elink synchronization
09:10:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:10:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:10:57:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:10:57:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:10:57:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
09:10:57:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:10:57:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
FEB type: A FEB_A: 1 FEB_B: 0
09:10:58:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:10:59:febtest:INFO: 01-00 | XA-000-08-003-000-001-072-12 | 53.6 | 1141.9
09:10:59:febtest:INFO: 08-01 | XA-000-08-003-000-001-067-12 | 47.3 | 1165.6
09:10:59:febtest:INFO: 03-02 | XA-000-08-003-000-001-068-12 | 56.8 | 1141.9
09:10:59:febtest:INFO: 10-03 | XA-000-08-003-000-001-074-12 | 53.6 | 1153.7
09:10:59:febtest:INFO: 05-04 | XA-000-08-003-000-001-123-05 | 44.1 | 1171.5
09:11:00:febtest:INFO: 12-05 | XA-000-08-003-000-001-070-12 | 47.3 | 1165.6
09:11:00:febtest:INFO: 07-06 | XA-000-08-003-000-001-071-12 | 40.9 | 1177.4
09:11:00:febtest:INFO: 14-07 | XA-000-08-003-000-001-066-12 | 31.4 | 1242.0
09:11:00:ST3_smx:INFO: Configuring SMX FAST
09:11:02:ST3_smx:INFO: chip: 1-0 56.797143 C 1135.937260 mV
09:11:02:ST3_smx:INFO: Electrons
09:11:02:ST3_smx:INFO: # loops 0
09:11:04:ST3_smx:INFO: # loops 1
09:11:05:ST3_smx:INFO: # loops 2
09:11:07:ST3_smx:INFO: Total # of broken channels: 0
09:11:07:ST3_smx:INFO: List of broken channels: []
09:11:07:ST3_smx:INFO: Total # of broken channels: 0
09:11:07:ST3_smx:INFO: List of broken channels: []
09:11:08:ST3_smx:INFO: Configuring SMX FAST
09:11:10:ST3_smx:INFO: chip: 8-1 53.612520 C 1147.806000 mV
09:11:10:ST3_smx:INFO: Electrons
09:11:10:ST3_smx:INFO: # loops 0
09:11:12:ST3_smx:INFO: # loops 1
09:11:13:ST3_smx:INFO: # loops 2
09:11:15:ST3_smx:INFO: Total # of broken channels: 0
09:11:15:ST3_smx:INFO: List of broken channels: []
09:11:15:ST3_smx:INFO: Total # of broken channels: 0
09:11:15:ST3_smx:INFO: List of broken channels: []
09:11:16:ST3_smx:INFO: Configuring SMX FAST
09:11:18:ST3_smx:INFO: chip: 3-2 56.797143 C 1135.937260 mV
09:11:18:ST3_smx:INFO: Electrons
09:11:18:ST3_smx:INFO: # loops 0
09:11:19:ST3_smx:INFO: # loops 1
09:11:21:ST3_smx:INFO: # loops 2
09:11:23:ST3_smx:INFO: Total # of broken channels: 0
09:11:23:ST3_smx:INFO: List of broken channels: []
09:11:23:ST3_smx:INFO: Total # of broken channels: 0
09:11:23:ST3_smx:INFO: List of broken channels: []
09:11:23:ST3_smx:INFO: Configuring SMX FAST
09:11:25:ST3_smx:INFO: chip: 10-3 50.430383 C 1171.483840 mV
09:11:25:ST3_smx:INFO: Electrons
09:11:25:ST3_smx:INFO: # loops 0
09:11:27:ST3_smx:INFO: # loops 1
09:11:28:ST3_smx:INFO: # loops 2
09:11:30:ST3_smx:INFO: Total # of broken channels: 0
09:11:30:ST3_smx:INFO: List of broken channels: []
09:11:30:ST3_smx:INFO: Total # of broken channels: 0
09:11:30:ST3_smx:INFO: List of broken channels: []
09:11:31:ST3_smx:INFO: Configuring SMX FAST
09:11:33:ST3_smx:INFO: chip: 5-4 40.898880 C 1189.190035 mV
09:11:33:ST3_smx:INFO: Electrons
09:11:33:ST3_smx:INFO: # loops 0
09:11:35:ST3_smx:INFO: # loops 1
09:11:37:ST3_smx:INFO: # loops 2
09:11:39:ST3_smx:INFO: Total # of broken channels: 0
09:11:39:ST3_smx:INFO: List of broken channels: []
09:11:39:ST3_smx:INFO: Total # of broken channels: 0
09:11:39:ST3_smx:INFO: List of broken channels: []
09:11:40:ST3_smx:INFO: Configuring SMX FAST
09:11:42:ST3_smx:INFO: chip: 12-5 47.250730 C 1189.190035 mV
09:11:42:ST3_smx:INFO: Electrons
09:11:42:ST3_smx:INFO: # loops 0
09:11:44:ST3_smx:INFO: # loops 1
09:11:46:ST3_smx:INFO: # loops 2
09:11:48:ST3_smx:INFO: Total # of broken channels: 0
09:11:48:ST3_smx:INFO: List of broken channels: []
09:11:48:ST3_smx:INFO: Total # of broken channels: 0
09:11:48:ST3_smx:INFO: List of broken channels: []
09:11:49:ST3_smx:INFO: Configuring SMX FAST
09:11:51:ST3_smx:INFO: chip: 7-6 56.797143 C 1147.806000 mV
09:11:51:ST3_smx:INFO: Electrons
09:11:51:ST3_smx:INFO: # loops 0
09:11:52:ST3_smx:INFO: # loops 1
09:11:54:ST3_smx:INFO: # loops 2
09:11:55:ST3_smx:INFO: Total # of broken channels: 0
09:11:55:ST3_smx:INFO: List of broken channels: []
09:11:55:ST3_smx:INFO: Total # of broken channels: 0
09:11:55:ST3_smx:INFO: List of broken channels: []
09:11:56:ST3_smx:INFO: Configuring SMX FAST
09:11:58:ST3_smx:INFO: chip: 14-7 40.898880 C 1218.600960 mV
09:11:58:ST3_smx:INFO: Electrons
09:11:58:ST3_smx:INFO: # loops 0
09:12:00:ST3_smx:INFO: # loops 1
09:12:01:ST3_smx:INFO: # loops 2
09:12:03:ST3_smx:INFO: Total # of broken channels: 0
09:12:03:ST3_smx:INFO: List of broken channels: []
09:12:03:ST3_smx:INFO: Total # of broken channels: 0
09:12:03:ST3_smx:INFO: List of broken channels: []
09:12:04:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:12:04:febtest:INFO: 01-00 | XA-000-08-003-000-001-072-12 | 56.8 | 1135.9
09:12:04:febtest:INFO: 08-01 | XA-000-08-003-000-001-067-12 | 53.6 | 1147.8
09:12:04:febtest:INFO: 03-02 | XA-000-08-003-000-001-068-12 | 60.0 | 1141.9
09:12:05:febtest:INFO: 10-03 | XA-000-08-003-000-001-074-12 | 50.4 | 1171.5
09:12:05:febtest:INFO: 05-04 | XA-000-08-003-000-001-123-05 | 40.9 | 1189.2
09:12:05:febtest:INFO: 12-05 | XA-000-08-003-000-001-070-12 | 47.3 | 1189.2
09:12:05:febtest:INFO: 07-06 | XA-000-08-003-000-001-071-12 | 56.8 | 1147.8
09:12:05:febtest:INFO: 14-07 | XA-000-08-003-000-001-066-12 | 40.9 | 1218.6
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_05_13-09_10_45
OPERATOR : Henrik; Benjamin;
SITE : KIT
SETUP : KIT_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME :
FEB_SN : 3006
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.199', '1.6720', '2.804', '2.4030', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.200', '2.0070', '2.800', '0.5908', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.200', '2.0030', '2.800', '0.3312', '0.000', '0.0000', '0.000', '0.0000']