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FEB_3007 21.03.24 09:23:43
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09:23:43:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:23:43:ST3_Shared:INFO: FEB-Sensor
09:23:43:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:24:00:ST3_ModuleSelector:INFO: L5UL301017 M5UL3T1010171B2 62 B
09:24:00:ST3_ModuleSelector:INFO: 21433
09:24:00:febtest:INFO: Testing FEB with SN 3007
09:24:03:smx_tester:INFO: Scanning setup
09:24:03:elinks:INFO: Disabling clock on downlink 0
09:24:03:elinks:INFO: Disabling clock on downlink 1
09:24:03:elinks:INFO: Disabling clock on downlink 2
09:24:03:elinks:INFO: Disabling clock on downlink 3
09:24:03:elinks:INFO: Disabling clock on downlink 4
09:24:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:24:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:24:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:24:03:elinks:INFO: Disabling clock on downlink 0
09:24:03:elinks:INFO: Disabling clock on downlink 1
09:24:03:elinks:INFO: Disabling clock on downlink 2
09:24:03:elinks:INFO: Disabling clock on downlink 3
09:24:03:elinks:INFO: Disabling clock on downlink 4
09:24:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:24:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:24:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
09:24:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
09:24:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
09:24:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
09:24:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
09:24:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
09:24:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
09:24:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
09:24:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
09:24:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
09:24:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
09:24:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
09:24:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
09:24:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
09:24:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
09:24:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
09:24:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:24:03:elinks:INFO: Disabling clock on downlink 0
09:24:03:elinks:INFO: Disabling clock on downlink 1
09:24:03:elinks:INFO: Disabling clock on downlink 2
09:24:03:elinks:INFO: Disabling clock on downlink 3
09:24:03:elinks:INFO: Disabling clock on downlink 4
09:24:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:24:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:24:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:24:03:elinks:INFO: Disabling clock on downlink 0
09:24:03:elinks:INFO: Disabling clock on downlink 1
09:24:03:elinks:INFO: Disabling clock on downlink 2
09:24:03:elinks:INFO: Disabling clock on downlink 3
09:24:03:elinks:INFO: Disabling clock on downlink 4
09:24:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:24:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:24:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:24:04:elinks:INFO: Disabling clock on downlink 0
09:24:04:elinks:INFO: Disabling clock on downlink 1
09:24:04:elinks:INFO: Disabling clock on downlink 2
09:24:04:elinks:INFO: Disabling clock on downlink 3
09:24:04:elinks:INFO: Disabling clock on downlink 4
09:24:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:24:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:24:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:24:04:setup_element:INFO: Scanning clock phase
09:24:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:24:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:24:04:setup_element:INFO: Clock phase scan results for group 0, downlink 1
09:24:04:setup_element:INFO: Eye window for uplink 0 : _____________________________________________________________________XXXXXX_____
Clock Delay: 31
09:24:04:setup_element:INFO: Eye window for uplink 1 : _____________________________________________________________________XXXXXX_____
Clock Delay: 31
09:24:04:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXX____
Clock Delay: 33
09:24:04:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXX____
Clock Delay: 33
09:24:04:setup_element:INFO: Eye window for uplink 4 : _____________________________________________________________________XXXX_______
Clock Delay: 30
09:24:04:setup_element:INFO: Eye window for uplink 5 : _____________________________________________________________________XXXX_______
Clock Delay: 30
09:24:04:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
09:24:04:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
09:24:04:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXX______
Clock Delay: 31
09:24:04:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXX______
Clock Delay: 31
09:24:04:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXX______
Clock Delay: 31
09:24:04:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXX______
Clock Delay: 31
09:24:04:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXX_____
Clock Delay: 32
09:24:04:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXX_____
Clock Delay: 32
09:24:04:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXX______
Clock Delay: 31
09:24:04:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXX______
Clock Delay: 31
09:24:04:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1
09:24:04:setup_element:INFO: Scanning data phases
09:24:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:24:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:24:09:setup_element:INFO: Data phase scan results for group 0, downlink 1
09:24:09:setup_element:INFO: Eye window for uplink 0 : XXX_________________________________XXXX
Data delay found: 19
09:24:09:setup_element:INFO: Eye window for uplink 1 : ________________________________XXXXXX__
Data delay found: 14
09:24:09:setup_element:INFO: Eye window for uplink 2 : XXXXX________________________________XXX
Data delay found: 20
09:24:09:setup_element:INFO: Eye window for uplink 3 : __________________________________XXXXXX
Data delay found: 16
09:24:09:setup_element:INFO: Eye window for uplink 4 : ______________________________XXXXX_____
Data delay found: 12
09:24:09:setup_element:INFO: Eye window for uplink 5 : __________________________XXXXXX________
Data delay found: 8
09:24:09:setup_element:INFO: Eye window for uplink 6 : ______________________________XXXXXX____
Data delay found: 12
09:24:09:setup_element:INFO: Eye window for uplink 7 : __________________________XXXXX_________
Data delay found: 8
09:24:09:setup_element:INFO: Eye window for uplink 8 : _____________XXXXXXXX___________________
Data delay found: 36
09:24:09:setup_element:INFO: Eye window for uplink 9 : __________________XXXXXXXX______________
Data delay found: 1
09:24:09:setup_element:INFO: Eye window for uplink 10: ______________XXXXXXX___________________
Data delay found: 37
09:24:09:setup_element:INFO: Eye window for uplink 11: __________________XXXXXXX_______________
Data delay found: 1
09:24:09:setup_element:INFO: Eye window for uplink 12: ________________XXXXXX__________________
Data delay found: 38
09:24:09:setup_element:INFO: Eye window for uplink 13: ____________________XXXXX_______________
Data delay found: 2
09:24:09:setup_element:INFO: Eye window for uplink 14: _________________XXXXXX_________________
Data delay found: 39
09:24:09:setup_element:INFO: Eye window for uplink 15: ____________________XXXXX_______________
Data delay found: 2
09:24:09:setup_element:INFO: Setting the data phase to 19 for uplink 0
09:24:09:setup_element:INFO: Setting the data phase to 14 for uplink 1
09:24:09:setup_element:INFO: Setting the data phase to 20 for uplink 2
09:24:09:setup_element:INFO: Setting the data phase to 16 for uplink 3
09:24:09:setup_element:INFO: Setting the data phase to 12 for uplink 4
09:24:09:setup_element:INFO: Setting the data phase to 8 for uplink 5
09:24:09:setup_element:INFO: Setting the data phase to 12 for uplink 6
09:24:09:setup_element:INFO: Setting the data phase to 8 for uplink 7
09:24:09:setup_element:INFO: Setting the data phase to 36 for uplink 8
09:24:09:setup_element:INFO: Setting the data phase to 1 for uplink 9
09:24:09:setup_element:INFO: Setting the data phase to 37 for uplink 10
09:24:09:setup_element:INFO: Setting the data phase to 1 for uplink 11
09:24:09:setup_element:INFO: Setting the data phase to 38 for uplink 12
09:24:09:setup_element:INFO: Setting the data phase to 2 for uplink 13
09:24:09:setup_element:INFO: Setting the data phase to 39 for uplink 14
09:24:09:setup_element:INFO: Setting the data phase to 2 for uplink 15
09:24:09:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 72
Eye Windows:
Uplink 0: _____________________________________________________________________XXXXXX_____
Uplink 1: _____________________________________________________________________XXXXXX_____
Uplink 2: _______________________________________________________________________XXXXX____
Uplink 3: _______________________________________________________________________XXXXX____
Uplink 4: _____________________________________________________________________XXXX_______
Uplink 5: _____________________________________________________________________XXXX_______
Uplink 6: _______________________________________________________________________XXXXXX___
Uplink 7: _______________________________________________________________________XXXXXX___
Uplink 8: _____________________________________________________________________XXXXX______
Uplink 9: _____________________________________________________________________XXXXX______
Uplink 10: _____________________________________________________________________XXXXX______
Uplink 11: _____________________________________________________________________XXXXX______
Uplink 12: ______________________________________________________________________XXXXX_____
Uplink 13: ______________________________________________________________________XXXXX_____
Uplink 14: ______________________________________________________________________XXXX______
Uplink 15: ______________________________________________________________________XXXX______
Data phase characteristics:
Uplink 0:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
Uplink 1:
Optimal Phase: 14
Window Length: 34
Eye Window: ________________________________XXXXXX__
Uplink 2:
Optimal Phase: 20
Window Length: 32
Eye Window: XXXXX________________________________XXX
Uplink 3:
Optimal Phase: 16
Window Length: 34
Eye Window: __________________________________XXXXXX
Uplink 4:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 5:
Optimal Phase: 8
Window Length: 34
Eye Window: __________________________XXXXXX________
Uplink 6:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 7:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 8:
Optimal Phase: 36
Window Length: 32
Eye Window: _____________XXXXXXXX___________________
Uplink 9:
Optimal Phase: 1
Window Length: 32
Eye Window: __________________XXXXXXXX______________
Uplink 10:
Optimal Phase: 37
Window Length: 33
Eye Window: ______________XXXXXXX___________________
Uplink 11:
Optimal Phase: 1
Window Length: 33
Eye Window: __________________XXXXXXX_______________
Uplink 12:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
Uplink 13:
Optimal Phase: 2
Window Length: 35
Eye Window: ____________________XXXXX_______________
Uplink 14:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
Uplink 15:
Optimal Phase: 2
Window Length: 35
Eye Window: ____________________XXXXX_______________
]
09:24:09:setup_element:INFO: Beginning SMX ASICs map scan
09:24:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:24:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:24:09:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:24:09:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:24:09:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:24:09:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:24:09:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:24:10:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:24:10:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:24:10:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:24:10:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:24:10:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:24:10:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:24:10:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:24:10:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:24:10:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:24:10:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:24:11:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:24:11:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:24:11:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:24:11:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:24:12:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 72
Eye Windows:
Uplink 0: _____________________________________________________________________XXXXXX_____
Uplink 1: _____________________________________________________________________XXXXXX_____
Uplink 2: _______________________________________________________________________XXXXX____
Uplink 3: _______________________________________________________________________XXXXX____
Uplink 4: _____________________________________________________________________XXXX_______
Uplink 5: _____________________________________________________________________XXXX_______
Uplink 6: _______________________________________________________________________XXXXXX___
Uplink 7: _______________________________________________________________________XXXXXX___
Uplink 8: _____________________________________________________________________XXXXX______
Uplink 9: _____________________________________________________________________XXXXX______
Uplink 10: _____________________________________________________________________XXXXX______
Uplink 11: _____________________________________________________________________XXXXX______
Uplink 12: ______________________________________________________________________XXXXX_____
Uplink 13: ______________________________________________________________________XXXXX_____
Uplink 14: ______________________________________________________________________XXXX______
Uplink 15: ______________________________________________________________________XXXX______
Data phase characteristics:
Uplink 0:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
Uplink 1:
Optimal Phase: 14
Window Length: 34
Eye Window: ________________________________XXXXXX__
Uplink 2:
Optimal Phase: 20
Window Length: 32
Eye Window: XXXXX________________________________XXX
Uplink 3:
Optimal Phase: 16
Window Length: 34
Eye Window: __________________________________XXXXXX
Uplink 4:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 5:
Optimal Phase: 8
Window Length: 34
Eye Window: __________________________XXXXXX________
Uplink 6:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 7:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 8:
Optimal Phase: 36
Window Length: 32
Eye Window: _____________XXXXXXXX___________________
Uplink 9:
Optimal Phase: 1
Window Length: 32
Eye Window: __________________XXXXXXXX______________
Uplink 10:
Optimal Phase: 37
Window Length: 33
Eye Window: ______________XXXXXXX___________________
Uplink 11:
Optimal Phase: 1
Window Length: 33
Eye Window: __________________XXXXXXX_______________
Uplink 12:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
Uplink 13:
Optimal Phase: 2
Window Length: 35
Eye Window: ____________________XXXXX_______________
Uplink 14:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
Uplink 15:
Optimal Phase: 2
Window Length: 35
Eye Window: ____________________XXXXX_______________
09:24:12:setup_element:INFO: Performing Elink synchronization
09:24:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:24:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:24:12:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:24:12:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:24:12:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
09:24:12:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:24:12:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
FEB type: A FEB_A: 1 FEB_B: 0
09:24:13:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:24:14:febtest:INFO: 01-00 | XA-000-08-003-000-001-081-11 | 12.4 | 1300.3
09:24:14:febtest:INFO: 08-01 | XA-000-08-003-000-001-024-14 | 15.6 | 1277.1
09:24:14:febtest:INFO: 03-02 | XA-000-08-003-000-001-090-11 | 6.1 | 1306.1
09:24:14:febtest:INFO: 10-03 | XA-000-08-003-000-001-019-14 | 15.6 | 1294.5
09:24:14:febtest:INFO: 05-04 | XA-000-08-003-000-001-086-11 | -15.8 | 1398.2
09:24:15:febtest:INFO: 12-05 | XA-000-08-003-000-001-015-09 | 18.7 | 1271.2
09:24:15:febtest:INFO: 07-06 | XA-000-08-003-000-001-080-11 | -6.4 | 1363.8
09:24:15:febtest:INFO: 14-07 | XA-000-08-003-000-001-026-14 | 18.7 | 1288.7
09:24:16:ST3_smx:INFO: Configuring SMX FAST
09:24:18:ST3_smx:INFO: chip: 1-0 9.288730 C 1311.880960 mV
09:24:18:ST3_smx:INFO: Electrons
09:24:18:ST3_smx:INFO: # loops 0
09:24:20:ST3_smx:INFO: # loops 1
09:24:22:ST3_smx:INFO: # loops 2
09:24:24:ST3_smx:INFO: # loops 3
09:24:27:ST3_smx:INFO: # loops 4
09:24:29:ST3_smx:INFO: Total # of broken channels: 0
09:24:29:ST3_smx:INFO: List of broken channels: []
09:24:29:ST3_smx:INFO: Total # of broken channels: 0
09:24:29:ST3_smx:INFO: List of broken channels: []
09:24:30:ST3_smx:INFO: Configuring SMX FAST
09:24:32:ST3_smx:INFO: chip: 8-1 18.745682 C 1271.227515 mV
09:24:32:ST3_smx:INFO: Electrons
09:24:32:ST3_smx:INFO: # loops 0
09:24:34:ST3_smx:INFO: # loops 1
09:24:37:ST3_smx:INFO: # loops 2
09:24:39:ST3_smx:INFO: # loops 3
09:24:41:ST3_smx:INFO: # loops 4
09:24:44:ST3_smx:INFO: Total # of broken channels: 0
09:24:44:ST3_smx:INFO: List of broken channels: []
09:24:44:ST3_smx:INFO: Total # of broken channels: 0
09:24:44:ST3_smx:INFO: List of broken channels: []
09:24:45:ST3_smx:INFO: Configuring SMX FAST
09:24:47:ST3_smx:INFO: chip: 3-2 15.590880 C 1282.867635 mV
09:24:47:ST3_smx:INFO: Electrons
09:24:47:ST3_smx:INFO: # loops 0
09:24:50:ST3_smx:INFO: # loops 1
09:24:52:ST3_smx:INFO: # loops 2
09:24:54:ST3_smx:INFO: # loops 3
09:24:56:ST3_smx:INFO: # loops 4
09:24:58:ST3_smx:INFO: Total # of broken channels: 0
09:24:58:ST3_smx:INFO: List of broken channels: []
09:24:58:ST3_smx:INFO: Total # of broken channels: 1
09:24:58:ST3_smx:INFO: List of broken channels: [42]
09:24:59:ST3_smx:INFO: Configuring SMX FAST
09:25:02:ST3_smx:INFO: chip: 10-3 18.745682 C 1294.487875 mV
09:25:02:ST3_smx:INFO: Electrons
09:25:02:ST3_smx:INFO: # loops 0
09:25:04:ST3_smx:INFO: # loops 1
09:25:06:ST3_smx:INFO: # loops 2
09:25:08:ST3_smx:INFO: # loops 3
09:25:10:ST3_smx:INFO: # loops 4
09:25:12:ST3_smx:INFO: Total # of broken channels: 0
09:25:12:ST3_smx:INFO: List of broken channels: []
09:25:12:ST3_smx:INFO: Total # of broken channels: 0
09:25:12:ST3_smx:INFO: List of broken channels: []
09:25:13:ST3_smx:INFO: Configuring SMX FAST
09:25:16:ST3_smx:INFO: chip: 5-4 -9.558080 C 1392.457260 mV
09:25:16:ST3_smx:INFO: Electrons
09:25:16:ST3_smx:INFO: # loops 0
09:25:18:ST3_smx:INFO: # loops 1
09:25:20:ST3_smx:INFO: # loops 2
09:25:22:ST3_smx:INFO: # loops 3
09:25:24:ST3_smx:INFO: # loops 4
09:25:26:ST3_smx:INFO: Total # of broken channels: 0
09:25:26:ST3_smx:INFO: List of broken channels: []
09:25:26:ST3_smx:INFO: Total # of broken channels: 0
09:25:26:ST3_smx:INFO: List of broken channels: []
09:25:27:ST3_smx:INFO: Configuring SMX FAST
09:25:30:ST3_smx:INFO: chip: 12-5 18.745682 C 1288.680240 mV
09:25:30:ST3_smx:INFO: Electrons
09:25:30:ST3_smx:INFO: # loops 0
09:25:32:ST3_smx:INFO: # loops 1
09:25:34:ST3_smx:INFO: # loops 2
09:25:36:ST3_smx:INFO: # loops 3
09:25:38:ST3_smx:INFO: # loops 4
09:25:40:ST3_smx:INFO: Total # of broken channels: 0
09:25:40:ST3_smx:INFO: List of broken channels: []
09:25:40:ST3_smx:INFO: Total # of broken channels: 0
09:25:40:ST3_smx:INFO: List of broken channels: []
09:25:41:ST3_smx:INFO: Configuring SMX FAST
09:25:43:ST3_smx:INFO: chip: 7-6 -6.423158 C 1392.457260 mV
09:25:43:ST3_smx:INFO: Electrons
09:25:43:ST3_smx:INFO: # loops 0
09:25:45:ST3_smx:INFO: # loops 1
09:25:47:ST3_smx:INFO: # loops 2
09:25:50:ST3_smx:INFO: # loops 3
09:25:52:ST3_smx:INFO: # loops 4
09:25:54:ST3_smx:INFO: Total # of broken channels: 0
09:25:54:ST3_smx:INFO: List of broken channels: []
09:25:54:ST3_smx:INFO: Total # of broken channels: 0
09:25:54:ST3_smx:INFO: List of broken channels: []
09:25:55:ST3_smx:INFO: Configuring SMX FAST
09:25:57:ST3_smx:INFO: chip: 14-7 9.288730 C 1329.229315 mV
09:25:57:ST3_smx:INFO: Electrons
09:25:57:ST3_smx:INFO: # loops 0
09:25:59:ST3_smx:INFO: # loops 1
09:26:01:ST3_smx:INFO: # loops 2
09:26:04:ST3_smx:INFO: # loops 3
09:26:06:ST3_smx:INFO: # loops 4
09:26:08:ST3_smx:INFO: Total # of broken channels: 0
09:26:08:ST3_smx:INFO: List of broken channels: []
09:26:08:ST3_smx:INFO: Total # of broken channels: 0
09:26:08:ST3_smx:INFO: List of broken channels: []
09:26:09:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:26:09:febtest:INFO: 01-00 | XA-000-08-003-000-001-081-11 | -3.3 | 1375.3
09:26:09:febtest:INFO: 08-01 | XA-000-08-003-000-001-024-14 | 6.1 | 1329.2
09:26:10:febtest:INFO: 03-02 | XA-000-08-003-000-001-090-11 | 6.1 | 1317.7
09:26:10:febtest:INFO: 10-03 | XA-000-08-003-000-001-019-14 | 9.3 | 1329.2
09:26:10:febtest:INFO: 05-04 | XA-000-08-003-000-001-086-11 | -15.8 | 1426.7
09:26:10:febtest:INFO: 12-05 | XA-000-08-003-000-001-015-09 | 15.6 | 1306.1
09:26:11:febtest:INFO: 07-06 | XA-000-08-003-000-001-080-11 | -3.3 | 1398.2
09:26:11:febtest:INFO: 14-07 | XA-000-08-003-000-001-026-14 | 9.3 | 1335.0
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_03_21-09_23_43
OPERATOR : Henrik;
SITE : KIT
SETUP : KIT_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L5UL301017 M5UL3T1010171B2 62 B
FEB_SN : 3007
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID: 21433
MODULE_NAME: L5UL301017 M5UL3T1010171B2 62 B
MODULE_TYPE:
MODULE_LADDER: L5UL301017
MODULE_MODULE: M5UL3T1010171B2
MODULE_SIZE: 62
MODULE_GRADE: B
---------------------------------------
VI_before_Init : ['2.200', '1.5590', '2.800', '0.4554', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.200', '1.6530', '2.800', '0.4771', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.200', '1.6520', '2.800', '0.3264', '0.000', '0.0000', '0.000', '0.0000']