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FEB_3009 02.04.24 08:05:50
Info
08:05:50:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:05:50:ST3_Shared:INFO: FEB-Sensor
08:05:50:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:05:52:ST3_ModuleSelector:INFO: L5UL301017 M5UL3B0010170A2 42 B
08:05:52:ST3_ModuleSelector:INFO: 10272
08:05:53:febtest:INFO: Testing FEB with SN 3009
08:05:56:smx_tester:INFO: Scanning setup
08:05:56:elinks:INFO: Disabling clock on downlink 0
08:05:56:elinks:INFO: Disabling clock on downlink 1
08:05:56:elinks:INFO: Disabling clock on downlink 2
08:05:56:elinks:INFO: Disabling clock on downlink 3
08:05:56:elinks:INFO: Disabling clock on downlink 4
08:05:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:05:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:05:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:05:56:elinks:INFO: Disabling clock on downlink 0
08:05:56:elinks:INFO: Disabling clock on downlink 1
08:05:56:elinks:INFO: Disabling clock on downlink 2
08:05:56:elinks:INFO: Disabling clock on downlink 3
08:05:56:elinks:INFO: Disabling clock on downlink 4
08:05:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:05:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:05:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
08:05:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
08:05:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
08:05:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
08:05:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
08:05:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
08:05:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
08:05:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
08:05:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
08:05:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
08:05:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
08:05:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
08:05:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
08:05:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
08:05:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
08:05:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
08:05:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:05:56:elinks:INFO: Disabling clock on downlink 0
08:05:56:elinks:INFO: Disabling clock on downlink 1
08:05:56:elinks:INFO: Disabling clock on downlink 2
08:05:56:elinks:INFO: Disabling clock on downlink 3
08:05:56:elinks:INFO: Disabling clock on downlink 4
08:05:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:05:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:05:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:05:56:elinks:INFO: Disabling clock on downlink 0
08:05:56:elinks:INFO: Disabling clock on downlink 1
08:05:56:elinks:INFO: Disabling clock on downlink 2
08:05:56:elinks:INFO: Disabling clock on downlink 3
08:05:56:elinks:INFO: Disabling clock on downlink 4
08:05:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:05:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:05:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:05:56:elinks:INFO: Disabling clock on downlink 0
08:05:56:elinks:INFO: Disabling clock on downlink 1
08:05:56:elinks:INFO: Disabling clock on downlink 2
08:05:56:elinks:INFO: Disabling clock on downlink 3
08:05:56:elinks:INFO: Disabling clock on downlink 4
08:05:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:05:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:05:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:05:56:setup_element:INFO: Scanning clock phase
08:05:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:05:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:05:57:setup_element:INFO: Clock phase scan results for group 0, downlink 1
08:05:57:setup_element:INFO: Eye window for uplink 0 : _____________________________________________________________________XXXX_______
Clock Delay: 30
08:05:57:setup_element:INFO: Eye window for uplink 1 : _____________________________________________________________________XXXX_______
Clock Delay: 30
08:05:57:setup_element:INFO: Eye window for uplink 2 : _____________________________________________________________________XXXX_______
Clock Delay: 30
08:05:57:setup_element:INFO: Eye window for uplink 3 : _____________________________________________________________________XXXX_______
Clock Delay: 30
08:05:57:setup_element:INFO: Eye window for uplink 4 : __________________________________________________________________XXXX__________
Clock Delay: 27
08:05:57:setup_element:INFO: Eye window for uplink 5 : __________________________________________________________________XXXX__________
Clock Delay: 27
08:05:57:setup_element:INFO: Eye window for uplink 6 : _____________________________________________________________________XXX________
Clock Delay: 30
08:05:57:setup_element:INFO: Eye window for uplink 7 : _____________________________________________________________________XXX________
Clock Delay: 30
08:05:57:setup_element:INFO: Eye window for uplink 8 : _________________________________________________________________XXXXXX_________
Clock Delay: 27
08:05:57:setup_element:INFO: Eye window for uplink 9 : _________________________________________________________________XXXXXX_________
Clock Delay: 27
08:05:57:setup_element:INFO: Eye window for uplink 10: __________________________________________________________________XXXXX_________
Clock Delay: 28
08:05:57:setup_element:INFO: Eye window for uplink 11: __________________________________________________________________XXXXX_________
Clock Delay: 28
08:05:57:setup_element:INFO: Eye window for uplink 12: ____________________________________________________________________XXXXXX______
Clock Delay: 30
08:05:57:setup_element:INFO: Eye window for uplink 13: ____________________________________________________________________XXXXXX______
Clock Delay: 30
08:05:57:setup_element:INFO: Eye window for uplink 14: ____________________________________________________________________XXXX________
Clock Delay: 29
08:05:57:setup_element:INFO: Eye window for uplink 15: ____________________________________________________________________XXXX________
Clock Delay: 29
08:05:57:setup_element:INFO: Setting the clock phase to 29 for group 0, downlink 1
08:05:57:setup_element:INFO: Scanning data phases
08:05:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:05:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:06:02:setup_element:INFO: Data phase scan results for group 0, downlink 1
08:06:02:setup_element:INFO: Eye window for uplink 0 : XXXXX_________________________________XX
Data delay found: 21
08:06:02:setup_element:INFO: Eye window for uplink 1 : X________________________________XXXXXXX
Data delay found: 16
08:06:02:setup_element:INFO: Eye window for uplink 2 : _________________________________XXXXXXX
Data delay found: 16
08:06:02:setup_element:INFO: Eye window for uplink 3 : ______________________________XXXXX_____
Data delay found: 12
08:06:02:setup_element:INFO: Eye window for uplink 4 : ___________________________XXXXXX_______
Data delay found: 9
08:06:02:setup_element:INFO: Eye window for uplink 5 : ______________________XXXXXXX___________
Data delay found: 5
08:06:02:setup_element:INFO: Eye window for uplink 6 : ________________________XXXXXXX_________
Data delay found: 7
08:06:02:setup_element:INFO: Eye window for uplink 7 : ___________________XXXXXXXX_____________
Data delay found: 2
08:06:02:setup_element:INFO: Eye window for uplink 8 : _________XXXXXXXX_______________________
Data delay found: 32
08:06:02:setup_element:INFO: Eye window for uplink 9 : ______________XXXXXXXX__________________
Data delay found: 37
08:06:02:setup_element:INFO: Eye window for uplink 10: ____________XXXXXXXXX___________________
Data delay found: 36
08:06:02:setup_element:INFO: Eye window for uplink 11: ________________XXXXXXXXX_______________
Data delay found: 0
08:06:02:setup_element:INFO: Eye window for uplink 12: _______________XXXXXXXX_________________
Data delay found: 38
08:06:02:setup_element:INFO: Eye window for uplink 13: ____________________XXXXXX______________
Data delay found: 2
08:06:02:setup_element:INFO: Eye window for uplink 14: ______________XXXXXXX___________________
Data delay found: 37
08:06:02:setup_element:INFO: Eye window for uplink 15: _________________XXXXXXX________________
Data delay found: 0
08:06:02:setup_element:INFO: Setting the data phase to 21 for uplink 0
08:06:02:setup_element:INFO: Setting the data phase to 16 for uplink 1
08:06:02:setup_element:INFO: Setting the data phase to 16 for uplink 2
08:06:02:setup_element:INFO: Setting the data phase to 12 for uplink 3
08:06:02:setup_element:INFO: Setting the data phase to 9 for uplink 4
08:06:02:setup_element:INFO: Setting the data phase to 5 for uplink 5
08:06:02:setup_element:INFO: Setting the data phase to 7 for uplink 6
08:06:02:setup_element:INFO: Setting the data phase to 2 for uplink 7
08:06:02:setup_element:INFO: Setting the data phase to 32 for uplink 8
08:06:02:setup_element:INFO: Setting the data phase to 37 for uplink 9
08:06:02:setup_element:INFO: Setting the data phase to 36 for uplink 10
08:06:02:setup_element:INFO: Setting the data phase to 0 for uplink 11
08:06:02:setup_element:INFO: Setting the data phase to 38 for uplink 12
08:06:02:setup_element:INFO: Setting the data phase to 2 for uplink 13
08:06:02:setup_element:INFO: Setting the data phase to 37 for uplink 14
08:06:02:setup_element:INFO: Setting the data phase to 0 for uplink 15
08:06:02:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 29
Window Length: 71
Eye Windows:
Uplink 0: _____________________________________________________________________XXXX_______
Uplink 1: _____________________________________________________________________XXXX_______
Uplink 2: _____________________________________________________________________XXXX_______
Uplink 3: _____________________________________________________________________XXXX_______
Uplink 4: __________________________________________________________________XXXX__________
Uplink 5: __________________________________________________________________XXXX__________
Uplink 6: _____________________________________________________________________XXX________
Uplink 7: _____________________________________________________________________XXX________
Uplink 8: _________________________________________________________________XXXXXX_________
Uplink 9: _________________________________________________________________XXXXXX_________
Uplink 10: __________________________________________________________________XXXXX_________
Uplink 11: __________________________________________________________________XXXXX_________
Uplink 12: ____________________________________________________________________XXXXXX______
Uplink 13: ____________________________________________________________________XXXXXX______
Uplink 14: ____________________________________________________________________XXXX________
Uplink 15: ____________________________________________________________________XXXX________
Data phase characteristics:
Uplink 0:
Optimal Phase: 21
Window Length: 33
Eye Window: XXXXX_________________________________XX
Uplink 1:
Optimal Phase: 16
Window Length: 32
Eye Window: X________________________________XXXXXXX
Uplink 2:
Optimal Phase: 16
Window Length: 33
Eye Window: _________________________________XXXXXXX
Uplink 3:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 4:
Optimal Phase: 9
Window Length: 34
Eye Window: ___________________________XXXXXX_______
Uplink 5:
Optimal Phase: 5
Window Length: 33
Eye Window: ______________________XXXXXXX___________
Uplink 6:
Optimal Phase: 7
Window Length: 33
Eye Window: ________________________XXXXXXX_________
Uplink 7:
Optimal Phase: 2
Window Length: 32
Eye Window: ___________________XXXXXXXX_____________
Uplink 8:
Optimal Phase: 32
Window Length: 32
Eye Window: _________XXXXXXXX_______________________
Uplink 9:
Optimal Phase: 37
Window Length: 32
Eye Window: ______________XXXXXXXX__________________
Uplink 10:
Optimal Phase: 36
Window Length: 31
Eye Window: ____________XXXXXXXXX___________________
Uplink 11:
Optimal Phase: 0
Window Length: 31
Eye Window: ________________XXXXXXXXX_______________
Uplink 12:
Optimal Phase: 38
Window Length: 32
Eye Window: _______________XXXXXXXX_________________
Uplink 13:
Optimal Phase: 2
Window Length: 34
Eye Window: ____________________XXXXXX______________
Uplink 14:
Optimal Phase: 37
Window Length: 33
Eye Window: ______________XXXXXXX___________________
Uplink 15:
Optimal Phase: 0
Window Length: 33
Eye Window: _________________XXXXXXX________________
]
08:06:02:setup_element:INFO: Beginning SMX ASICs map scan
08:06:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:06:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:06:02:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:06:02:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:06:02:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:06:02:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
08:06:02:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
08:06:02:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:06:02:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:06:03:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
08:06:03:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
08:06:03:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:06:03:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:06:03:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
08:06:03:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
08:06:03:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:06:03:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:06:03:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
08:06:03:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
08:06:03:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:06:03:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:06:05:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 29
Window Length: 71
Eye Windows:
Uplink 0: _____________________________________________________________________XXXX_______
Uplink 1: _____________________________________________________________________XXXX_______
Uplink 2: _____________________________________________________________________XXXX_______
Uplink 3: _____________________________________________________________________XXXX_______
Uplink 4: __________________________________________________________________XXXX__________
Uplink 5: __________________________________________________________________XXXX__________
Uplink 6: _____________________________________________________________________XXX________
Uplink 7: _____________________________________________________________________XXX________
Uplink 8: _________________________________________________________________XXXXXX_________
Uplink 9: _________________________________________________________________XXXXXX_________
Uplink 10: __________________________________________________________________XXXXX_________
Uplink 11: __________________________________________________________________XXXXX_________
Uplink 12: ____________________________________________________________________XXXXXX______
Uplink 13: ____________________________________________________________________XXXXXX______
Uplink 14: ____________________________________________________________________XXXX________
Uplink 15: ____________________________________________________________________XXXX________
Data phase characteristics:
Uplink 0:
Optimal Phase: 21
Window Length: 33
Eye Window: XXXXX_________________________________XX
Uplink 1:
Optimal Phase: 16
Window Length: 32
Eye Window: X________________________________XXXXXXX
Uplink 2:
Optimal Phase: 16
Window Length: 33
Eye Window: _________________________________XXXXXXX
Uplink 3:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 4:
Optimal Phase: 9
Window Length: 34
Eye Window: ___________________________XXXXXX_______
Uplink 5:
Optimal Phase: 5
Window Length: 33
Eye Window: ______________________XXXXXXX___________
Uplink 6:
Optimal Phase: 7
Window Length: 33
Eye Window: ________________________XXXXXXX_________
Uplink 7:
Optimal Phase: 2
Window Length: 32
Eye Window: ___________________XXXXXXXX_____________
Uplink 8:
Optimal Phase: 32
Window Length: 32
Eye Window: _________XXXXXXXX_______________________
Uplink 9:
Optimal Phase: 37
Window Length: 32
Eye Window: ______________XXXXXXXX__________________
Uplink 10:
Optimal Phase: 36
Window Length: 31
Eye Window: ____________XXXXXXXXX___________________
Uplink 11:
Optimal Phase: 0
Window Length: 31
Eye Window: ________________XXXXXXXXX_______________
Uplink 12:
Optimal Phase: 38
Window Length: 32
Eye Window: _______________XXXXXXXX_________________
Uplink 13:
Optimal Phase: 2
Window Length: 34
Eye Window: ____________________XXXXXX______________
Uplink 14:
Optimal Phase: 37
Window Length: 33
Eye Window: ______________XXXXXXX___________________
Uplink 15:
Optimal Phase: 0
Window Length: 33
Eye Window: _________________XXXXXXX________________
08:06:05:setup_element:INFO: Performing Elink synchronization
08:06:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:06:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:06:05:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:06:05:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:06:05:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
08:06:05:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:06:05:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_8 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_1__upli_8
FEB type: A FEB_A: 1 FEB_B: 0
08:06:06:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:06:06:febtest:INFO: 01-00 | XA-000-08-003-000-000-178-07 | -120.8 | 1578.5
08:06:07:febtest:INFO: 08-01 | XA-000-08-003-000-000-174-00 | -102.5 | 1578.5
08:06:07:febtest:INFO: 03-02 | XA-000-08-003-000-000-173-00 | -129.9 | 1578.5
08:06:07:febtest:INFO: 10-03 | XA-000-08-003-000-000-181-07 | -123.8 | 1578.5
08:06:07:febtest:INFO: 05-04 | XA-000-08-003-000-000-182-07 | -108.6 | 1578.5
08:06:07:febtest:INFO: 12-05 | XA-000-08-003-000-000-180-07 | -117.7 | 1578.5
08:06:08:febtest:INFO: 07-06 | XA-000-08-003-000-000-179-07 | -120.8 | 1578.5
08:06:08:febtest:INFO: 14-07 | XA-000-08-003-000-000-175-00 | -111.6 | 1578.5
08:06:08:ST3_smx:INFO: Configuring SMX FAST
08:06:11:ST3_smx:INFO: chip: 1-0 -108.563520 C 1578.532875 mV
08:06:11:ST3_smx:INFO: Electrons
08:06:11:ST3_smx:INFO: # loops 0
08:06:13:ST3_smx:INFO: # loops 1
08:06:15:ST3_smx:INFO: # loops 2
08:06:17:ST3_smx:INFO: # loops 3
08:06:19:ST3_smx:INFO: # loops 4
08:06:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:06:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:06:21:ST3_smx:INFO: Total # of broken channels: 128
08:06:21:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
08:06:21:ST3_smx:INFO: Total # of broken channels: 128
08:06:21:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
08:06:22:ST3_smx:INFO: Configuring SMX FAST
08:06:24:ST3_smx:INFO: chip: 8-1 9.288730 C 1306.088235 mV
08:06:24:ST3_smx:INFO: Electrons
08:06:24:ST3_smx:INFO: # loops 0
08:06:26:ST3_smx:INFO: # loops 1
08:06:28:ST3_smx:INFO: # loops 2
08:06:30:ST3_smx:INFO: # loops 3
08:06:31:ST3_smx:INFO: # loops 4
08:06:33:ST3_smx:INFO: Total # of broken channels: 0
08:06:33:ST3_smx:INFO: List of broken channels: []
08:06:33:ST3_smx:INFO: Total # of broken channels: 0
08:06:33:ST3_smx:INFO: List of broken channels: []
08:06:34:ST3_smx:INFO: Configuring SMX FAST
08:06:36:ST3_smx:INFO: chip: 3-2 -6.423158 C 1363.791835 mV
08:06:36:ST3_smx:INFO: Electrons
08:06:36:ST3_smx:INFO: # loops 0
08:06:38:ST3_smx:INFO: # loops 1
08:06:40:ST3_smx:INFO: # loops 2
08:06:42:ST3_smx:INFO: # loops 3
08:06:44:ST3_smx:INFO: # loops 4
08:06:46:ST3_smx:INFO: Total # of broken channels: 0
08:06:46:ST3_smx:INFO: List of broken channels: []
08:06:46:ST3_smx:INFO: Total # of broken channels: 0
08:06:46:ST3_smx:INFO: List of broken channels: []
08:06:47:ST3_smx:INFO: Configuring SMX FAST
08:06:49:ST3_smx:INFO: chip: 10-3 -0.145857 C 1346.532940 mV
08:06:49:ST3_smx:INFO: Electrons
08:06:49:ST3_smx:INFO: # loops 0
08:06:51:ST3_smx:INFO: # loops 1
08:06:53:ST3_smx:INFO: # loops 2
08:06:55:ST3_smx:INFO: # loops 3
08:06:57:ST3_smx:INFO: # loops 4
08:06:59:ST3_smx:INFO: Total # of broken channels: 0
08:06:59:ST3_smx:INFO: List of broken channels: []
08:06:59:ST3_smx:INFO: Total # of broken channels: 0
08:06:59:ST3_smx:INFO: List of broken channels: []
08:07:00:ST3_smx:INFO: Configuring SMX FAST
08:07:02:ST3_smx:INFO: chip: 5-4 6.141382 C 1340.770035 mV
08:07:02:ST3_smx:INFO: Electrons
08:07:02:ST3_smx:INFO: # loops 0
08:07:04:ST3_smx:INFO: # loops 1
08:07:06:ST3_smx:INFO: # loops 2
08:07:09:ST3_smx:INFO: # loops 3
08:07:11:ST3_smx:INFO: # loops 4
08:07:12:ST3_smx:INFO: Total # of broken channels: 1
08:07:12:ST3_smx:INFO: List of broken channels: [55]
08:07:13:ST3_smx:INFO: Total # of broken channels: 0
08:07:13:ST3_smx:INFO: List of broken channels: []
08:07:13:ST3_smx:INFO: Configuring SMX FAST
08:07:16:ST3_smx:INFO: chip: 12-5 2.996520 C 1346.532940 mV
08:07:16:ST3_smx:INFO: Electrons
08:07:16:ST3_smx:INFO: # loops 0
08:07:18:ST3_smx:INFO: # loops 1
08:07:20:ST3_smx:INFO: # loops 2
08:07:22:ST3_smx:INFO: # loops 3
08:07:23:ST3_smx:INFO: # loops 4
08:07:25:ST3_smx:INFO: Total # of broken channels: 0
08:07:25:ST3_smx:INFO: List of broken channels: []
08:07:25:ST3_smx:INFO: Total # of broken channels: 0
08:07:25:ST3_smx:INFO: List of broken channels: []
08:07:26:ST3_smx:INFO: Configuring SMX FAST
08:07:28:ST3_smx:INFO: chip: 7-6 2.996520 C 1329.229315 mV
08:07:28:ST3_smx:INFO: Electrons
08:07:28:ST3_smx:INFO: # loops 0
08:07:30:ST3_smx:INFO: # loops 1
08:07:32:ST3_smx:INFO: # loops 2
08:07:34:ST3_smx:INFO: # loops 3
08:07:36:ST3_smx:INFO: # loops 4
08:07:38:ST3_smx:INFO: Total # of broken channels: 0
08:07:38:ST3_smx:INFO: List of broken channels: []
08:07:38:ST3_smx:INFO: Total # of broken channels: 0
08:07:38:ST3_smx:INFO: List of broken channels: []
08:07:39:ST3_smx:INFO: Configuring SMX FAST
08:07:41:ST3_smx:INFO: chip: 14-7 2.996520 C 1329.229315 mV
08:07:41:ST3_smx:INFO: Electrons
08:07:41:ST3_smx:INFO: # loops 0
08:07:44:ST3_smx:INFO: # loops 1
08:07:45:ST3_smx:INFO: # loops 2
08:07:47:ST3_smx:INFO: # loops 3
08:07:50:ST3_smx:INFO: # loops 4
08:07:52:ST3_smx:INFO: Total # of broken channels: 0
08:07:52:ST3_smx:INFO: List of broken channels: []
08:07:52:ST3_smx:INFO: Total # of broken channels: 1
08:07:52:ST3_smx:INFO: List of broken channels: [25]
08:07:53:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:07:53:febtest:INFO: 01-00 | XA-000-08-003-000-000-178-07 | -3.3 | 1386.7
08:07:53:febtest:INFO: 08-01 | XA-000-08-003-000-000-174-00 | 3.0 | 1340.8
08:07:53:febtest:INFO: 03-02 | XA-000-08-003-000-000-173-00 | -12.7 | 1403.9
08:07:54:febtest:INFO: 10-03 | XA-000-08-003-000-000-181-07 | -3.3 | 1369.5
08:07:54:febtest:INFO: 05-04 | XA-000-08-003-000-000-182-07 | -0.1 | 1369.5
08:07:54:febtest:INFO: 12-05 | XA-000-08-003-000-000-180-07 | -0.1 | 1358.0
08:07:54:febtest:INFO: 07-06 | XA-000-08-003-000-000-179-07 | -0.1 | 1335.0
08:07:55:febtest:INFO: 14-07 | XA-000-08-003-000-000-175-00 | 3.0 | 1329.2
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_04_02-08_05_50
OPERATOR : Henrik;
SITE : KIT
SETUP : KIT_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L5UL301017 M5UL3B0010170A2 42 B
FEB_SN : 3009
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID: 10272
MODULE_NAME: L5UL301017 M5UL3B0010170A2 42 B
MODULE_TYPE:
MODULE_LADDER: L5UL301017
MODULE_MODULE: M5UL3B0010170A2
MODULE_SIZE: 42
MODULE_GRADE: B
---------------------------------------
VI_before_Init : ['2.200', '1.9370', '2.800', '0.3809', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.200', '1.6470', '2.800', '0.4776', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.200', '1.6470', '2.800', '0.3333', '0.000', '0.0000', '0.000', '0.0000']