08:44:47:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:44:47:ST3_Shared:INFO:	                         FEB-Sensor                         
08:44:47:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:44:48:ST3_ModuleSelector:INFO:	L5UL301017 M5UL3B1010171A2 62 B

08:44:48:ST3_ModuleSelector:INFO:	03343

08:44:49:febtest:INFO:	Testing FEB with SN 3010
08:44:52:smx_tester:INFO:	Scanning setup
08:44:52:elinks:INFO:	Disabling clock on downlink 0
08:44:52:elinks:INFO:	Disabling clock on downlink 1
08:44:52:elinks:INFO:	Disabling clock on downlink 2
08:44:52:elinks:INFO:	Disabling clock on downlink 3
08:44:52:elinks:INFO:	Disabling clock on downlink 4
08:44:52:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:44:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
08:44:52:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:44:52:elinks:INFO:	Disabling clock on downlink 0
08:44:52:elinks:INFO:	Disabling clock on downlink 1
08:44:52:elinks:INFO:	Disabling clock on downlink 2
08:44:52:elinks:INFO:	Disabling clock on downlink 3
08:44:52:elinks:INFO:	Disabling clock on downlink 4
08:44:52:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:44:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:44:52:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
08:44:52:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
08:44:52:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
08:44:52:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
08:44:52:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
08:44:52:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
08:44:52:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
08:44:52:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
08:44:52:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
08:44:52:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
08:44:52:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
08:44:52:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
08:44:52:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
08:44:52:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
08:44:52:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
08:44:52:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
08:44:52:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:44:52:elinks:INFO:	Disabling clock on downlink 0
08:44:52:elinks:INFO:	Disabling clock on downlink 1
08:44:52:elinks:INFO:	Disabling clock on downlink 2
08:44:52:elinks:INFO:	Disabling clock on downlink 3
08:44:52:elinks:INFO:	Disabling clock on downlink 4
08:44:52:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:44:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:44:52:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:44:52:elinks:INFO:	Disabling clock on downlink 0
08:44:52:elinks:INFO:	Disabling clock on downlink 1
08:44:52:elinks:INFO:	Disabling clock on downlink 2
08:44:52:elinks:INFO:	Disabling clock on downlink 3
08:44:52:elinks:INFO:	Disabling clock on downlink 4
08:44:52:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:44:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
08:44:52:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:44:52:elinks:INFO:	Disabling clock on downlink 0
08:44:52:elinks:INFO:	Disabling clock on downlink 1
08:44:52:elinks:INFO:	Disabling clock on downlink 2
08:44:52:elinks:INFO:	Disabling clock on downlink 3
08:44:52:elinks:INFO:	Disabling clock on downlink 4
08:44:52:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:44:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
08:44:52:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:44:52:setup_element:INFO:	Scanning clock phase
08:44:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:44:52:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:44:53:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
08:44:53:setup_element:INFO:	Eye window for uplink 0 : ______________________________________________________________________XXXX______
Clock Delay: 31
08:44:53:setup_element:INFO:	Eye window for uplink 1 : ______________________________________________________________________XXXX______
Clock Delay: 31
08:44:53:setup_element:INFO:	Eye window for uplink 2 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
08:44:53:setup_element:INFO:	Eye window for uplink 3 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
08:44:53:setup_element:INFO:	Eye window for uplink 4 : _______________________________________________________________________XXXX_____
Clock Delay: 32
08:44:53:setup_element:INFO:	Eye window for uplink 5 : _______________________________________________________________________XXXX_____
Clock Delay: 32
08:44:53:setup_element:INFO:	Eye window for uplink 6 : ____________________________________________________________________XXXXXX______
Clock Delay: 30
08:44:53:setup_element:INFO:	Eye window for uplink 7 : ____________________________________________________________________XXXXXX______
Clock Delay: 30
08:44:53:setup_element:INFO:	Eye window for uplink 8 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
08:44:53:setup_element:INFO:	Eye window for uplink 9 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
08:44:53:setup_element:INFO:	Eye window for uplink 10: _____________________________________________________________________XXXXX______
Clock Delay: 31
08:44:53:setup_element:INFO:	Eye window for uplink 11: _____________________________________________________________________XXXXX______
Clock Delay: 31
08:44:53:setup_element:INFO:	Eye window for uplink 12: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
08:44:53:setup_element:INFO:	Eye window for uplink 13: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
08:44:53:setup_element:INFO:	Eye window for uplink 14: _______________________________________________________________________XXXXX____
Clock Delay: 33
08:44:53:setup_element:INFO:	Eye window for uplink 15: _______________________________________________________________________XXXXX____
Clock Delay: 33
08:44:53:setup_element:INFO:	Setting the clock phase to 31 for group 0, downlink 1
08:44:53:setup_element:INFO:	Scanning data phases
08:44:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:44:53:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:44:58:setup_element:INFO:	Data phase scan results for group 0, downlink 1
08:44:58:setup_element:INFO:	Eye window for uplink 0 : XXXX_________________________________XXX
Data delay found: 20
08:44:58:setup_element:INFO:	Eye window for uplink 1 : _________________________________XXXXXX_
Data delay found: 15
08:44:58:setup_element:INFO:	Eye window for uplink 2 : XXX__________________________________XXX
Data delay found: 19
08:44:58:setup_element:INFO:	Eye window for uplink 3 : __________________________________XXXXX_
Data delay found: 16
08:44:58:setup_element:INFO:	Eye window for uplink 4 : ________________________________XXXXXX__
Data delay found: 14
08:44:58:setup_element:INFO:	Eye window for uplink 5 : _____________________________XXXXXX_____
Data delay found: 11
08:44:58:setup_element:INFO:	Eye window for uplink 6 : ________________________XXXXXXX_________
Data delay found: 7
08:44:58:setup_element:INFO:	Eye window for uplink 7 : ____________________XXXXXXX_____________
Data delay found: 3
08:44:58:setup_element:INFO:	Eye window for uplink 8 : ________________XXXXXXXXX_______________
Data delay found: 0
08:44:58:setup_element:INFO:	Eye window for uplink 9 : _______________________XXXXXX___________
Data delay found: 5
08:44:58:setup_element:INFO:	Eye window for uplink 10: _______________XXXXXXXX_________________
Data delay found: 38
08:44:58:setup_element:INFO:	Eye window for uplink 11: ___________________XXXXXXXX_____________
Data delay found: 2
08:44:58:setup_element:INFO:	Eye window for uplink 12: ________________XXXXXX__________________
Data delay found: 38
08:44:58:setup_element:INFO:	Eye window for uplink 13: ____________________XXXXX_______________
Data delay found: 2
08:44:58:setup_element:INFO:	Eye window for uplink 14: ____________________XXXXX_______________
Data delay found: 2
08:44:58:setup_element:INFO:	Eye window for uplink 15: ______________________XXXXXX____________
Data delay found: 4
08:44:58:setup_element:INFO:	Setting the data phase to 20 for uplink 0
08:44:58:setup_element:INFO:	Setting the data phase to 15 for uplink 1
08:44:58:setup_element:INFO:	Setting the data phase to 19 for uplink 2
08:44:58:setup_element:INFO:	Setting the data phase to 16 for uplink 3
08:44:58:setup_element:INFO:	Setting the data phase to 14 for uplink 4
08:44:58:setup_element:INFO:	Setting the data phase to 11 for uplink 5
08:44:58:setup_element:INFO:	Setting the data phase to 7 for uplink 6
08:44:58:setup_element:INFO:	Setting the data phase to 3 for uplink 7
08:44:58:setup_element:INFO:	Setting the data phase to 0 for uplink 8
08:44:58:setup_element:INFO:	Setting the data phase to 5 for uplink 9
08:44:58:setup_element:INFO:	Setting the data phase to 38 for uplink 10
08:44:58:setup_element:INFO:	Setting the data phase to 2 for uplink 11
08:44:58:setup_element:INFO:	Setting the data phase to 38 for uplink 12
08:44:58:setup_element:INFO:	Setting the data phase to 2 for uplink 13
08:44:58:setup_element:INFO:	Setting the data phase to 2 for uplink 14
08:44:58:setup_element:INFO:	Setting the data phase to 4 for uplink 15
08:44:58:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 31
    Window Length: 72
    Eye Windows:
      Uplink  0: ______________________________________________________________________XXXX______
      Uplink  1: ______________________________________________________________________XXXX______
      Uplink  2: ______________________________________________________________________XXXXXX____
      Uplink  3: ______________________________________________________________________XXXXXX____
      Uplink  4: _______________________________________________________________________XXXX_____
      Uplink  5: _______________________________________________________________________XXXX_____
      Uplink  6: ____________________________________________________________________XXXXXX______
      Uplink  7: ____________________________________________________________________XXXXXX______
      Uplink  8: ______________________________________________________________________XXXXXX____
      Uplink  9: ______________________________________________________________________XXXXXX____
      Uplink 10: _____________________________________________________________________XXXXX______
      Uplink 11: _____________________________________________________________________XXXXX______
      Uplink 12: _____________________________________________________________________XXXXXX_____
      Uplink 13: _____________________________________________________________________XXXXXX_____
      Uplink 14: _______________________________________________________________________XXXXX____
      Uplink 15: _______________________________________________________________________XXXXX____
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 20
      Window Length: 33
      Eye Window: XXXX_________________________________XXX
    Uplink 1:
      Optimal Phase: 15
      Window Length: 34
      Eye Window: _________________________________XXXXXX_
    Uplink 2:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 3:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 4:
      Optimal Phase: 14
      Window Length: 34
      Eye Window: ________________________________XXXXXX__
    Uplink 5:
      Optimal Phase: 11
      Window Length: 34
      Eye Window: _____________________________XXXXXX_____
    Uplink 6:
      Optimal Phase: 7
      Window Length: 33
      Eye Window: ________________________XXXXXXX_________
    Uplink 7:
      Optimal Phase: 3
      Window Length: 33
      Eye Window: ____________________XXXXXXX_____________
    Uplink 8:
      Optimal Phase: 0
      Window Length: 31
      Eye Window: ________________XXXXXXXXX_______________
    Uplink 9:
      Optimal Phase: 5
      Window Length: 34
      Eye Window: _______________________XXXXXX___________
    Uplink 10:
      Optimal Phase: 38
      Window Length: 32
      Eye Window: _______________XXXXXXXX_________________
    Uplink 11:
      Optimal Phase: 2
      Window Length: 32
      Eye Window: ___________________XXXXXXXX_____________
    Uplink 12:
      Optimal Phase: 38
      Window Length: 34
      Eye Window: ________________XXXXXX__________________
    Uplink 13:
      Optimal Phase: 2
      Window Length: 35
      Eye Window: ____________________XXXXX_______________
    Uplink 14:
      Optimal Phase: 2
      Window Length: 35
      Eye Window: ____________________XXXXX_______________
    Uplink 15:
      Optimal Phase: 4
      Window Length: 34
      Eye Window: ______________________XXXXXX____________
]
08:44:58:setup_element:INFO:	Beginning SMX ASICs map scan
08:44:58:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:44:58:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:44:58:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
08:44:58:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
08:44:58:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:44:58:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
08:44:58:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
08:44:58:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:44:58:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:44:58:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
08:44:58:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
08:44:58:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:44:58:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:44:59:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
08:44:59:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
08:44:59:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:44:59:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:44:59:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
08:44:59:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
08:44:59:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:44:59:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:45:00:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 31
    Window Length: 72
    Eye Windows:
      Uplink  0: ______________________________________________________________________XXXX______
      Uplink  1: ______________________________________________________________________XXXX______
      Uplink  2: ______________________________________________________________________XXXXXX____
      Uplink  3: ______________________________________________________________________XXXXXX____
      Uplink  4: _______________________________________________________________________XXXX_____
      Uplink  5: _______________________________________________________________________XXXX_____
      Uplink  6: ____________________________________________________________________XXXXXX______
      Uplink  7: ____________________________________________________________________XXXXXX______
      Uplink  8: ______________________________________________________________________XXXXXX____
      Uplink  9: ______________________________________________________________________XXXXXX____
      Uplink 10: _____________________________________________________________________XXXXX______
      Uplink 11: _____________________________________________________________________XXXXX______
      Uplink 12: _____________________________________________________________________XXXXXX_____
      Uplink 13: _____________________________________________________________________XXXXXX_____
      Uplink 14: _______________________________________________________________________XXXXX____
      Uplink 15: _______________________________________________________________________XXXXX____
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 20
      Window Length: 33
      Eye Window: XXXX_________________________________XXX
    Uplink 1:
      Optimal Phase: 15
      Window Length: 34
      Eye Window: _________________________________XXXXXX_
    Uplink 2:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 3:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 4:
      Optimal Phase: 14
      Window Length: 34
      Eye Window: ________________________________XXXXXX__
    Uplink 5:
      Optimal Phase: 11
      Window Length: 34
      Eye Window: _____________________________XXXXXX_____
    Uplink 6:
      Optimal Phase: 7
      Window Length: 33
      Eye Window: ________________________XXXXXXX_________
    Uplink 7:
      Optimal Phase: 3
      Window Length: 33
      Eye Window: ____________________XXXXXXX_____________
    Uplink 8:
      Optimal Phase: 0
      Window Length: 31
      Eye Window: ________________XXXXXXXXX_______________
    Uplink 9:
      Optimal Phase: 5
      Window Length: 34
      Eye Window: _______________________XXXXXX___________
    Uplink 10:
      Optimal Phase: 38
      Window Length: 32
      Eye Window: _______________XXXXXXXX_________________
    Uplink 11:
      Optimal Phase: 2
      Window Length: 32
      Eye Window: ___________________XXXXXXXX_____________
    Uplink 12:
      Optimal Phase: 38
      Window Length: 34
      Eye Window: ________________XXXXXX__________________
    Uplink 13:
      Optimal Phase: 2
      Window Length: 35
      Eye Window: ____________________XXXXX_______________
    Uplink 14:
      Optimal Phase: 2
      Window Length: 35
      Eye Window: ____________________XXXXX_______________
    Uplink 15:
      Optimal Phase: 4
      Window Length: 34
      Eye Window: ______________________XXXXXX____________

08:45:00:setup_element:INFO:	Performing Elink synchronization
08:45:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:45:00:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:45:00:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
08:45:00:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
08:45:00:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
08:45:00:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:45:01:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  1  |  0  |     [1]      |   [(0, 1), (1, 0)] 
   1  |   [0]   |  1  |  0  |     [8]      |   [(0, 8), (1, 9)] 
   2  |   [0]   |  1  |  0  |     [3]      |   [(0, 3), (1, 2)] 
   3  |   [0]   |  1  |  0  |     [10]     |  [(0, 10), (1, 11)]
   4  |   [0]   |  1  |  0  |     [5]      |   [(0, 5), (1, 4)] 
   5  |   [0]   |  1  |  0  |     [12]     |  [(0, 12), (1, 13)]
   6  |   [0]   |  1  |  0  |     [7]      |   [(0, 7), (1, 6)] 
   7  |   [0]   |  1  |  0  |     [14]     |  [(0, 14), (1, 15)]
FEB type: A FEB_A: 1 FEB_B: 0
08:45:02:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:45:02:febtest:INFO:	01-00 | XA-000-08-003-000-000-112-08 |   6.1 | 1340.8
08:45:02:febtest:INFO:	08-01 | XA-000-08-003-000-000-132-14 |  28.2 | 1242.0
08:45:02:febtest:INFO:	03-02 | XA-000-08-003-000-000-113-08 |   9.3 | 1329.2
08:45:03:febtest:INFO:	10-03 | XA-000-08-003-000-000-127-08 |  31.4 | 1236.2
08:45:03:febtest:INFO:	05-04 | XA-000-08-003-000-000-118-08 |  21.9 | 1265.4
08:45:03:febtest:INFO:	12-05 | XA-000-08-003-000-000-122-08 |  28.2 | 1265.4
08:45:03:febtest:INFO:	07-06 | XA-000-08-003-000-000-120-08 |  18.7 | 1294.5
08:45:03:febtest:INFO:	14-07 | XA-000-08-003-000-000-133-14 |  28.2 | 1259.6
08:45:04:ST3_smx:INFO:	Configuring SMX FAST
08:45:06:ST3_smx:INFO:	chip: 1-0 	 9.288730 C 	 1323.451500 mV
08:45:06:ST3_smx:INFO:		Electrons
08:45:06:ST3_smx:INFO:	# loops 0
08:45:08:ST3_smx:INFO:	# loops 1
08:45:09:ST3_smx:INFO:	# loops 2
08:45:11:ST3_smx:INFO:	Total # of broken channels: 0
08:45:11:ST3_smx:INFO:	List of broken channels: []
08:45:11:ST3_smx:INFO:	Total # of broken channels: 0
08:45:11:ST3_smx:INFO:	List of broken channels: []
08:45:12:ST3_smx:INFO:	Configuring SMX FAST
08:45:14:ST3_smx:INFO:	chip: 8-1 	 25.062742 C 	 1247.887635 mV
08:45:14:ST3_smx:INFO:		Electrons
08:45:14:ST3_smx:INFO:	# loops 0
08:45:15:ST3_smx:INFO:	# loops 1
08:45:17:ST3_smx:INFO:	# loops 2
08:45:18:ST3_smx:INFO:	Total # of broken channels: 0
08:45:18:ST3_smx:INFO:	List of broken channels: []
08:45:18:ST3_smx:INFO:	Total # of broken channels: 0
08:45:18:ST3_smx:INFO:	List of broken channels: []
08:45:19:ST3_smx:INFO:	Configuring SMX FAST
08:45:21:ST3_smx:INFO:	chip: 3-2 	 6.141382 C 	 1352.290875 mV
08:45:21:ST3_smx:INFO:		Electrons
08:45:21:ST3_smx:INFO:	# loops 0
08:45:23:ST3_smx:INFO:	# loops 1
08:45:24:ST3_smx:INFO:	# loops 2
08:45:26:ST3_smx:INFO:	Total # of broken channels: 0
08:45:26:ST3_smx:INFO:	List of broken channels: []
08:45:26:ST3_smx:INFO:	Total # of broken channels: 0
08:45:26:ST3_smx:INFO:	List of broken channels: []
08:45:27:ST3_smx:INFO:	Configuring SMX FAST
08:45:29:ST3_smx:INFO:	chip: 10-3 	 18.745682 C 	 1282.867635 mV
08:45:29:ST3_smx:INFO:		Electrons
08:45:29:ST3_smx:INFO:	# loops 0
08:45:30:ST3_smx:INFO:	# loops 1
08:45:32:ST3_smx:INFO:	# loops 2
08:45:33:ST3_smx:INFO:	Total # of broken channels: 0
08:45:33:ST3_smx:INFO:	List of broken channels: []
08:45:33:ST3_smx:INFO:	Total # of broken channels: 0
08:45:33:ST3_smx:INFO:	List of broken channels: []
08:45:34:ST3_smx:INFO:	Configuring SMX FAST
08:45:36:ST3_smx:INFO:	chip: 5-4 	 15.590880 C 	 1294.487875 mV
08:45:36:ST3_smx:INFO:		Electrons
08:45:36:ST3_smx:INFO:	# loops 0
08:45:38:ST3_smx:INFO:	# loops 1
08:45:40:ST3_smx:INFO:	# loops 2
08:45:41:ST3_smx:INFO:	Total # of broken channels: 0
08:45:41:ST3_smx:INFO:	List of broken channels: []
08:45:41:ST3_smx:INFO:	Total # of broken channels: 0
08:45:41:ST3_smx:INFO:	List of broken channels: []
08:45:42:ST3_smx:INFO:	Configuring SMX FAST
08:45:44:ST3_smx:INFO:	chip: 12-5 	 25.062742 C 	 1306.088235 mV
08:45:44:ST3_smx:INFO:		Electrons
08:45:44:ST3_smx:INFO:	# loops 0
08:45:46:ST3_smx:INFO:	# loops 1
08:45:47:ST3_smx:INFO:	# loops 2
08:45:49:ST3_smx:INFO:	Total # of broken channels: 0
08:45:49:ST3_smx:INFO:	List of broken channels: []
08:45:49:ST3_smx:INFO:	Total # of broken channels: 0
08:45:49:ST3_smx:INFO:	List of broken channels: []
08:45:50:ST3_smx:INFO:	Configuring SMX FAST
08:45:52:ST3_smx:INFO:	chip: 7-6 	 9.288730 C 	 1335.002160 mV
08:45:52:ST3_smx:INFO:		Electrons
08:45:52:ST3_smx:INFO:	# loops 0
08:45:53:ST3_smx:INFO:	# loops 1
08:45:55:ST3_smx:INFO:	# loops 2
08:45:56:ST3_smx:INFO:	Total # of broken channels: 0
08:45:56:ST3_smx:INFO:	List of broken channels: []
08:45:56:ST3_smx:INFO:	Total # of broken channels: 0
08:45:56:ST3_smx:INFO:	List of broken channels: []
08:45:57:ST3_smx:INFO:	Configuring SMX FAST
08:45:59:ST3_smx:INFO:	chip: 14-7 	 18.745682 C 	 1288.680240 mV
08:45:59:ST3_smx:INFO:		Electrons
08:45:59:ST3_smx:INFO:	# loops 0
08:46:01:ST3_smx:INFO:	# loops 1
08:46:02:ST3_smx:INFO:	# loops 2
08:46:04:ST3_smx:INFO:	Total # of broken channels: 0
08:46:04:ST3_smx:INFO:	List of broken channels: []
08:46:04:ST3_smx:INFO:	Total # of broken channels: 0
08:46:04:ST3_smx:INFO:	List of broken channels: []
08:46:05:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:46:05:febtest:INFO:	01-00 | XA-000-08-003-000-000-112-08 |   3.0 | 1381.0
08:46:05:febtest:INFO:	08-01 | XA-000-08-003-000-000-132-14 |  21.9 | 1271.2
08:46:05:febtest:INFO:	03-02 | XA-000-08-003-000-000-113-08 |   3.0 | 1375.3
08:46:05:febtest:INFO:	10-03 | XA-000-08-003-000-000-127-08 |  15.6 | 1311.9
08:46:06:febtest:INFO:	05-04 | XA-000-08-003-000-000-118-08 |  12.4 | 1317.7
08:46:06:febtest:INFO:	12-05 | XA-000-08-003-000-000-122-08 |  21.9 | 1323.5
08:46:06:febtest:INFO:	07-06 | XA-000-08-003-000-000-120-08 |   9.3 | 1340.8
08:46:06:febtest:INFO:	14-07 | XA-000-08-003-000-000-133-14 |  21.9 | 1288.7
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_04_03-08_44_47
OPERATOR  : Alois Alzheimer
SITE      : KIT
SETUP     : KIT_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L5UL301017 M5UL3B1010171A2 62 B

FEB_SN : 3010
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID:	03343

MODULE_NAME:	L5UL301017 M5UL3B1010171A2 62 B

MODULE_TYPE:	
MODULE_LADDER:	L5UL301017
MODULE_MODULE:	M5UL3B1010171A2
MODULE_SIZE:	62
MODULE_GRADE:	B
---------------------------------------
VI_before_Init : ['2.200', '1.5600', '2.800', '0.4723', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.200', '1.6640', '2.800', '0.5393', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.200', '1.6640', '2.800', '0.3255', '0.000', '0.0000', '0.000', '0.0000']