FEB_3010 30.04.24 09:02:34
Info
09:02:34:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:02:34:ST3_Shared:INFO: FEB-Sensor
09:02:34:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:02:52:ST3_ModuleSelector:INFO: New Sensor ID: 033
09:02:53:ST3_ModuleSelector:INFO: New Sensor ID: 0334
09:02:59:ST3_ModuleSelector:INFO: New Sensor ID: 033
09:03:03:ST3_ModuleSelector:INFO: New Sensor ID: 334
09:03:03:ST3_ModuleSelector:INFO: New Sensor ID: 3343
09:03:08:ST3_ModuleSelector:INFO: L5UL301017 M5UL3B1010171A2 62 B
09:03:08:ST3_ModuleSelector:INFO: 3343
09:03:09:febtest:INFO: Testing FEB with SN 3010
09:03:11:smx_tester:INFO: Scanning setup
09:03:11:elinks:INFO: Disabling clock on downlink 0
09:03:11:elinks:INFO: Disabling clock on downlink 1
09:03:11:elinks:INFO: Disabling clock on downlink 2
09:03:11:elinks:INFO: Disabling clock on downlink 3
09:03:11:elinks:INFO: Disabling clock on downlink 4
09:03:11:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:03:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:03:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:03:11:elinks:INFO: Disabling clock on downlink 0
09:03:11:elinks:INFO: Disabling clock on downlink 1
09:03:11:elinks:INFO: Disabling clock on downlink 2
09:03:11:elinks:INFO: Disabling clock on downlink 3
09:03:11:elinks:INFO: Disabling clock on downlink 4
09:03:11:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:03:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:03:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
09:03:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
09:03:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
09:03:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
09:03:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
09:03:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
09:03:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
09:03:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
09:03:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
09:03:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
09:03:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
09:03:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
09:03:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
09:03:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
09:03:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
09:03:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
09:03:12:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:03:12:elinks:INFO: Disabling clock on downlink 0
09:03:12:elinks:INFO: Disabling clock on downlink 1
09:03:12:elinks:INFO: Disabling clock on downlink 2
09:03:12:elinks:INFO: Disabling clock on downlink 3
09:03:12:elinks:INFO: Disabling clock on downlink 4
09:03:12:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:03:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:03:12:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:03:12:elinks:INFO: Disabling clock on downlink 0
09:03:12:elinks:INFO: Disabling clock on downlink 1
09:03:12:elinks:INFO: Disabling clock on downlink 2
09:03:12:elinks:INFO: Disabling clock on downlink 3
09:03:12:elinks:INFO: Disabling clock on downlink 4
09:03:12:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:03:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:03:12:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:03:12:elinks:INFO: Disabling clock on downlink 0
09:03:12:elinks:INFO: Disabling clock on downlink 1
09:03:12:elinks:INFO: Disabling clock on downlink 2
09:03:12:elinks:INFO: Disabling clock on downlink 3
09:03:12:elinks:INFO: Disabling clock on downlink 4
09:03:12:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:03:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:03:12:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:03:12:setup_element:INFO: Scanning clock phase
09:03:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:03:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:03:12:setup_element:INFO: Clock phase scan results for group 0, downlink 1
09:03:12:setup_element:INFO: Eye window for uplink 0 : _____________________________________________________________________XXXXX______
Clock Delay: 31
09:03:12:setup_element:INFO: Eye window for uplink 1 : _____________________________________________________________________XXXXX______
Clock Delay: 31
09:03:12:setup_element:INFO: Eye window for uplink 2 : ______________________________________________________________________XXXXX_____
Clock Delay: 32
09:03:12:setup_element:INFO: Eye window for uplink 3 : ______________________________________________________________________XXXXX_____
Clock Delay: 32
09:03:12:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXX_____
Clock Delay: 32
09:03:12:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXX_____
Clock Delay: 32
09:03:12:setup_element:INFO: Eye window for uplink 6 : ____________________________________________________________________XXXXXX______
Clock Delay: 30
09:03:12:setup_element:INFO: Eye window for uplink 7 : ____________________________________________________________________XXXXXX______
Clock Delay: 30
09:03:12:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXX_____
Clock Delay: 32
09:03:12:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXX_____
Clock Delay: 32
09:03:12:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXX______
Clock Delay: 31
09:03:12:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXX______
Clock Delay: 31
09:03:12:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXX______
Clock Delay: 31
09:03:12:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXX______
Clock Delay: 31
09:03:12:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXX_____
Clock Delay: 32
09:03:12:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXX_____
Clock Delay: 32
09:03:12:setup_element:INFO: Setting the clock phase to 31 for group 0, downlink 1
09:03:12:setup_element:INFO: Scanning data phases
09:03:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:03:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:03:17:setup_element:INFO: Data phase scan results for group 0, downlink 1
09:03:18:setup_element:INFO: Eye window for uplink 0 : XXXX__________________________________XX
Data delay found: 20
09:03:18:setup_element:INFO: Eye window for uplink 1 : ________________________________XXXXXXXX
Data delay found: 15
09:03:18:setup_element:INFO: Eye window for uplink 2 : XXX___________________________________XX
Data delay found: 20
09:03:18:setup_element:INFO: Eye window for uplink 3 : __________________________________XXXXX_
Data delay found: 16
09:03:18:setup_element:INFO: Eye window for uplink 4 : _________________________________XXXXXX_
Data delay found: 15
09:03:18:setup_element:INFO: Eye window for uplink 5 : ______________________________XXXXX_____
Data delay found: 12
09:03:18:setup_element:INFO: Eye window for uplink 6 : _________________________XXXXXX_________
Data delay found: 7
09:03:18:setup_element:INFO: Eye window for uplink 7 : _____________________XXXXXX_____________
Data delay found: 3
09:03:18:setup_element:INFO: Eye window for uplink 8 : ________________XXXXXXXXX_______________
Data delay found: 0
09:03:18:setup_element:INFO: Eye window for uplink 9 : _______________________XXXXXX___________
Data delay found: 5
09:03:18:setup_element:INFO: Eye window for uplink 10: _______________XXXXXXXX_________________
Data delay found: 38
09:03:18:setup_element:INFO: Eye window for uplink 11: ___________________XXXXXXXX_____________
Data delay found: 2
09:03:18:setup_element:INFO: Eye window for uplink 12: _________________XXXXXX_________________
Data delay found: 39
09:03:18:setup_element:INFO: Eye window for uplink 13: _____________________XXXXX______________
Data delay found: 3
09:03:18:setup_element:INFO: Eye window for uplink 14: ____________________XXXXXX______________
Data delay found: 2
09:03:18:setup_element:INFO: Eye window for uplink 15: ______________________XXXXXX____________
Data delay found: 4
09:03:18:setup_element:INFO: Setting the data phase to 20 for uplink 0
09:03:18:setup_element:INFO: Setting the data phase to 15 for uplink 1
09:03:18:setup_element:INFO: Setting the data phase to 20 for uplink 2
09:03:18:setup_element:INFO: Setting the data phase to 16 for uplink 3
09:03:18:setup_element:INFO: Setting the data phase to 15 for uplink 4
09:03:18:setup_element:INFO: Setting the data phase to 12 for uplink 5
09:03:18:setup_element:INFO: Setting the data phase to 7 for uplink 6
09:03:18:setup_element:INFO: Setting the data phase to 3 for uplink 7
09:03:18:setup_element:INFO: Setting the data phase to 0 for uplink 8
09:03:18:setup_element:INFO: Setting the data phase to 5 for uplink 9
09:03:18:setup_element:INFO: Setting the data phase to 38 for uplink 10
09:03:18:setup_element:INFO: Setting the data phase to 2 for uplink 11
09:03:18:setup_element:INFO: Setting the data phase to 39 for uplink 12
09:03:18:setup_element:INFO: Setting the data phase to 3 for uplink 13
09:03:18:setup_element:INFO: Setting the data phase to 2 for uplink 14
09:03:18:setup_element:INFO: Setting the data phase to 4 for uplink 15
09:03:18:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 31
Window Length: 73
Eye Windows:
Uplink 0: _____________________________________________________________________XXXXX______
Uplink 1: _____________________________________________________________________XXXXX______
Uplink 2: ______________________________________________________________________XXXXX_____
Uplink 3: ______________________________________________________________________XXXXX_____
Uplink 4: _______________________________________________________________________XXXX_____
Uplink 5: _______________________________________________________________________XXXX_____
Uplink 6: ____________________________________________________________________XXXXXX______
Uplink 7: ____________________________________________________________________XXXXXX______
Uplink 8: ______________________________________________________________________XXXXX_____
Uplink 9: ______________________________________________________________________XXXXX_____
Uplink 10: _____________________________________________________________________XXXXX______
Uplink 11: _____________________________________________________________________XXXXX______
Uplink 12: _____________________________________________________________________XXXXX______
Uplink 13: _____________________________________________________________________XXXXX______
Uplink 14: _______________________________________________________________________XXXX_____
Uplink 15: _______________________________________________________________________XXXX_____
Data phase characteristics:
Uplink 0:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 1:
Optimal Phase: 15
Window Length: 32
Eye Window: ________________________________XXXXXXXX
Uplink 2:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 3:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 4:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 5:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 6:
Optimal Phase: 7
Window Length: 34
Eye Window: _________________________XXXXXX_________
Uplink 7:
Optimal Phase: 3
Window Length: 34
Eye Window: _____________________XXXXXX_____________
Uplink 8:
Optimal Phase: 0
Window Length: 31
Eye Window: ________________XXXXXXXXX_______________
Uplink 9:
Optimal Phase: 5
Window Length: 34
Eye Window: _______________________XXXXXX___________
Uplink 10:
Optimal Phase: 38
Window Length: 32
Eye Window: _______________XXXXXXXX_________________
Uplink 11:
Optimal Phase: 2
Window Length: 32
Eye Window: ___________________XXXXXXXX_____________
Uplink 12:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
Uplink 13:
Optimal Phase: 3
Window Length: 35
Eye Window: _____________________XXXXX______________
Uplink 14:
Optimal Phase: 2
Window Length: 34
Eye Window: ____________________XXXXXX______________
Uplink 15:
Optimal Phase: 4
Window Length: 34
Eye Window: ______________________XXXXXX____________
]
09:03:18:setup_element:INFO: Beginning SMX ASICs map scan
09:03:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:03:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:03:18:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:03:18:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:03:18:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:03:18:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:03:18:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:03:18:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:03:18:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:03:18:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:03:18:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:03:18:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:03:18:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:03:18:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:03:18:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:03:19:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:03:19:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:03:19:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:03:19:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:03:19:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:03:19:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:03:20:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 31
Window Length: 73
Eye Windows:
Uplink 0: _____________________________________________________________________XXXXX______
Uplink 1: _____________________________________________________________________XXXXX______
Uplink 2: ______________________________________________________________________XXXXX_____
Uplink 3: ______________________________________________________________________XXXXX_____
Uplink 4: _______________________________________________________________________XXXX_____
Uplink 5: _______________________________________________________________________XXXX_____
Uplink 6: ____________________________________________________________________XXXXXX______
Uplink 7: ____________________________________________________________________XXXXXX______
Uplink 8: ______________________________________________________________________XXXXX_____
Uplink 9: ______________________________________________________________________XXXXX_____
Uplink 10: _____________________________________________________________________XXXXX______
Uplink 11: _____________________________________________________________________XXXXX______
Uplink 12: _____________________________________________________________________XXXXX______
Uplink 13: _____________________________________________________________________XXXXX______
Uplink 14: _______________________________________________________________________XXXX_____
Uplink 15: _______________________________________________________________________XXXX_____
Data phase characteristics:
Uplink 0:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 1:
Optimal Phase: 15
Window Length: 32
Eye Window: ________________________________XXXXXXXX
Uplink 2:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 3:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 4:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 5:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 6:
Optimal Phase: 7
Window Length: 34
Eye Window: _________________________XXXXXX_________
Uplink 7:
Optimal Phase: 3
Window Length: 34
Eye Window: _____________________XXXXXX_____________
Uplink 8:
Optimal Phase: 0
Window Length: 31
Eye Window: ________________XXXXXXXXX_______________
Uplink 9:
Optimal Phase: 5
Window Length: 34
Eye Window: _______________________XXXXXX___________
Uplink 10:
Optimal Phase: 38
Window Length: 32
Eye Window: _______________XXXXXXXX_________________
Uplink 11:
Optimal Phase: 2
Window Length: 32
Eye Window: ___________________XXXXXXXX_____________
Uplink 12:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
Uplink 13:
Optimal Phase: 3
Window Length: 35
Eye Window: _____________________XXXXX______________
Uplink 14:
Optimal Phase: 2
Window Length: 34
Eye Window: ____________________XXXXXX______________
Uplink 15:
Optimal Phase: 4
Window Length: 34
Eye Window: ______________________XXXXXX____________
09:03:20:setup_element:INFO: Performing Elink synchronization
09:03:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:03:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:03:20:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:03:20:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:03:20:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
09:03:20:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:03:20:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
FEB type: A FEB_A: 1 FEB_B: 0
09:03:22:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:03:22:febtest:INFO: 01-00 | XA-000-08-003-000-000-112-08 | -0.1 | 1340.8
09:03:22:febtest:INFO: 08-01 | XA-000-08-003-000-000-132-14 | 25.1 | 1236.2
09:03:23:febtest:INFO: 03-02 | XA-000-08-003-000-000-113-08 | 6.1 | 1329.2
09:03:23:febtest:INFO: 10-03 | XA-000-08-003-000-000-127-08 | 28.2 | 1242.0
09:03:23:febtest:INFO: 05-04 | XA-000-08-003-000-000-118-08 | 15.6 | 1277.1
09:03:23:febtest:INFO: 12-05 | XA-000-08-003-000-000-122-08 | 25.1 | 1277.1
09:03:23:febtest:INFO: 07-06 | XA-000-08-003-000-000-120-08 | 15.6 | 1300.3
09:03:24:febtest:INFO: 14-07 | XA-000-08-003-000-000-133-14 | 25.1 | 1259.6
09:03:24:ST3_smx:INFO: Configuring SMX FAST
09:03:26:ST3_smx:INFO: chip: 1-0 6.141382 C 1329.229315 mV
09:03:26:ST3_smx:INFO: Electrons
09:03:26:ST3_smx:INFO: # loops 0
09:03:28:ST3_smx:INFO: # loops 1
09:03:29:ST3_smx:INFO: # loops 2
09:03:31:ST3_smx:INFO: # loops 3
09:03:32:ST3_smx:INFO: # loops 4
09:03:34:ST3_smx:INFO: Total # of broken channels: 0
09:03:34:ST3_smx:INFO: List of broken channels: []
09:03:34:ST3_smx:INFO: Total # of broken channels: 0
09:03:34:ST3_smx:INFO: List of broken channels: []
09:03:35:ST3_smx:INFO: Configuring SMX FAST
09:03:37:ST3_smx:INFO: chip: 8-1 21.902970 C 1253.730060 mV
09:03:37:ST3_smx:INFO: Electrons
09:03:37:ST3_smx:INFO: # loops 0
09:03:38:ST3_smx:INFO: # loops 1
09:03:40:ST3_smx:INFO: # loops 2
09:03:41:ST3_smx:INFO: # loops 3
09:03:43:ST3_smx:INFO: # loops 4
09:03:44:ST3_smx:INFO: Total # of broken channels: 0
09:03:45:ST3_smx:INFO: List of broken channels: []
09:03:45:ST3_smx:INFO: Total # of broken channels: 0
09:03:45:ST3_smx:INFO: List of broken channels: []
09:03:45:ST3_smx:INFO: Configuring SMX FAST
09:03:47:ST3_smx:INFO: chip: 3-2 2.996520 C 1352.290875 mV
09:03:47:ST3_smx:INFO: Electrons
09:03:47:ST3_smx:INFO: # loops 0
09:03:49:ST3_smx:INFO: # loops 1
09:03:50:ST3_smx:INFO: # loops 2
09:03:52:ST3_smx:INFO: # loops 3
09:03:53:ST3_smx:INFO: # loops 4
09:03:55:ST3_smx:INFO: Total # of broken channels: 0
09:03:55:ST3_smx:INFO: List of broken channels: []
09:03:55:ST3_smx:INFO: Total # of broken channels: 0
09:03:55:ST3_smx:INFO: List of broken channels: []
09:03:56:ST3_smx:INFO: Configuring SMX FAST
09:03:58:ST3_smx:INFO: chip: 10-3 18.745682 C 1288.680240 mV
09:03:58:ST3_smx:INFO: Electrons
09:03:58:ST3_smx:INFO: # loops 0
09:04:00:ST3_smx:INFO: # loops 1
09:04:02:ST3_smx:INFO: # loops 2
09:04:03:ST3_smx:INFO: # loops 3
09:04:05:ST3_smx:INFO: # loops 4
09:04:06:ST3_smx:INFO: Total # of broken channels: 0
09:04:06:ST3_smx:INFO: List of broken channels: []
09:04:06:ST3_smx:INFO: Total # of broken channels: 0
09:04:06:ST3_smx:INFO: List of broken channels: []
09:04:07:ST3_smx:INFO: Configuring SMX FAST
09:04:09:ST3_smx:INFO: chip: 5-4 15.590880 C 1306.088235 mV
09:04:09:ST3_smx:INFO: Electrons
09:04:09:ST3_smx:INFO: # loops 0
09:04:11:ST3_smx:INFO: # loops 1
09:04:12:ST3_smx:INFO: # loops 2
09:04:14:ST3_smx:INFO: # loops 3
09:04:16:ST3_smx:INFO: # loops 4
09:04:17:ST3_smx:INFO: Total # of broken channels: 0
09:04:17:ST3_smx:INFO: List of broken channels: []
09:04:17:ST3_smx:INFO: Total # of broken channels: 0
09:04:17:ST3_smx:INFO: List of broken channels: []
09:04:18:ST3_smx:INFO: Configuring SMX FAST
09:04:20:ST3_smx:INFO: chip: 12-5 25.062742 C 1311.880960 mV
09:04:20:ST3_smx:INFO: Electrons
09:04:20:ST3_smx:INFO: # loops 0
09:04:22:ST3_smx:INFO: # loops 1
09:04:23:ST3_smx:INFO: # loops 2
09:04:25:ST3_smx:INFO: # loops 3
09:04:26:ST3_smx:INFO: # loops 4
09:04:28:ST3_smx:INFO: Total # of broken channels: 0
09:04:28:ST3_smx:INFO: List of broken channels: []
09:04:28:ST3_smx:INFO: Total # of broken channels: 0
09:04:28:ST3_smx:INFO: List of broken channels: []
09:04:29:ST3_smx:INFO: Configuring SMX FAST
09:04:31:ST3_smx:INFO: chip: 7-6 9.288730 C 1335.002160 mV
09:04:31:ST3_smx:INFO: Electrons
09:04:31:ST3_smx:INFO: # loops 0
09:04:32:ST3_smx:INFO: # loops 1
09:04:34:ST3_smx:INFO: # loops 2
09:04:35:ST3_smx:INFO: # loops 3
09:04:37:ST3_smx:INFO: # loops 4
09:04:39:ST3_smx:INFO: Total # of broken channels: 0
09:04:39:ST3_smx:INFO: List of broken channels: []
09:04:39:ST3_smx:INFO: Total # of broken channels: 0
09:04:39:ST3_smx:INFO: List of broken channels: []
09:04:40:ST3_smx:INFO: Configuring SMX FAST
09:04:42:ST3_smx:INFO: chip: 14-7 21.902970 C 1288.680240 mV
09:04:42:ST3_smx:INFO: Electrons
09:04:42:ST3_smx:INFO: # loops 0
09:04:43:ST3_smx:INFO: # loops 1
09:04:45:ST3_smx:INFO: # loops 2
09:04:46:ST3_smx:INFO: # loops 3
09:04:48:ST3_smx:INFO: # loops 4
09:04:49:ST3_smx:INFO: Total # of broken channels: 0
09:04:49:ST3_smx:INFO: List of broken channels: []
09:04:49:ST3_smx:INFO: Total # of broken channels: 0
09:04:49:ST3_smx:INFO: List of broken channels: []
09:04:50:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:04:50:febtest:INFO: 01-00 | XA-000-08-003-000-000-112-08 | -0.1 | 1381.0
09:04:51:febtest:INFO: 08-01 | XA-000-08-003-000-000-132-14 | 18.7 | 1271.2
09:04:51:febtest:INFO: 03-02 | XA-000-08-003-000-000-113-08 | -0.1 | 1375.3
09:04:51:febtest:INFO: 10-03 | XA-000-08-003-000-000-127-08 | 15.6 | 1317.7
09:04:51:febtest:INFO: 05-04 | XA-000-08-003-000-000-118-08 | 12.4 | 1323.5
09:04:52:febtest:INFO: 12-05 | XA-000-08-003-000-000-122-08 | 25.1 | 1329.2
09:04:52:febtest:INFO: 07-06 | XA-000-08-003-000-000-120-08 | 9.3 | 1346.5
09:04:52:febtest:INFO: 14-07 | XA-000-08-003-000-000-133-14 | 21.9 | 1288.7
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_04_30-09_02_34
OPERATOR : Alois Alzheimer
SITE : KIT
SETUP : KIT_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L5UL301017 M5UL3B1010171A2 62 B
FEB_SN : 3010
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID: 3343
MODULE_NAME: L5UL301017 M5UL3B1010171A2 62 B
MODULE_TYPE:
MODULE_LADDER: L5UL301017
MODULE_MODULE: M5UL3B1010171A2
MODULE_SIZE: 62
MODULE_GRADE: B
---------------------------------------
VI_before_Init : ['2.200', '1.5680', '2.800', '0.4682', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.200', '1.6600', '2.800', '0.4526', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.200', '1.6600', '2.800', '0.3250', '0.000', '0.0000', '0.000', '0.0000']