10:18:04:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:18:04:ST3_Shared:INFO:	                         FEB-Sensor                         
10:18:04:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:18:05:ST3_ModuleSelector:INFO:	L5UL301017 M5UL3B2010172A2 124 B

10:18:05:ST3_ModuleSelector:INFO:	18234

10:18:06:febtest:INFO:	Testing FEB with SN 3011
10:18:08:smx_tester:INFO:	Scanning setup
10:18:08:elinks:INFO:	Disabling clock on downlink 0
10:18:08:elinks:INFO:	Disabling clock on downlink 1
10:18:08:elinks:INFO:	Disabling clock on downlink 2
10:18:08:elinks:INFO:	Disabling clock on downlink 3
10:18:08:elinks:INFO:	Disabling clock on downlink 4
10:18:08:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:18:08:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:18:08:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:18:08:elinks:INFO:	Disabling clock on downlink 0
10:18:08:elinks:INFO:	Disabling clock on downlink 1
10:18:08:elinks:INFO:	Disabling clock on downlink 2
10:18:08:elinks:INFO:	Disabling clock on downlink 3
10:18:08:elinks:INFO:	Disabling clock on downlink 4
10:18:08:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:18:08:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:18:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
10:18:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
10:18:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
10:18:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
10:18:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
10:18:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
10:18:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
10:18:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
10:18:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
10:18:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
10:18:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
10:18:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
10:18:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
10:18:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
10:18:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
10:18:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
10:18:09:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:18:09:elinks:INFO:	Disabling clock on downlink 0
10:18:09:elinks:INFO:	Disabling clock on downlink 1
10:18:09:elinks:INFO:	Disabling clock on downlink 2
10:18:09:elinks:INFO:	Disabling clock on downlink 3
10:18:09:elinks:INFO:	Disabling clock on downlink 4
10:18:09:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:18:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:18:09:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:18:09:elinks:INFO:	Disabling clock on downlink 0
10:18:09:elinks:INFO:	Disabling clock on downlink 1
10:18:09:elinks:INFO:	Disabling clock on downlink 2
10:18:09:elinks:INFO:	Disabling clock on downlink 3
10:18:09:elinks:INFO:	Disabling clock on downlink 4
10:18:09:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:18:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:18:09:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:18:09:elinks:INFO:	Disabling clock on downlink 0
10:18:09:elinks:INFO:	Disabling clock on downlink 1
10:18:09:elinks:INFO:	Disabling clock on downlink 2
10:18:09:elinks:INFO:	Disabling clock on downlink 3
10:18:09:elinks:INFO:	Disabling clock on downlink 4
10:18:09:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:18:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
10:18:09:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:18:09:setup_element:INFO:	Scanning clock phase
10:18:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:18:09:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:18:09:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
10:18:09:setup_element:INFO:	Eye window for uplink 0 : _______________________________________________________________________XXXX_____
Clock Delay: 32
10:18:09:setup_element:INFO:	Eye window for uplink 1 : _______________________________________________________________________XXXX_____
Clock Delay: 32
10:18:09:setup_element:INFO:	Eye window for uplink 2 : _______________________________________________________________________XXXX_____
Clock Delay: 32
10:18:09:setup_element:INFO:	Eye window for uplink 3 : _______________________________________________________________________XXXX_____
Clock Delay: 32
10:18:09:setup_element:INFO:	Eye window for uplink 4 : _______________________________________________________________________XXXXX____
Clock Delay: 33
10:18:09:setup_element:INFO:	Eye window for uplink 5 : _______________________________________________________________________XXXXX____
Clock Delay: 33
10:18:09:setup_element:INFO:	Eye window for uplink 6 : _______________________________________________________________________XX_______
Clock Delay: 31
10:18:09:setup_element:INFO:	Eye window for uplink 7 : _______________________________________________________________________XX_______
Clock Delay: 31
10:18:09:setup_element:INFO:	Eye window for uplink 8 : ____________________________________________________________________XXXXX_______
Clock Delay: 30
10:18:09:setup_element:INFO:	Eye window for uplink 9 : ____________________________________________________________________XXXXX_______
Clock Delay: 30
10:18:09:setup_element:INFO:	Eye window for uplink 10: ______________________________________________________________________XXXX______
Clock Delay: 31
10:18:09:setup_element:INFO:	Eye window for uplink 11: ______________________________________________________________________XXXX______
Clock Delay: 31
10:18:09:setup_element:INFO:	Eye window for uplink 12: _____________________________________________________________________XXXXX______
Clock Delay: 31
10:18:09:setup_element:INFO:	Eye window for uplink 13: _____________________________________________________________________XXXXX______
Clock Delay: 31
10:18:09:setup_element:INFO:	Eye window for uplink 14: _______________________________________________________________________XXXX_____
Clock Delay: 32
10:18:09:setup_element:INFO:	Eye window for uplink 15: _______________________________________________________________________XXXX_____
Clock Delay: 32
10:18:09:setup_element:INFO:	Setting the clock phase to 31 for group 0, downlink 1
10:18:09:setup_element:INFO:	Scanning data phases
10:18:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:18:09:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:18:14:setup_element:INFO:	Data phase scan results for group 0, downlink 1
10:18:14:setup_element:INFO:	Eye window for uplink 0 : XXXXX_________________________________XX
Data delay found: 21
10:18:14:setup_element:INFO:	Eye window for uplink 1 : X_________________________________XXXXXX
Data delay found: 17
10:18:14:setup_element:INFO:	Eye window for uplink 2 : XX__________________________________XXXX
Data delay found: 18
10:18:14:setup_element:INFO:	Eye window for uplink 3 : ________________________________XXXXXX__
Data delay found: 14
10:18:14:setup_element:INFO:	Eye window for uplink 4 : __________________________________XXXXXX
Data delay found: 16
10:18:14:setup_element:INFO:	Eye window for uplink 5 : _______________________________XXXXX____
Data delay found: 13
10:18:14:setup_element:INFO:	Eye window for uplink 6 : ________________________XXXXXX__________
Data delay found: 6
10:18:14:setup_element:INFO:	Eye window for uplink 7 : ___________________XXXXXXX______________
Data delay found: 2
10:18:14:setup_element:INFO:	Eye window for uplink 8 : ___________XXXXXXXX_____________________
Data delay found: 34
10:18:14:setup_element:INFO:	Eye window for uplink 9 : _________________XXXXXXX________________
Data delay found: 0
10:18:14:setup_element:INFO:	Eye window for uplink 10: _______________XXXXXXX__________________
Data delay found: 38
10:18:14:setup_element:INFO:	Eye window for uplink 11: __________________XXXXXXXX______________
Data delay found: 1
10:18:14:setup_element:INFO:	Eye window for uplink 12: _____________XXXXX______________________
Data delay found: 35
10:18:15:setup_element:INFO:	Eye window for uplink 13: _________________XXXXX__________________
Data delay found: 39
10:18:15:setup_element:INFO:	Eye window for uplink 14: _________________XXXXXXX________________
Data delay found: 0
10:18:15:setup_element:INFO:	Eye window for uplink 15: ____________________XXXXX_______________
Data delay found: 2
10:18:15:setup_element:INFO:	Setting the data phase to 21 for uplink 0
10:18:15:setup_element:INFO:	Setting the data phase to 17 for uplink 1
10:18:15:setup_element:INFO:	Setting the data phase to 18 for uplink 2
10:18:15:setup_element:INFO:	Setting the data phase to 14 for uplink 3
10:18:15:setup_element:INFO:	Setting the data phase to 16 for uplink 4
10:18:15:setup_element:INFO:	Setting the data phase to 13 for uplink 5
10:18:15:setup_element:INFO:	Setting the data phase to 6 for uplink 6
10:18:15:setup_element:INFO:	Setting the data phase to 2 for uplink 7
10:18:15:setup_element:INFO:	Setting the data phase to 34 for uplink 8
10:18:15:setup_element:INFO:	Setting the data phase to 0 for uplink 9
10:18:15:setup_element:INFO:	Setting the data phase to 38 for uplink 10
10:18:15:setup_element:INFO:	Setting the data phase to 1 for uplink 11
10:18:15:setup_element:INFO:	Setting the data phase to 35 for uplink 12
10:18:15:setup_element:INFO:	Setting the data phase to 39 for uplink 13
10:18:15:setup_element:INFO:	Setting the data phase to 0 for uplink 14
10:18:15:setup_element:INFO:	Setting the data phase to 2 for uplink 15
10:18:15:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 31
    Window Length: 72
    Eye Windows:
      Uplink  0: _______________________________________________________________________XXXX_____
      Uplink  1: _______________________________________________________________________XXXX_____
      Uplink  2: _______________________________________________________________________XXXX_____
      Uplink  3: _______________________________________________________________________XXXX_____
      Uplink  4: _______________________________________________________________________XXXXX____
      Uplink  5: _______________________________________________________________________XXXXX____
      Uplink  6: _______________________________________________________________________XX_______
      Uplink  7: _______________________________________________________________________XX_______
      Uplink  8: ____________________________________________________________________XXXXX_______
      Uplink  9: ____________________________________________________________________XXXXX_______
      Uplink 10: ______________________________________________________________________XXXX______
      Uplink 11: ______________________________________________________________________XXXX______
      Uplink 12: _____________________________________________________________________XXXXX______
      Uplink 13: _____________________________________________________________________XXXXX______
      Uplink 14: _______________________________________________________________________XXXX_____
      Uplink 15: _______________________________________________________________________XXXX_____
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 21
      Window Length: 33
      Eye Window: XXXXX_________________________________XX
    Uplink 1:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXXX
    Uplink 2:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 3:
      Optimal Phase: 14
      Window Length: 34
      Eye Window: ________________________________XXXXXX__
    Uplink 4:
      Optimal Phase: 16
      Window Length: 34
      Eye Window: __________________________________XXXXXX
    Uplink 5:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 6:
      Optimal Phase: 6
      Window Length: 34
      Eye Window: ________________________XXXXXX__________
    Uplink 7:
      Optimal Phase: 2
      Window Length: 33
      Eye Window: ___________________XXXXXXX______________
    Uplink 8:
      Optimal Phase: 34
      Window Length: 32
      Eye Window: ___________XXXXXXXX_____________________
    Uplink 9:
      Optimal Phase: 0
      Window Length: 33
      Eye Window: _________________XXXXXXX________________
    Uplink 10:
      Optimal Phase: 38
      Window Length: 33
      Eye Window: _______________XXXXXXX__________________
    Uplink 11:
      Optimal Phase: 1
      Window Length: 32
      Eye Window: __________________XXXXXXXX______________
    Uplink 12:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 13:
      Optimal Phase: 39
      Window Length: 35
      Eye Window: _________________XXXXX__________________
    Uplink 14:
      Optimal Phase: 0
      Window Length: 33
      Eye Window: _________________XXXXXXX________________
    Uplink 15:
      Optimal Phase: 2
      Window Length: 35
      Eye Window: ____________________XXXXX_______________
]
10:18:15:setup_element:INFO:	Beginning SMX ASICs map scan
10:18:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:18:15:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:18:15:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
10:18:15:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
10:18:15:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:18:15:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
10:18:15:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
10:18:15:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:18:15:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:18:15:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
10:18:15:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
10:18:15:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:18:15:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:18:15:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
10:18:15:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
10:18:16:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:18:16:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:18:16:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
10:18:16:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
10:18:16:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:18:16:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:18:17:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 31
    Window Length: 72
    Eye Windows:
      Uplink  0: _______________________________________________________________________XXXX_____
      Uplink  1: _______________________________________________________________________XXXX_____
      Uplink  2: _______________________________________________________________________XXXX_____
      Uplink  3: _______________________________________________________________________XXXX_____
      Uplink  4: _______________________________________________________________________XXXXX____
      Uplink  5: _______________________________________________________________________XXXXX____
      Uplink  6: _______________________________________________________________________XX_______
      Uplink  7: _______________________________________________________________________XX_______
      Uplink  8: ____________________________________________________________________XXXXX_______
      Uplink  9: ____________________________________________________________________XXXXX_______
      Uplink 10: ______________________________________________________________________XXXX______
      Uplink 11: ______________________________________________________________________XXXX______
      Uplink 12: _____________________________________________________________________XXXXX______
      Uplink 13: _____________________________________________________________________XXXXX______
      Uplink 14: _______________________________________________________________________XXXX_____
      Uplink 15: _______________________________________________________________________XXXX_____
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 21
      Window Length: 33
      Eye Window: XXXXX_________________________________XX
    Uplink 1:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXXX
    Uplink 2:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 3:
      Optimal Phase: 14
      Window Length: 34
      Eye Window: ________________________________XXXXXX__
    Uplink 4:
      Optimal Phase: 16
      Window Length: 34
      Eye Window: __________________________________XXXXXX
    Uplink 5:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 6:
      Optimal Phase: 6
      Window Length: 34
      Eye Window: ________________________XXXXXX__________
    Uplink 7:
      Optimal Phase: 2
      Window Length: 33
      Eye Window: ___________________XXXXXXX______________
    Uplink 8:
      Optimal Phase: 34
      Window Length: 32
      Eye Window: ___________XXXXXXXX_____________________
    Uplink 9:
      Optimal Phase: 0
      Window Length: 33
      Eye Window: _________________XXXXXXX________________
    Uplink 10:
      Optimal Phase: 38
      Window Length: 33
      Eye Window: _______________XXXXXXX__________________
    Uplink 11:
      Optimal Phase: 1
      Window Length: 32
      Eye Window: __________________XXXXXXXX______________
    Uplink 12:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 13:
      Optimal Phase: 39
      Window Length: 35
      Eye Window: _________________XXXXX__________________
    Uplink 14:
      Optimal Phase: 0
      Window Length: 33
      Eye Window: _________________XXXXXXX________________
    Uplink 15:
      Optimal Phase: 2
      Window Length: 35
      Eye Window: ____________________XXXXX_______________

10:18:17:setup_element:INFO:	Performing Elink synchronization
10:18:17:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:18:17:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:18:17:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
10:18:17:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
10:18:17:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
10:18:17:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:18:17:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  1  |  0  |     [1]      |   [(0, 1), (1, 0)] 
   1  |   [0]   |  1  |  0  |     [8]      |   [(0, 8), (1, 9)] 
   2  |   [0]   |  1  |  0  |     [3]      |   [(0, 3), (1, 2)] 
   3  |   [0]   |  1  |  0  |     [10]     |  [(0, 10), (1, 11)]
   4  |   [0]   |  1  |  0  |     [5]      |   [(0, 5), (1, 4)] 
   5  |   [0]   |  1  |  0  |     [12]     |  [(0, 12), (1, 13)]
   6  |   [0]   |  1  |  0  |     [7]      |   [(0, 7), (1, 6)] 
   7  |   [0]   |  1  |  0  |     [14]     |  [(0, 14), (1, 15)]
FEB type: A FEB_A: 1 FEB_B: 0
10:18:18:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:18:19:febtest:INFO:	01-00 | XA-000-08-003-000-000-147-09 |  15.6 | 1294.5
10:18:19:febtest:INFO:	08-01 | XA-000-08-003-000-000-144-09 |  18.7 | 1282.9
10:18:19:febtest:INFO:	03-02 | XA-000-08-003-000-000-143-14 |   9.3 | 1311.9
10:18:19:febtest:INFO:	10-03 | XA-000-08-003-000-000-138-14 |  21.9 | 1277.1
10:18:20:febtest:INFO:	05-04 | XA-000-08-003-000-000-137-14 |   9.3 | 1311.9
10:18:20:febtest:INFO:	12-05 | XA-000-08-003-000-000-149-09 |   6.1 | 1352.3
10:18:20:febtest:INFO:	07-06 | XA-000-08-003-000-000-148-09 |  31.4 | 1242.0
10:18:20:febtest:INFO:	14-07 | XA-000-08-003-000-000-145-09 |  25.1 | 1288.7
10:18:21:ST3_smx:INFO:	Configuring SMX FAST
10:18:23:ST3_smx:INFO:	chip: 1-0 	 18.745682 C 	 1288.680240 mV
10:18:23:ST3_smx:INFO:		Electrons
10:18:23:ST3_smx:INFO:	# loops 0
10:18:25:ST3_smx:INFO:	# loops 1
10:18:26:ST3_smx:INFO:	# loops 2
10:18:28:ST3_smx:INFO:	Total # of broken channels: 0
10:18:28:ST3_smx:INFO:	List of broken channels: []
10:18:28:ST3_smx:INFO:	Total # of broken channels: 0
10:18:28:ST3_smx:INFO:	List of broken channels: []
10:18:29:ST3_smx:INFO:	Configuring SMX FAST
10:18:31:ST3_smx:INFO:	chip: 8-1 	 21.902970 C 	 1282.867635 mV
10:18:31:ST3_smx:INFO:		Electrons
10:18:31:ST3_smx:INFO:	# loops 0
10:18:33:ST3_smx:INFO:	# loops 1
10:18:35:ST3_smx:INFO:	# loops 2
10:18:36:ST3_smx:INFO:	Total # of broken channels: 0
10:18:36:ST3_smx:INFO:	List of broken channels: []
10:18:36:ST3_smx:INFO:	Total # of broken channels: 0
10:18:36:ST3_smx:INFO:	List of broken channels: []
10:18:37:ST3_smx:INFO:	Configuring SMX FAST
10:18:39:ST3_smx:INFO:	chip: 3-2 	 12.438562 C 	 1311.880960 mV
10:18:39:ST3_smx:INFO:		Electrons
10:18:39:ST3_smx:INFO:	# loops 0
10:18:41:ST3_smx:INFO:	# loops 1
10:18:43:ST3_smx:INFO:	# loops 2
10:18:44:ST3_smx:INFO:	Total # of broken channels: 0
10:18:44:ST3_smx:INFO:	List of broken channels: []
10:18:44:ST3_smx:INFO:	Total # of broken channels: 0
10:18:44:ST3_smx:INFO:	List of broken channels: []
10:18:45:ST3_smx:INFO:	Configuring SMX FAST
10:18:47:ST3_smx:INFO:	chip: 10-3 	 18.745682 C 	 1288.680240 mV
10:18:47:ST3_smx:INFO:		Electrons
10:18:47:ST3_smx:INFO:	# loops 0
10:18:49:ST3_smx:INFO:	# loops 1
10:18:50:ST3_smx:INFO:	# loops 2
10:18:52:ST3_smx:INFO:	Total # of broken channels: 0
10:18:52:ST3_smx:INFO:	List of broken channels: []
10:18:52:ST3_smx:INFO:	Total # of broken channels: 0
10:18:52:ST3_smx:INFO:	List of broken channels: []
10:18:53:ST3_smx:INFO:	Configuring SMX FAST
10:18:55:ST3_smx:INFO:	chip: 5-4 	 15.590880 C 	 1300.290540 mV
10:18:55:ST3_smx:INFO:		Electrons
10:18:55:ST3_smx:INFO:	# loops 0
10:18:56:ST3_smx:INFO:	# loops 1
10:18:58:ST3_smx:INFO:	# loops 2
10:18:59:ST3_smx:INFO:	Total # of broken channels: 0
10:18:59:ST3_smx:INFO:	List of broken channels: []
10:18:59:ST3_smx:INFO:	Total # of broken channels: 0
10:18:59:ST3_smx:INFO:	List of broken channels: []
10:19:00:ST3_smx:INFO:	Configuring SMX FAST
10:19:02:ST3_smx:INFO:	chip: 12-5 	 6.141382 C 	 1369.534860 mV
10:19:02:ST3_smx:INFO:		Electrons
10:19:02:ST3_smx:INFO:	# loops 0
10:19:04:ST3_smx:INFO:	# loops 1
10:19:06:ST3_smx:INFO:	# loops 2
10:19:07:ST3_smx:INFO:	Total # of broken channels: 0
10:19:07:ST3_smx:INFO:	List of broken channels: []
10:19:07:ST3_smx:INFO:	Total # of broken channels: 0
10:19:07:ST3_smx:INFO:	List of broken channels: []
10:19:08:ST3_smx:INFO:	Configuring SMX FAST
10:19:10:ST3_smx:INFO:	chip: 7-6 	 25.062742 C 	 1282.867635 mV
10:19:10:ST3_smx:INFO:		Electrons
10:19:10:ST3_smx:INFO:	# loops 0
10:19:12:ST3_smx:INFO:	# loops 1
10:19:13:ST3_smx:INFO:	# loops 2
10:19:15:ST3_smx:INFO:	Total # of broken channels: 0
10:19:15:ST3_smx:INFO:	List of broken channels: []
10:19:15:ST3_smx:INFO:	Total # of broken channels: 0
10:19:15:ST3_smx:INFO:	List of broken channels: []
10:19:16:ST3_smx:INFO:	Configuring SMX FAST
10:19:18:ST3_smx:INFO:	chip: 14-7 	 21.902970 C 	 1317.668715 mV
10:19:18:ST3_smx:INFO:		Electrons
10:19:18:ST3_smx:INFO:	# loops 0
10:19:20:ST3_smx:INFO:	# loops 1
10:19:21:ST3_smx:INFO:	# loops 2
10:19:23:ST3_smx:INFO:	Total # of broken channels: 0
10:19:23:ST3_smx:INFO:	List of broken channels: []
10:19:23:ST3_smx:INFO:	Total # of broken channels: 0
10:19:23:ST3_smx:INFO:	List of broken channels: []
10:19:24:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:19:24:febtest:INFO:	01-00 | XA-000-08-003-000-000-147-09 |  12.4 | 1329.2
10:19:24:febtest:INFO:	08-01 | XA-000-08-003-000-000-144-09 |  15.6 | 1306.1
10:19:24:febtest:INFO:	03-02 | XA-000-08-003-000-000-143-14 |   9.3 | 1329.2
10:19:25:febtest:INFO:	10-03 | XA-000-08-003-000-000-138-14 |  15.6 | 1311.9
10:19:25:febtest:INFO:	05-04 | XA-000-08-003-000-000-137-14 |  15.6 | 1311.9
10:19:25:febtest:INFO:	12-05 | XA-000-08-003-000-000-149-09 |   6.1 | 1363.8
10:19:25:febtest:INFO:	07-06 | XA-000-08-003-000-000-148-09 |  25.1 | 1288.7
10:19:26:febtest:INFO:	14-07 | XA-000-08-003-000-000-145-09 |  21.9 | 1317.7
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_04_05-10_18_04
OPERATOR  : Alois Alzheimer
SITE      : KIT
SETUP     : KIT_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L5UL301017 M5UL3B2010172A2 124 B

FEB_SN : 3011
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID:	18234

MODULE_NAME:	L5UL301017 M5UL3B2010172A2 124 B

MODULE_TYPE:	
MODULE_LADDER:	
MODULE_MODULE:	
MODULE_SIZE:	0
MODULE_GRADE:	
---------------------------------------
VI_before_Init : ['2.200', '1.6270', '2.800', '0.4749', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.200', '1.6770', '2.800', '0.5480', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.200', '1.6770', '2.800', '0.3291', '0.000', '0.0000', '0.000', '0.0000']