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FEB_3013 09.04.24 10:47:52
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10:47:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:47:52:ST3_Shared:INFO: FEB-ASIC
10:47:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:47:53:febtest:INFO: Testing FEB with SN 3013
10:47:56:smx_tester:INFO: Scanning setup
10:47:56:elinks:INFO: Disabling clock on downlink 0
10:47:56:elinks:INFO: Disabling clock on downlink 1
10:47:56:elinks:INFO: Disabling clock on downlink 2
10:47:56:elinks:INFO: Disabling clock on downlink 3
10:47:56:elinks:INFO: Disabling clock on downlink 4
10:47:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:47:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:47:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:47:56:elinks:INFO: Disabling clock on downlink 0
10:47:56:elinks:INFO: Disabling clock on downlink 1
10:47:56:elinks:INFO: Disabling clock on downlink 2
10:47:56:elinks:INFO: Disabling clock on downlink 3
10:47:56:elinks:INFO: Disabling clock on downlink 4
10:47:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:47:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:47:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
10:47:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
10:47:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
10:47:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
10:47:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
10:47:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
10:47:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
10:47:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
10:47:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
10:47:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
10:47:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
10:47:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
10:47:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
10:47:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
10:47:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
10:47:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
10:47:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:47:56:elinks:INFO: Disabling clock on downlink 0
10:47:56:elinks:INFO: Disabling clock on downlink 1
10:47:56:elinks:INFO: Disabling clock on downlink 2
10:47:56:elinks:INFO: Disabling clock on downlink 3
10:47:56:elinks:INFO: Disabling clock on downlink 4
10:47:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:47:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:47:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:47:56:elinks:INFO: Disabling clock on downlink 0
10:47:56:elinks:INFO: Disabling clock on downlink 1
10:47:56:elinks:INFO: Disabling clock on downlink 2
10:47:56:elinks:INFO: Disabling clock on downlink 3
10:47:56:elinks:INFO: Disabling clock on downlink 4
10:47:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:47:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:47:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:47:56:elinks:INFO: Disabling clock on downlink 0
10:47:56:elinks:INFO: Disabling clock on downlink 1
10:47:56:elinks:INFO: Disabling clock on downlink 2
10:47:56:elinks:INFO: Disabling clock on downlink 3
10:47:56:elinks:INFO: Disabling clock on downlink 4
10:47:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:47:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:47:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:47:56:setup_element:INFO: Scanning clock phase
10:47:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:47:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:47:57:setup_element:INFO: Clock phase scan results for group 0, downlink 1
10:47:57:setup_element:INFO: Eye window for uplink 0 : _________________________________________________________________________XXXXX__
Clock Delay: 35
10:47:57:setup_element:INFO: Eye window for uplink 1 : _________________________________________________________________________XXXXX__
Clock Delay: 35
10:47:57:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXX___
Clock Delay: 34
10:47:57:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXX___
Clock Delay: 34
10:47:57:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXX____
Clock Delay: 33
10:47:57:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXX____
Clock Delay: 33
10:47:57:setup_element:INFO: Eye window for uplink 6 : __________________________________________________________________________XXXX__
Clock Delay: 35
10:47:57:setup_element:INFO: Eye window for uplink 7 : __________________________________________________________________________XXXX__
Clock Delay: 35
10:47:57:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXX______
Clock Delay: 31
10:47:57:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXX______
Clock Delay: 31
10:47:57:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXX_____
Clock Delay: 32
10:47:57:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXX_____
Clock Delay: 32
10:47:57:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________XXXX____
Clock Delay: 33
10:47:57:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________XXXX____
Clock Delay: 33
10:47:57:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________XXX_____
Clock Delay: 33
10:47:57:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________XXX_____
Clock Delay: 33
10:47:57:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
10:47:57:setup_element:INFO: Scanning data phases
10:47:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:47:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:48:02:setup_element:INFO: Data phase scan results for group 0, downlink 1
10:48:02:setup_element:INFO: Eye window for uplink 0 : ___XXXXXX_______________________________
Data delay found: 25
10:48:02:setup_element:INFO: Eye window for uplink 1 : XXXXX_________________________________XX
Data delay found: 21
10:48:02:setup_element:INFO: Eye window for uplink 2 : XXXXXX__________________________________
Data delay found: 22
10:48:02:setup_element:INFO: Eye window for uplink 3 : XX__________________________________XXXX
Data delay found: 18
10:48:02:setup_element:INFO: Eye window for uplink 4 : ___________________________________XXXXX
Data delay found: 17
10:48:02:setup_element:INFO: Eye window for uplink 5 : _______________________________XXXXX____
Data delay found: 13
10:48:02:setup_element:INFO: Eye window for uplink 6 : _______________________________XXXXX____
Data delay found: 13
10:48:02:setup_element:INFO: Eye window for uplink 7 : ___________________________XXXXX________
Data delay found: 9
10:48:02:setup_element:INFO: Eye window for uplink 8 : _____________XXXXXXXX___________________
Data delay found: 36
10:48:02:setup_element:INFO: Eye window for uplink 9 : __________________XXXXXXXX______________
Data delay found: 1
10:48:02:setup_element:INFO: Eye window for uplink 10: ________________XXXXXXXX________________
Data delay found: 39
10:48:02:setup_element:INFO: Eye window for uplink 11: ______________________XXXXX_____________
Data delay found: 4
10:48:02:setup_element:INFO: Eye window for uplink 12: ____________________XXXXX_______________
Data delay found: 2
10:48:02:setup_element:INFO: Eye window for uplink 13: ________________________XXXX____________
Data delay found: 5
10:48:02:setup_element:INFO: Eye window for uplink 14: _________________XXXXX__________________
Data delay found: 39
10:48:02:setup_element:INFO: Eye window for uplink 15: ____________________XXXXX_______________
Data delay found: 2
10:48:02:setup_element:INFO: Setting the data phase to 25 for uplink 0
10:48:02:setup_element:INFO: Setting the data phase to 21 for uplink 1
10:48:02:setup_element:INFO: Setting the data phase to 22 for uplink 2
10:48:02:setup_element:INFO: Setting the data phase to 18 for uplink 3
10:48:02:setup_element:INFO: Setting the data phase to 17 for uplink 4
10:48:02:setup_element:INFO: Setting the data phase to 13 for uplink 5
10:48:02:setup_element:INFO: Setting the data phase to 13 for uplink 6
10:48:02:setup_element:INFO: Setting the data phase to 9 for uplink 7
10:48:02:setup_element:INFO: Setting the data phase to 36 for uplink 8
10:48:02:setup_element:INFO: Setting the data phase to 1 for uplink 9
10:48:02:setup_element:INFO: Setting the data phase to 39 for uplink 10
10:48:02:setup_element:INFO: Setting the data phase to 4 for uplink 11
10:48:02:setup_element:INFO: Setting the data phase to 2 for uplink 12
10:48:02:setup_element:INFO: Setting the data phase to 5 for uplink 13
10:48:02:setup_element:INFO: Setting the data phase to 39 for uplink 14
10:48:02:setup_element:INFO: Setting the data phase to 2 for uplink 15
10:48:02:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 71
Eye Windows:
Uplink 0: _________________________________________________________________________XXXXX__
Uplink 1: _________________________________________________________________________XXXXX__
Uplink 2: ________________________________________________________________________XXXXX___
Uplink 3: ________________________________________________________________________XXXXX___
Uplink 4: _______________________________________________________________________XXXXX____
Uplink 5: _______________________________________________________________________XXXXX____
Uplink 6: __________________________________________________________________________XXXX__
Uplink 7: __________________________________________________________________________XXXX__
Uplink 8: _____________________________________________________________________XXXXX______
Uplink 9: _____________________________________________________________________XXXXX______
Uplink 10: ______________________________________________________________________XXXXX_____
Uplink 11: ______________________________________________________________________XXXXX_____
Uplink 12: ________________________________________________________________________XXXX____
Uplink 13: ________________________________________________________________________XXXX____
Uplink 14: ________________________________________________________________________XXX_____
Uplink 15: ________________________________________________________________________XXX_____
Data phase characteristics:
Uplink 0:
Optimal Phase: 25
Window Length: 34
Eye Window: ___XXXXXX_______________________________
Uplink 1:
Optimal Phase: 21
Window Length: 33
Eye Window: XXXXX_________________________________XX
Uplink 2:
Optimal Phase: 22
Window Length: 34
Eye Window: XXXXXX__________________________________
Uplink 3:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 4:
Optimal Phase: 17
Window Length: 35
Eye Window: ___________________________________XXXXX
Uplink 5:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 6:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 7:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 8:
Optimal Phase: 36
Window Length: 32
Eye Window: _____________XXXXXXXX___________________
Uplink 9:
Optimal Phase: 1
Window Length: 32
Eye Window: __________________XXXXXXXX______________
Uplink 10:
Optimal Phase: 39
Window Length: 32
Eye Window: ________________XXXXXXXX________________
Uplink 11:
Optimal Phase: 4
Window Length: 35
Eye Window: ______________________XXXXX_____________
Uplink 12:
Optimal Phase: 2
Window Length: 35
Eye Window: ____________________XXXXX_______________
Uplink 13:
Optimal Phase: 5
Window Length: 36
Eye Window: ________________________XXXX____________
Uplink 14:
Optimal Phase: 39
Window Length: 35
Eye Window: _________________XXXXX__________________
Uplink 15:
Optimal Phase: 2
Window Length: 35
Eye Window: ____________________XXXXX_______________
]
10:48:02:setup_element:INFO: Beginning SMX ASICs map scan
10:48:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:48:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:48:02:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:48:02:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:48:02:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:48:02:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
10:48:02:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
10:48:02:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:48:02:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:48:02:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
10:48:02:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
10:48:03:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:48:03:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:48:03:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
10:48:03:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
10:48:03:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:48:03:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:48:03:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
10:48:03:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
10:48:03:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:48:03:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:48:05:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 71
Eye Windows:
Uplink 0: _________________________________________________________________________XXXXX__
Uplink 1: _________________________________________________________________________XXXXX__
Uplink 2: ________________________________________________________________________XXXXX___
Uplink 3: ________________________________________________________________________XXXXX___
Uplink 4: _______________________________________________________________________XXXXX____
Uplink 5: _______________________________________________________________________XXXXX____
Uplink 6: __________________________________________________________________________XXXX__
Uplink 7: __________________________________________________________________________XXXX__
Uplink 8: _____________________________________________________________________XXXXX______
Uplink 9: _____________________________________________________________________XXXXX______
Uplink 10: ______________________________________________________________________XXXXX_____
Uplink 11: ______________________________________________________________________XXXXX_____
Uplink 12: ________________________________________________________________________XXXX____
Uplink 13: ________________________________________________________________________XXXX____
Uplink 14: ________________________________________________________________________XXX_____
Uplink 15: ________________________________________________________________________XXX_____
Data phase characteristics:
Uplink 0:
Optimal Phase: 25
Window Length: 34
Eye Window: ___XXXXXX_______________________________
Uplink 1:
Optimal Phase: 21
Window Length: 33
Eye Window: XXXXX_________________________________XX
Uplink 2:
Optimal Phase: 22
Window Length: 34
Eye Window: XXXXXX__________________________________
Uplink 3:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 4:
Optimal Phase: 17
Window Length: 35
Eye Window: ___________________________________XXXXX
Uplink 5:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 6:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 7:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 8:
Optimal Phase: 36
Window Length: 32
Eye Window: _____________XXXXXXXX___________________
Uplink 9:
Optimal Phase: 1
Window Length: 32
Eye Window: __________________XXXXXXXX______________
Uplink 10:
Optimal Phase: 39
Window Length: 32
Eye Window: ________________XXXXXXXX________________
Uplink 11:
Optimal Phase: 4
Window Length: 35
Eye Window: ______________________XXXXX_____________
Uplink 12:
Optimal Phase: 2
Window Length: 35
Eye Window: ____________________XXXXX_______________
Uplink 13:
Optimal Phase: 5
Window Length: 36
Eye Window: ________________________XXXX____________
Uplink 14:
Optimal Phase: 39
Window Length: 35
Eye Window: _________________XXXXX__________________
Uplink 15:
Optimal Phase: 2
Window Length: 35
Eye Window: ____________________XXXXX_______________
10:48:05:setup_element:INFO: Performing Elink synchronization
10:48:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:48:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:48:05:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:48:05:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:48:05:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
10:48:05:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:48:05:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
FEB type: A FEB_A: 1 FEB_B: 0
10:48:06:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:48:07:febtest:INFO: 01-00 | XA-000-08-003-000-002-015-07 | -12.7 | 1369.5
10:48:07:febtest:INFO: 08-01 | XA-000-08-003-000-002-013-07 | -6.4 | 1369.5
10:48:07:febtest:INFO: 03-02 | XA-000-08-003-000-002-014-07 | 6.1 | 1317.7
10:48:07:febtest:INFO: 10-03 | XA-000-08-003-000-002-047-09 | -6.4 | 1358.0
10:48:07:febtest:INFO: 05-04 | XA-000-08-003-000-002-011-07 | -9.6 | 1369.5
10:48:08:febtest:INFO: 12-05 | XA-000-08-003-000-001-251-15 | -0.1 | 1335.0
10:48:08:febtest:INFO: 07-06 | XA-000-08-003-000-002-012-07 | -0.1 | 1340.8
10:48:08:febtest:INFO: 14-07 | XA-000-08-003-000-001-250-15 | -0.1 | 1335.0
10:48:08:ST3_smx:INFO: Configuring SMX FAST
10:48:10:ST3_smx:INFO: chip: 1-0 -6.423158 C 1358.043840 mV
10:48:10:ST3_smx:INFO: Electrons
10:48:10:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:48:13:ST3_smx:INFO: ----> Checking Analog response
10:48:13:ST3_smx:INFO: ----> Checking broken channels
10:48:14:ST3_smx:INFO: Total # broken ch: 1
10:48:14:ST3_smx:INFO: List FAST: [98]
10:48:14:ST3_smx:INFO: List SLOW: []
10:48:14:ST3_smx:INFO: Holes
10:48:14:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:48:16:ST3_smx:INFO: ----> Checking Analog response
10:48:16:ST3_smx:INFO: ----> Checking broken channels
10:48:16:ST3_smx:INFO: Total # broken ch: 1
10:48:16:ST3_smx:INFO: List FAST: [98]
10:48:16:ST3_smx:INFO: List SLOW: []
10:48:17:ST3_smx:INFO: Configuring SMX FAST
10:48:19:ST3_smx:INFO: chip: 8-1 -9.558080 C 1381.006000 mV
10:48:19:ST3_smx:INFO: Electrons
10:48:19:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:48:22:ST3_smx:INFO: ----> Checking Analog response
10:48:22:ST3_smx:INFO: ----> Checking broken channels
10:48:22:ST3_smx:INFO: Total # broken ch: 1
10:48:22:ST3_smx:INFO: List FAST: [100]
10:48:22:ST3_smx:INFO: List SLOW: []
10:48:22:ST3_smx:INFO: Holes
10:48:22:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:48:24:ST3_smx:INFO: ----> Checking Analog response
10:48:24:ST3_smx:INFO: ----> Checking broken channels
10:48:25:ST3_smx:INFO: Total # broken ch: 1
10:48:25:ST3_smx:INFO: List FAST: [100]
10:48:25:ST3_smx:INFO: List SLOW: []
10:48:25:ST3_smx:INFO: Configuring SMX FAST
10:48:28:ST3_smx:INFO: chip: 3-2 -0.145857 C 1340.770035 mV
10:48:28:ST3_smx:INFO: Electrons
10:48:28:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:48:30:ST3_smx:INFO: ----> Checking Analog response
10:48:30:ST3_smx:INFO: ----> Checking broken channels
10:48:31:ST3_smx:INFO: Total # broken ch: 1
10:48:31:ST3_smx:INFO: List FAST: [94]
10:48:31:ST3_smx:INFO: List SLOW: []
10:48:31:ST3_smx:INFO: Holes
10:48:31:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:48:33:ST3_smx:INFO: ----> Checking Analog response
10:48:33:ST3_smx:INFO: ----> Checking broken channels
10:48:33:ST3_smx:INFO: Total # broken ch: 1
10:48:33:ST3_smx:INFO: List FAST: [94]
10:48:33:ST3_smx:INFO: List SLOW: []
10:48:34:ST3_smx:INFO: Configuring SMX FAST
10:48:36:ST3_smx:INFO: chip: 10-3 -6.423158 C 1369.534860 mV
10:48:36:ST3_smx:INFO: Electrons
10:48:36:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:48:39:ST3_smx:INFO: ----> Checking Analog response
10:48:39:ST3_smx:INFO: ----> Checking broken channels
10:48:39:ST3_smx:INFO: Total # broken ch: 1
10:48:39:ST3_smx:INFO: List FAST: [122]
10:48:39:ST3_smx:INFO: List SLOW: []
10:48:39:ST3_smx:INFO: Holes
10:48:39:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:48:42:ST3_smx:INFO: ----> Checking Analog response
10:48:42:ST3_smx:INFO: ----> Checking broken channels
10:48:42:ST3_smx:INFO: Total # broken ch: 1
10:48:42:ST3_smx:INFO: List FAST: [122]
10:48:42:ST3_smx:INFO: List SLOW: []
10:48:43:ST3_smx:INFO: Configuring SMX FAST
10:48:46:ST3_smx:INFO: chip: 5-4 -9.558080 C 1381.006000 mV
10:48:46:ST3_smx:INFO: Electrons
10:48:46:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:48:48:ST3_smx:INFO: ----> Checking Analog response
10:48:48:ST3_smx:INFO: ----> Checking broken channels
10:48:49:ST3_smx:INFO: Total # broken ch: 2
10:48:49:ST3_smx:INFO: List FAST: [60, 111]
10:48:49:ST3_smx:INFO: List SLOW: []
10:48:49:ST3_smx:INFO: Holes
10:48:49:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:48:51:ST3_smx:INFO: ----> Checking Analog response
10:48:51:ST3_smx:INFO: ----> Checking broken channels
10:48:51:ST3_smx:INFO: Total # broken ch: 2
10:48:51:ST3_smx:INFO: List FAST: [60, 111]
10:48:51:ST3_smx:INFO: List SLOW: []
10:48:52:ST3_smx:INFO: Configuring SMX FAST
10:48:54:ST3_smx:INFO: chip: 12-5 -3.285750 C 1346.532940 mV
10:48:54:ST3_smx:INFO: Electrons
10:48:54:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:48:57:ST3_smx:INFO: ----> Checking Analog response
10:48:57:ST3_smx:INFO: ----> Checking broken channels
10:48:57:ST3_smx:INFO: Total # broken ch: 0
10:48:57:ST3_smx:INFO: List FAST: []
10:48:57:ST3_smx:INFO: List SLOW: []
10:48:57:ST3_smx:INFO: Holes
10:48:57:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:49:00:ST3_smx:INFO: ----> Checking Analog response
10:49:00:ST3_smx:INFO: ----> Checking broken channels
10:49:00:ST3_smx:INFO: Total # broken ch: 0
10:49:00:ST3_smx:INFO: List FAST: []
10:49:00:ST3_smx:INFO: List SLOW: []
10:49:01:ST3_smx:INFO: Configuring SMX FAST
10:49:03:ST3_smx:INFO: chip: 7-6 2.996520 C 1340.770035 mV
10:49:03:ST3_smx:INFO: Electrons
10:49:03:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:49:06:ST3_smx:INFO: ----> Checking Analog response
10:49:06:ST3_smx:INFO: ----> Checking broken channels
10:49:06:ST3_smx:INFO: Total # broken ch: 3
10:49:06:ST3_smx:INFO: List FAST: [24, 30, 34]
10:49:06:ST3_smx:INFO: List SLOW: []
10:49:06:ST3_smx:INFO: Holes
10:49:06:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:49:08:ST3_smx:INFO: ----> Checking Analog response
10:49:08:ST3_smx:INFO: ----> Checking broken channels
10:49:08:ST3_smx:INFO: Total # broken ch: 3
10:49:08:ST3_smx:INFO: List FAST: [24, 30, 34]
10:49:08:ST3_smx:INFO: List SLOW: []
10:49:09:ST3_smx:INFO: Configuring SMX FAST
10:49:11:ST3_smx:INFO: chip: 14-7 -6.423158 C 1363.791835 mV
10:49:11:ST3_smx:INFO: Electrons
10:49:11:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:49:14:ST3_smx:INFO: ----> Checking Analog response
10:49:14:ST3_smx:INFO: ----> Checking broken channels
10:49:14:ST3_smx:INFO: Total # broken ch: 5
10:49:14:ST3_smx:INFO: List FAST: [1, 54, 75, 86, 125]
10:49:14:ST3_smx:INFO: List SLOW: []
10:49:14:ST3_smx:INFO: Holes
10:49:14:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
10:49:16:ST3_smx:INFO: ----> Checking Analog response
10:49:16:ST3_smx:INFO: ----> Checking broken channels
10:49:17:ST3_smx:INFO: Total # broken ch: 5
10:49:17:ST3_smx:INFO: List FAST: [1, 54, 75, 86, 125]
10:49:17:ST3_smx:INFO: List SLOW: []
10:49:17:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:49:18:febtest:INFO: 01-00 | XA-000-08-003-000-002-015-07 | -15.8 | 1403.9
10:49:18:febtest:INFO: 08-01 | XA-000-08-003-000-002-013-07 | -15.8 | 1415.3
10:49:18:febtest:INFO: 03-02 | XA-000-08-003-000-002-014-07 | -6.4 | 1369.5
10:49:18:febtest:INFO: 10-03 | XA-000-08-003-000-002-047-09 | -9.6 | 1392.5
10:49:18:febtest:INFO: 05-04 | XA-000-08-003-000-002-011-07 | -12.7 | 1398.2
10:49:19:febtest:INFO: 12-05 | XA-000-08-003-000-001-251-15 | -6.4 | 1358.0
10:49:19:febtest:INFO: 07-06 | XA-000-08-003-000-002-012-07 | -0.1 | 1346.5
10:49:19:febtest:INFO: 14-07 | XA-000-08-003-000-001-250-15 | -3.3 | 1363.8
############################################################
# S U M M A R Y #
############################################################
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-ASIC
TEST_DATE : 24_04_09-10_47_52
OPERATOR : Benjamin;
SITE : KIT
SETUP : KIT_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME :
FEB_SN : 3013
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
MODULE_NAME
---------------------------------------
VI_before_Init : ['2.199', '1.7530', '2.801', '2.1480', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.200', '1.6280', '2.800', '0.4997', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.200', '1.6270', '2.800', '0.3128', '0.000', '0.0000', '0.000', '0.0000']