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FEB_3016 30.04.24 08:08:03
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08:08:03:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:08:03:ST3_Shared:INFO: FEB-Sensor
08:08:03:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:08:05:ST3_ModuleSelector:INFO: L5UL501018 M5UL5B0010180A2 62 C
08:08:05:ST3_ModuleSelector:INFO: 15083
08:08:05:febtest:INFO: Testing FEB with SN 3016
08:08:08:smx_tester:INFO: Scanning setup
08:08:08:elinks:INFO: Disabling clock on downlink 0
08:08:08:elinks:INFO: Disabling clock on downlink 1
08:08:08:elinks:INFO: Disabling clock on downlink 2
08:08:08:elinks:INFO: Disabling clock on downlink 3
08:08:08:elinks:INFO: Disabling clock on downlink 4
08:08:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:08:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:08:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:08:08:elinks:INFO: Disabling clock on downlink 0
08:08:08:elinks:INFO: Disabling clock on downlink 1
08:08:08:elinks:INFO: Disabling clock on downlink 2
08:08:08:elinks:INFO: Disabling clock on downlink 3
08:08:08:elinks:INFO: Disabling clock on downlink 4
08:08:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:08:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:08:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
08:08:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
08:08:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
08:08:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
08:08:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
08:08:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
08:08:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
08:08:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
08:08:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
08:08:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
08:08:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
08:08:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
08:08:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
08:08:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
08:08:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
08:08:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
08:08:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:08:08:elinks:INFO: Disabling clock on downlink 0
08:08:08:elinks:INFO: Disabling clock on downlink 1
08:08:08:elinks:INFO: Disabling clock on downlink 2
08:08:08:elinks:INFO: Disabling clock on downlink 3
08:08:08:elinks:INFO: Disabling clock on downlink 4
08:08:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:08:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:08:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:08:08:elinks:INFO: Disabling clock on downlink 0
08:08:08:elinks:INFO: Disabling clock on downlink 1
08:08:08:elinks:INFO: Disabling clock on downlink 2
08:08:08:elinks:INFO: Disabling clock on downlink 3
08:08:08:elinks:INFO: Disabling clock on downlink 4
08:08:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:08:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:08:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:08:08:elinks:INFO: Disabling clock on downlink 0
08:08:08:elinks:INFO: Disabling clock on downlink 1
08:08:08:elinks:INFO: Disabling clock on downlink 2
08:08:08:elinks:INFO: Disabling clock on downlink 3
08:08:08:elinks:INFO: Disabling clock on downlink 4
08:08:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:08:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:08:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:08:09:setup_element:INFO: Scanning clock phase
08:08:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:08:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:08:09:setup_element:INFO: Clock phase scan results for group 0, downlink 1
08:08:09:setup_element:INFO: Eye window for uplink 0 : _________________________________________________________________XXX____________
Clock Delay: 26
08:08:09:setup_element:INFO: Eye window for uplink 1 : _________________________________________________________________XXX____________
Clock Delay: 26
08:08:09:setup_element:INFO: Eye window for uplink 2 : __________________________________________________________________XXXX__________
Clock Delay: 27
08:08:09:setup_element:INFO: Eye window for uplink 3 : __________________________________________________________________XXXX__________
Clock Delay: 27
08:08:09:setup_element:INFO: Eye window for uplink 4 : __________________________________________________________________XXX___________
Clock Delay: 27
08:08:09:setup_element:INFO: Eye window for uplink 5 : __________________________________________________________________XXX___________
Clock Delay: 27
08:08:09:setup_element:INFO: Eye window for uplink 6 : __________________________________________________________________XXXX__________
Clock Delay: 27
08:08:09:setup_element:INFO: Eye window for uplink 7 : __________________________________________________________________XXXX__________
Clock Delay: 27
08:08:09:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________XXXXX____________
Clock Delay: 25
08:08:09:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________XXXXX____________
Clock Delay: 25
08:08:09:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________XXXXX____________
Clock Delay: 25
08:08:09:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________XXXXX____________
Clock Delay: 25
08:08:09:setup_element:INFO: Eye window for uplink 12: _________________________________________________________________XXXXX__________
Clock Delay: 27
08:08:09:setup_element:INFO: Eye window for uplink 13: _________________________________________________________________XXXXX__________
Clock Delay: 27
08:08:09:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________XXXXXX__________
Clock Delay: 26
08:08:09:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________XXXXXX__________
Clock Delay: 26
08:08:09:setup_element:INFO: Setting the clock phase to 26 for group 0, downlink 1
08:08:09:setup_element:INFO: Scanning data phases
08:08:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:08:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:08:14:setup_element:INFO: Data phase scan results for group 0, downlink 1
08:08:14:setup_element:INFO: Eye window for uplink 0 : _______________________________XXXXXXX__
Data delay found: 14
08:08:14:setup_element:INFO: Eye window for uplink 1 : __________________________XXXXXXXX______
Data delay found: 9
08:08:14:setup_element:INFO: Eye window for uplink 2 : _________________________________XXXXXXX
Data delay found: 16
08:08:14:setup_element:INFO: Eye window for uplink 3 : ____________________________XXXXXXXX____
Data delay found: 11
08:08:14:setup_element:INFO: Eye window for uplink 4 : __________________________XXXXXXX_______
Data delay found: 9
08:08:14:setup_element:INFO: Eye window for uplink 5 : ______________________XXXXXXX___________
Data delay found: 5
08:08:14:setup_element:INFO: Eye window for uplink 6 : _____________________XXXXXXX____________
Data delay found: 4
08:08:14:setup_element:INFO: Eye window for uplink 7 : _________________XXXXXXX________________
Data delay found: 0
08:08:14:setup_element:INFO: Eye window for uplink 8 : ______XXXXXXXXX_________________________
Data delay found: 30
08:08:14:setup_element:INFO: Eye window for uplink 9 : ____________XXXXXXX_____________________
Data delay found: 35
08:08:14:setup_element:INFO: Eye window for uplink 10: _____XXXXXXXXXX_________________________
Data delay found: 29
08:08:14:setup_element:INFO: Eye window for uplink 11: _________XXXXXXXXX______________________
Data delay found: 33
08:08:14:setup_element:INFO: Eye window for uplink 12: ___________XXXXXXX______________________
Data delay found: 34
08:08:14:setup_element:INFO: Eye window for uplink 13: _______________XXXXXX___________________
Data delay found: 37
08:08:14:setup_element:INFO: Eye window for uplink 14: __________XXXXXXX_______________________
Data delay found: 33
08:08:14:setup_element:INFO: Eye window for uplink 15: ____________XXXXXXXX____________________
Data delay found: 35
08:08:14:setup_element:INFO: Setting the data phase to 14 for uplink 0
08:08:14:setup_element:INFO: Setting the data phase to 9 for uplink 1
08:08:14:setup_element:INFO: Setting the data phase to 16 for uplink 2
08:08:14:setup_element:INFO: Setting the data phase to 11 for uplink 3
08:08:14:setup_element:INFO: Setting the data phase to 9 for uplink 4
08:08:14:setup_element:INFO: Setting the data phase to 5 for uplink 5
08:08:14:setup_element:INFO: Setting the data phase to 4 for uplink 6
08:08:14:setup_element:INFO: Setting the data phase to 0 for uplink 7
08:08:14:setup_element:INFO: Setting the data phase to 30 for uplink 8
08:08:14:setup_element:INFO: Setting the data phase to 35 for uplink 9
08:08:14:setup_element:INFO: Setting the data phase to 29 for uplink 10
08:08:14:setup_element:INFO: Setting the data phase to 33 for uplink 11
08:08:14:setup_element:INFO: Setting the data phase to 34 for uplink 12
08:08:14:setup_element:INFO: Setting the data phase to 37 for uplink 13
08:08:14:setup_element:INFO: Setting the data phase to 33 for uplink 14
08:08:14:setup_element:INFO: Setting the data phase to 35 for uplink 15
08:08:14:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 26
Window Length: 73
Eye Windows:
Uplink 0: _________________________________________________________________XXX____________
Uplink 1: _________________________________________________________________XXX____________
Uplink 2: __________________________________________________________________XXXX__________
Uplink 3: __________________________________________________________________XXXX__________
Uplink 4: __________________________________________________________________XXX___________
Uplink 5: __________________________________________________________________XXX___________
Uplink 6: __________________________________________________________________XXXX__________
Uplink 7: __________________________________________________________________XXXX__________
Uplink 8: _______________________________________________________________XXXXX____________
Uplink 9: _______________________________________________________________XXXXX____________
Uplink 10: _______________________________________________________________XXXXX____________
Uplink 11: _______________________________________________________________XXXXX____________
Uplink 12: _________________________________________________________________XXXXX__________
Uplink 13: _________________________________________________________________XXXXX__________
Uplink 14: ________________________________________________________________XXXXXX__________
Uplink 15: ________________________________________________________________XXXXXX__________
Data phase characteristics:
Uplink 0:
Optimal Phase: 14
Window Length: 33
Eye Window: _______________________________XXXXXXX__
Uplink 1:
Optimal Phase: 9
Window Length: 32
Eye Window: __________________________XXXXXXXX______
Uplink 2:
Optimal Phase: 16
Window Length: 33
Eye Window: _________________________________XXXXXXX
Uplink 3:
Optimal Phase: 11
Window Length: 32
Eye Window: ____________________________XXXXXXXX____
Uplink 4:
Optimal Phase: 9
Window Length: 33
Eye Window: __________________________XXXXXXX_______
Uplink 5:
Optimal Phase: 5
Window Length: 33
Eye Window: ______________________XXXXXXX___________
Uplink 6:
Optimal Phase: 4
Window Length: 33
Eye Window: _____________________XXXXXXX____________
Uplink 7:
Optimal Phase: 0
Window Length: 33
Eye Window: _________________XXXXXXX________________
Uplink 8:
Optimal Phase: 30
Window Length: 31
Eye Window: ______XXXXXXXXX_________________________
Uplink 9:
Optimal Phase: 35
Window Length: 33
Eye Window: ____________XXXXXXX_____________________
Uplink 10:
Optimal Phase: 29
Window Length: 30
Eye Window: _____XXXXXXXXXX_________________________
Uplink 11:
Optimal Phase: 33
Window Length: 31
Eye Window: _________XXXXXXXXX______________________
Uplink 12:
Optimal Phase: 34
Window Length: 33
Eye Window: ___________XXXXXXX______________________
Uplink 13:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 14:
Optimal Phase: 33
Window Length: 33
Eye Window: __________XXXXXXX_______________________
Uplink 15:
Optimal Phase: 35
Window Length: 32
Eye Window: ____________XXXXXXXX____________________
]
08:08:14:setup_element:INFO: Beginning SMX ASICs map scan
08:08:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:08:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:08:14:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:08:14:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:08:14:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:08:14:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
08:08:14:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
08:08:14:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:08:14:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:08:15:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
08:08:15:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
08:08:15:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:08:15:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:08:15:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
08:08:15:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
08:08:15:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:08:15:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:08:15:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
08:08:15:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
08:08:16:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:08:16:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:08:17:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 26
Window Length: 73
Eye Windows:
Uplink 0: _________________________________________________________________XXX____________
Uplink 1: _________________________________________________________________XXX____________
Uplink 2: __________________________________________________________________XXXX__________
Uplink 3: __________________________________________________________________XXXX__________
Uplink 4: __________________________________________________________________XXX___________
Uplink 5: __________________________________________________________________XXX___________
Uplink 6: __________________________________________________________________XXXX__________
Uplink 7: __________________________________________________________________XXXX__________
Uplink 8: _______________________________________________________________XXXXX____________
Uplink 9: _______________________________________________________________XXXXX____________
Uplink 10: _______________________________________________________________XXXXX____________
Uplink 11: _______________________________________________________________XXXXX____________
Uplink 12: _________________________________________________________________XXXXX__________
Uplink 13: _________________________________________________________________XXXXX__________
Uplink 14: ________________________________________________________________XXXXXX__________
Uplink 15: ________________________________________________________________XXXXXX__________
Data phase characteristics:
Uplink 0:
Optimal Phase: 14
Window Length: 33
Eye Window: _______________________________XXXXXXX__
Uplink 1:
Optimal Phase: 9
Window Length: 32
Eye Window: __________________________XXXXXXXX______
Uplink 2:
Optimal Phase: 16
Window Length: 33
Eye Window: _________________________________XXXXXXX
Uplink 3:
Optimal Phase: 11
Window Length: 32
Eye Window: ____________________________XXXXXXXX____
Uplink 4:
Optimal Phase: 9
Window Length: 33
Eye Window: __________________________XXXXXXX_______
Uplink 5:
Optimal Phase: 5
Window Length: 33
Eye Window: ______________________XXXXXXX___________
Uplink 6:
Optimal Phase: 4
Window Length: 33
Eye Window: _____________________XXXXXXX____________
Uplink 7:
Optimal Phase: 0
Window Length: 33
Eye Window: _________________XXXXXXX________________
Uplink 8:
Optimal Phase: 30
Window Length: 31
Eye Window: ______XXXXXXXXX_________________________
Uplink 9:
Optimal Phase: 35
Window Length: 33
Eye Window: ____________XXXXXXX_____________________
Uplink 10:
Optimal Phase: 29
Window Length: 30
Eye Window: _____XXXXXXXXXX_________________________
Uplink 11:
Optimal Phase: 33
Window Length: 31
Eye Window: _________XXXXXXXXX______________________
Uplink 12:
Optimal Phase: 34
Window Length: 33
Eye Window: ___________XXXXXXX______________________
Uplink 13:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 14:
Optimal Phase: 33
Window Length: 33
Eye Window: __________XXXXXXX_______________________
Uplink 15:
Optimal Phase: 35
Window Length: 32
Eye Window: ____________XXXXXXXX____________________
08:08:17:setup_element:INFO: Performing Elink synchronization
08:08:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:08:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:08:17:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:08:17:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:08:17:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
08:08:17:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:08:17:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
FEB type: A FEB_A: 1 FEB_B: 0
08:08:19:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:08:19:febtest:INFO: 01-00 | XA-000-08-003-000-001-100-02 | -249.4 | 1578.5
08:08:19:febtest:INFO: 08-01 | XA-000-08-003-000-001-104-02 | -228.7 | 1578.5
08:08:19:febtest:INFO: 03-02 | XA-000-08-003-000-001-105-02 | -240.5 | 1578.5
08:08:19:febtest:INFO: 10-03 | XA-000-08-003-000-001-099-02 | -231.7 | 1578.5
08:08:20:febtest:INFO: 05-04 | XA-000-08-003-000-001-110-02 | -225.8 | 1578.5
08:08:20:febtest:INFO: 12-05 | XA-000-08-003-000-001-108-02 | -246.4 | 1578.5
08:08:20:febtest:INFO: 07-06 | XA-000-08-003-000-001-109-02 | -237.6 | 1578.5
08:08:20:febtest:INFO: 14-07 | XA-000-08-003-000-001-103-02 | -199.1 | 1578.5
08:08:21:ST3_smx:INFO: Configuring SMX FAST
08:08:23:ST3_smx:INFO: chip: 1-0 -255.234118 C 1578.532875 mV
08:08:23:ST3_smx:INFO: Electrons
08:08:23:ST3_smx:INFO: # loops 0
08:08:25:ST3_smx:INFO: # loops 1
08:08:26:ST3_smx:INFO: # loops 2
08:08:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:28:ST3_smx:INFO: Total # of broken channels: 128
08:08:28:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
08:08:28:ST3_smx:INFO: Total # of broken channels: 128
08:08:28:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
08:08:29:ST3_smx:INFO: Configuring SMX FAST
08:08:31:ST3_smx:INFO: chip: 8-1 -234.646470 C 1578.532875 mV
08:08:31:ST3_smx:INFO: Electrons
08:08:31:ST3_smx:INFO: # loops 0
08:08:32:ST3_smx:INFO: # loops 1
08:08:34:ST3_smx:INFO: # loops 2
08:08:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:35:ST3_smx:INFO: Total # of broken channels: 128
08:08:35:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
08:08:35:ST3_smx:INFO: Total # of broken channels: 128
08:08:35:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
08:08:36:ST3_smx:INFO: Configuring SMX FAST
08:08:38:ST3_smx:INFO: chip: 3-2 -261.093938 C 1578.532875 mV
08:08:38:ST3_smx:INFO: Electrons
08:08:38:ST3_smx:INFO: # loops 0
08:08:39:ST3_smx:INFO: # loops 1
08:08:41:ST3_smx:INFO: # loops 2
08:08:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:43:ST3_smx:INFO: Total # of broken channels: 128
08:08:43:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
08:08:43:ST3_smx:INFO: Total # of broken channels: 128
08:08:43:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
08:08:43:ST3_smx:INFO: Configuring SMX FAST
08:08:46:ST3_smx:INFO: chip: 10-3 -264.020120 C 1578.532875 mV
08:08:46:ST3_smx:INFO: Electrons
08:08:46:ST3_smx:INFO: # loops 0
08:08:47:ST3_smx:INFO: # loops 1
08:08:49:ST3_smx:INFO: # loops 2
08:08:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:50:ST3_smx:INFO: Total # of broken channels: 128
08:08:50:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
08:08:50:ST3_smx:INFO: Total # of broken channels: 128
08:08:50:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
08:08:51:ST3_smx:INFO: Configuring SMX FAST
08:08:53:ST3_smx:INFO: chip: 5-4 -261.093938 C 1578.532875 mV
08:08:53:ST3_smx:INFO: Electrons
08:08:53:ST3_smx:INFO: # loops 0
08:08:54:ST3_smx:INFO: # loops 1
08:08:56:ST3_smx:INFO: # loops 2
Traceback (most recent call last):
File "febtest.py", line 504, in DoFEB_SensorTest
self.EMU.mysmx[i].MicroCableTest('e')
File "/home/cbm/ST3_v2.29.16/lib/ST3_smx.py", line 590, in MicroCableTest
val = self.smx.read(ch, (2*d))&0xFFF
File "/home/cbm/ST3_BASE/smx_software_FEB8_2_20MHz/python/smx_tester/smx.py", line 39, in read
return self.ack_monitor.check_read()
File "/home/cbm/ST3_BASE/smx_software_FEB8_2_20MHz/python/hctsp/ack_monitor.py", line 88, in check_read
return self._check(self._check_read, timeout)
File "/home/cbm/ST3_BASE/smx_software_FEB8_2_20MHz/python/hctsp/ack_monitor.py", line 55, in _check
return check_function()
File "/home/cbm/ST3_BASE/smx_software_FEB8_2_20MHz/python/hctsp/ack_monitor.py", line 94, in _check_read
frame = self._parse_frame(frame)
File "/home/cbm/ST3_BASE/smx_software_FEB8_2_20MHz/python/hctsp/ack_monitor.py", line 116, in _parse_frame
raise AckMissed()
hctsp.ack_monitor.AckMissed: At least one Ack frame missed