FEB_3018 06.05.24 13:48:10
Info
13:48:10:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:48:10:ST3_Shared:INFO: FEB-Microcable
13:48:10:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:48:11:febtest:INFO: Testing FEB with SN 3018
13:48:13:smx_tester:INFO: Scanning setup
13:48:13:elinks:INFO: Disabling clock on downlink 0
13:48:13:elinks:INFO: Disabling clock on downlink 1
13:48:13:elinks:INFO: Disabling clock on downlink 2
13:48:13:elinks:INFO: Disabling clock on downlink 3
13:48:13:elinks:INFO: Disabling clock on downlink 4
13:48:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:48:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:48:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:48:13:elinks:INFO: Disabling clock on downlink 0
13:48:13:elinks:INFO: Disabling clock on downlink 1
13:48:13:elinks:INFO: Disabling clock on downlink 2
13:48:13:elinks:INFO: Disabling clock on downlink 3
13:48:13:elinks:INFO: Disabling clock on downlink 4
13:48:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:48:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:48:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
13:48:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
13:48:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
13:48:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
13:48:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
13:48:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
13:48:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
13:48:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
13:48:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
13:48:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
13:48:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:48:13:elinks:INFO: Disabling clock on downlink 0
13:48:13:elinks:INFO: Disabling clock on downlink 1
13:48:13:elinks:INFO: Disabling clock on downlink 2
13:48:13:elinks:INFO: Disabling clock on downlink 3
13:48:13:elinks:INFO: Disabling clock on downlink 4
13:48:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:48:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:48:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:48:14:elinks:INFO: Disabling clock on downlink 0
13:48:14:elinks:INFO: Disabling clock on downlink 1
13:48:14:elinks:INFO: Disabling clock on downlink 2
13:48:14:elinks:INFO: Disabling clock on downlink 3
13:48:14:elinks:INFO: Disabling clock on downlink 4
13:48:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:48:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:48:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:48:14:elinks:INFO: Disabling clock on downlink 0
13:48:14:elinks:INFO: Disabling clock on downlink 1
13:48:14:elinks:INFO: Disabling clock on downlink 2
13:48:14:elinks:INFO: Disabling clock on downlink 3
13:48:14:elinks:INFO: Disabling clock on downlink 4
13:48:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:48:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:48:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:48:14:setup_element:INFO: Scanning clock phase
13:48:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:48:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:48:14:setup_element:INFO: Clock phase scan results for group 0, downlink 1
13:48:14:setup_element:INFO: Eye window for uplink 6 : __________________________________________________________________________XXXXX_
Clock Delay: 36
13:48:14:setup_element:INFO: Eye window for uplink 7 : __________________________________________________________________________XXXXX_
Clock Delay: 36
13:48:14:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:48:14:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:48:14:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________________XXXXX____
Clock Delay: 33
13:48:14:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________________XXXXX____
Clock Delay: 33
13:48:14:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________XXXXXX__
Clock Delay: 34
13:48:14:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________XXXXXX__
Clock Delay: 34
13:48:14:setup_element:INFO: Eye window for uplink 14: _________________________________________________________________________XXXXX__
Clock Delay: 35
13:48:14:setup_element:INFO: Eye window for uplink 15: _________________________________________________________________________XXXXX__
Clock Delay: 35
13:48:14:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1
13:48:14:setup_element:INFO: Scanning data phases
13:48:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:48:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:48:19:setup_element:INFO: Data phase scan results for group 0, downlink 1
13:48:19:setup_element:INFO: Eye window for uplink 6 : __________________________________XXXXX_
Data delay found: 16
13:48:19:setup_element:INFO: Eye window for uplink 7 : _______________________________XXXX_____
Data delay found: 12
13:48:19:setup_element:INFO: Eye window for uplink 8 : _________________XXXXXXX________________
Data delay found: 0
13:48:19:setup_element:INFO: Eye window for uplink 9 : _______________________XXXXX____________
Data delay found: 5
13:48:19:setup_element:INFO: Eye window for uplink 10: ___________________XXXXXX_______________
Data delay found: 1
13:48:19:setup_element:INFO: Eye window for uplink 11: ________________________XXXXX___________
Data delay found: 6
13:48:19:setup_element:INFO: Eye window for uplink 12: ______________________XXXXX_____________
Data delay found: 4
13:48:19:setup_element:INFO: Eye window for uplink 13: _________________________XXXXX__________
Data delay found: 7
13:48:19:setup_element:INFO: Eye window for uplink 14: _______________________XXXXX____________
Data delay found: 5
13:48:19:setup_element:INFO: Eye window for uplink 15: _________________________XXXXX__________
Data delay found: 7
13:48:19:setup_element:INFO: Setting the data phase to 16 for uplink 6
13:48:19:setup_element:INFO: Setting the data phase to 12 for uplink 7
13:48:19:setup_element:INFO: Setting the data phase to 0 for uplink 8
13:48:19:setup_element:INFO: Setting the data phase to 5 for uplink 9
13:48:19:setup_element:INFO: Setting the data phase to 1 for uplink 10
13:48:19:setup_element:INFO: Setting the data phase to 6 for uplink 11
13:48:19:setup_element:INFO: Setting the data phase to 4 for uplink 12
13:48:19:setup_element:INFO: Setting the data phase to 7 for uplink 13
13:48:19:setup_element:INFO: Setting the data phase to 5 for uplink 14
13:48:19:setup_element:INFO: Setting the data phase to 7 for uplink 15
13:48:19:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 72
Eye Windows:
Uplink 6: __________________________________________________________________________XXXXX_
Uplink 7: __________________________________________________________________________XXXXX_
Uplink 8: _______________________________________________________________________XXXXXX___
Uplink 9: _______________________________________________________________________XXXXXX___
Uplink 10: _______________________________________________________________________XXXXX____
Uplink 11: _______________________________________________________________________XXXXX____
Uplink 12: ________________________________________________________________________XXXXXX__
Uplink 13: ________________________________________________________________________XXXXXX__
Uplink 14: _________________________________________________________________________XXXXX__
Uplink 15: _________________________________________________________________________XXXXX__
Data phase characteristics:
Uplink 6:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 7:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
Uplink 8:
Optimal Phase: 0
Window Length: 33
Eye Window: _________________XXXXXXX________________
Uplink 9:
Optimal Phase: 5
Window Length: 35
Eye Window: _______________________XXXXX____________
Uplink 10:
Optimal Phase: 1
Window Length: 34
Eye Window: ___________________XXXXXX_______________
Uplink 11:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 12:
Optimal Phase: 4
Window Length: 35
Eye Window: ______________________XXXXX_____________
Uplink 13:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 14:
Optimal Phase: 5
Window Length: 35
Eye Window: _______________________XXXXX____________
Uplink 15:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
]
13:48:19:setup_element:INFO: Beginning SMX ASICs map scan
13:48:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:48:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:48:19:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:48:19:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:48:19:uplink:INFO: Setting uplinks mask [6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:48:20:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:48:20:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:48:20:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:48:20:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:48:20:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:48:20:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:48:20:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:48:20:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:48:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:48:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:48:22:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 72
Eye Windows:
Uplink 6: __________________________________________________________________________XXXXX_
Uplink 7: __________________________________________________________________________XXXXX_
Uplink 8: _______________________________________________________________________XXXXXX___
Uplink 9: _______________________________________________________________________XXXXXX___
Uplink 10: _______________________________________________________________________XXXXX____
Uplink 11: _______________________________________________________________________XXXXX____
Uplink 12: ________________________________________________________________________XXXXXX__
Uplink 13: ________________________________________________________________________XXXXXX__
Uplink 14: _________________________________________________________________________XXXXX__
Uplink 15: _________________________________________________________________________XXXXX__
Data phase characteristics:
Uplink 6:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 7:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
Uplink 8:
Optimal Phase: 0
Window Length: 33
Eye Window: _________________XXXXXXX________________
Uplink 9:
Optimal Phase: 5
Window Length: 35
Eye Window: _______________________XXXXX____________
Uplink 10:
Optimal Phase: 1
Window Length: 34
Eye Window: ___________________XXXXXX_______________
Uplink 11:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 12:
Optimal Phase: 4
Window Length: 35
Eye Window: ______________________XXXXX_____________
Uplink 13:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 14:
Optimal Phase: 5
Window Length: 35
Eye Window: _______________________XXXXX____________
Uplink 15:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
13:48:22:setup_element:INFO: Performing Elink synchronization
13:48:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:48:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:48:22:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:48:22:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:48:22:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
13:48:22:uplink:INFO: Enabling uplinks [6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:48:22:ST3_emu:INFO: Number of chips: 5
addr | upli | dwnli | grp | uplinks | uplinks_map
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_8 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_1__upli_8
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_10 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_3__upli_10
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_12 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_5__upli_12
FEB type: A FEB_A: 1 FEB_B: 0
13:48:23:febtest:ERROR: HW addres 1 != 0
13:48:28:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:48:28:febtest:INFO: 08-01 | XA-000-08-003-000-001-186-10 | 9.3 | 1294.5
13:48:29:febtest:INFO: 10-03 | XA-000-08-003-000-001-190-10 | 25.1 | 1247.9
13:48:29:febtest:INFO: 12-05 | XA-000-08-003-000-001-195-06 | 37.7 | 1206.9
13:48:29:febtest:INFO: 07-06 | XA-000-08-003-000-001-193-06 | 37.7 | 1189.2
13:48:29:febtest:INFO: 14-07 | XA-000-08-003-000-001-187-10 | 18.7 | 1271.2
13:48:29:ST3_smx:INFO: Configuring SMX FAST
13:48:32:ST3_smx:INFO: chip: 8-1 15.590880 C 1277.050060 mV
13:48:32:ST3_smx:INFO: Electrons
13:48:32:ST3_smx:INFO: # loops 0
13:48:33:ST3_smx:INFO: # loops 1
13:48:35:ST3_smx:INFO: # loops 2
13:48:37:ST3_smx:INFO: Total # of broken channels: 0
13:48:37:ST3_smx:INFO: List of broken channels: []
13:48:37:ST3_smx:INFO: Total # of broken channels: 0
13:48:37:ST3_smx:INFO: List of broken channels: []
13:48:38:ST3_smx:INFO: Configuring SMX FAST
13:48:39:ST3_smx:INFO: chip: 10-3 25.062742 C 1253.730060 mV
13:48:39:ST3_smx:INFO: Electrons
13:48:40:ST3_smx:INFO: # loops 0
13:48:41:ST3_smx:INFO: # loops 1
13:48:43:ST3_smx:INFO: # loops 2
13:48:44:ST3_smx:INFO: Total # of broken channels: 0
13:48:44:ST3_smx:INFO: List of broken channels: []
13:48:44:ST3_smx:INFO: Total # of broken channels: 0
13:48:44:ST3_smx:INFO: List of broken channels: []
13:48:45:ST3_smx:INFO: Configuring SMX FAST
13:48:47:ST3_smx:INFO: chip: 12-5 37.726682 C 1206.851500 mV
13:48:47:ST3_smx:INFO: Electrons
13:48:47:ST3_smx:INFO: # loops 0
13:48:49:ST3_smx:INFO: # loops 1
13:48:50:ST3_smx:INFO: # loops 2
13:48:52:ST3_smx:INFO: Total # of broken channels: 0
13:48:52:ST3_smx:INFO: List of broken channels: []
13:48:52:ST3_smx:INFO: Total # of broken channels: 0
13:48:52:ST3_smx:INFO: List of broken channels: []
13:48:53:ST3_smx:INFO: Configuring SMX FAST
13:48:55:ST3_smx:INFO: chip: 7-6 37.726682 C 1195.082160 mV
13:48:55:ST3_smx:INFO: Electrons
13:48:55:ST3_smx:INFO: # loops 0
13:48:57:ST3_smx:INFO: # loops 1
13:48:59:ST3_smx:INFO: # loops 2
13:49:00:ST3_smx:INFO: Total # of broken channels: 0
13:49:00:ST3_smx:INFO: List of broken channels: []
13:49:00:ST3_smx:INFO: Total # of broken channels: 0
13:49:00:ST3_smx:INFO: List of broken channels: []
13:49:01:ST3_smx:INFO: Configuring SMX FAST
13:49:03:ST3_smx:INFO: chip: 14-7 21.902970 C 1265.400000 mV
13:49:03:ST3_smx:INFO: Electrons
13:49:03:ST3_smx:INFO: # loops 0
13:49:05:ST3_smx:INFO: # loops 1
13:49:06:ST3_smx:INFO: # loops 2
13:49:08:ST3_smx:INFO: Total # of broken channels: 0
13:49:08:ST3_smx:INFO: List of broken channels: []
13:49:08:ST3_smx:INFO: Total # of broken channels: 0
13:49:08:ST3_smx:INFO: List of broken channels: []
13:49:09:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:49:09:febtest:INFO: 08-01 | XA-000-08-003-000-001-186-10 | 15.6 | 1277.1
13:49:09:febtest:INFO: 10-03 | XA-000-08-003-000-001-190-10 | 25.1 | 1253.7
13:49:09:febtest:INFO: 12-05 | XA-000-08-003-000-001-195-06 | 37.7 | 1212.7
13:49:10:febtest:INFO: 07-06 | XA-000-08-003-000-001-193-06 | 37.7 | 1195.1
13:49:10:febtest:INFO: 14-07 | XA-000-08-003-000-001-187-10 | 25.1 | 1265.4
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_05_06-13_48_10
OPERATOR : Benjamin;
SITE : KIT
SETUP : KIT_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME :
FEB_SN : 3018
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.200', '1.2000', '2.800', '1.2820', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.200', '1.1860', '2.800', '0.4830', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.200', '1.1840', '2.800', '0.2089', '0.000', '0.0000', '0.000', '0.0000']