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FEB_3018 14.05.24 07:47:56
Info
07:47:56:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:47:56:ST3_Shared:INFO: FEB-Microcable
07:47:56:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:47:56:febtest:INFO: Testing FEB with SN 3018
07:47:59:smx_tester:INFO: Scanning setup
07:47:59:elinks:INFO: Disabling clock on downlink 0
07:47:59:elinks:INFO: Disabling clock on downlink 1
07:47:59:elinks:INFO: Disabling clock on downlink 2
07:47:59:elinks:INFO: Disabling clock on downlink 3
07:47:59:elinks:INFO: Disabling clock on downlink 4
07:47:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:47:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:47:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:47:59:elinks:INFO: Disabling clock on downlink 0
07:47:59:elinks:INFO: Disabling clock on downlink 1
07:47:59:elinks:INFO: Disabling clock on downlink 2
07:47:59:elinks:INFO: Disabling clock on downlink 3
07:47:59:elinks:INFO: Disabling clock on downlink 4
07:47:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:47:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:47:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
07:47:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
07:47:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
07:47:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
07:47:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
07:47:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
07:47:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
07:47:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
07:47:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
07:47:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
07:47:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
07:47:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
07:47:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
07:47:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
07:47:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
07:47:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
07:47:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:47:59:elinks:INFO: Disabling clock on downlink 0
07:47:59:elinks:INFO: Disabling clock on downlink 1
07:47:59:elinks:INFO: Disabling clock on downlink 2
07:47:59:elinks:INFO: Disabling clock on downlink 3
07:47:59:elinks:INFO: Disabling clock on downlink 4
07:47:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:47:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:48:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:48:00:elinks:INFO: Disabling clock on downlink 0
07:48:00:elinks:INFO: Disabling clock on downlink 1
07:48:00:elinks:INFO: Disabling clock on downlink 2
07:48:00:elinks:INFO: Disabling clock on downlink 3
07:48:00:elinks:INFO: Disabling clock on downlink 4
07:48:00:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:48:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
07:48:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:48:00:elinks:INFO: Disabling clock on downlink 0
07:48:00:elinks:INFO: Disabling clock on downlink 1
07:48:00:elinks:INFO: Disabling clock on downlink 2
07:48:00:elinks:INFO: Disabling clock on downlink 3
07:48:00:elinks:INFO: Disabling clock on downlink 4
07:48:00:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:48:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
07:48:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:48:00:setup_element:INFO: Scanning clock phase
07:48:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:48:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:48:00:setup_element:INFO: Clock phase scan results for group 0, downlink 1
07:48:00:setup_element:INFO: Eye window for uplink 0 : X___________________________________________________________________________XXXX
Clock Delay: 38
07:48:00:setup_element:INFO: Eye window for uplink 1 : X___________________________________________________________________________XXXX
Clock Delay: 38
07:48:00:setup_element:INFO: Eye window for uplink 2 : X___________________________________________________________________________XXXX
Clock Delay: 38
07:48:00:setup_element:INFO: Eye window for uplink 3 : X___________________________________________________________________________XXXX
Clock Delay: 38
07:48:00:setup_element:INFO: Eye window for uplink 4 : ___________________________________________________________________________XXXXX
Clock Delay: 37
07:48:00:setup_element:INFO: Eye window for uplink 5 : ___________________________________________________________________________XXXXX
Clock Delay: 37
07:48:00:setup_element:INFO: Eye window for uplink 6 : ____________________________________________________________________________XXXX
Clock Delay: 37
07:48:00:setup_element:INFO: Eye window for uplink 7 : ____________________________________________________________________________XXXX
Clock Delay: 37
07:48:00:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:48:00:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:48:00:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:48:00:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:48:00:setup_element:INFO: Eye window for uplink 12: __________________________________________________________________________XXXXX_
Clock Delay: 36
07:48:00:setup_element:INFO: Eye window for uplink 13: __________________________________________________________________________XXXXX_
Clock Delay: 36
07:48:00:setup_element:INFO: Eye window for uplink 14: ___________________________________________________________________________XXXXX
Clock Delay: 37
07:48:00:setup_element:INFO: Eye window for uplink 15: ___________________________________________________________________________XXXXX
Clock Delay: 37
07:48:00:setup_element:INFO: Setting the clock phase to 36 for group 0, downlink 1
07:48:00:setup_element:INFO: Scanning data phases
07:48:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:48:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:48:05:setup_element:INFO: Data phase scan results for group 0, downlink 1
07:48:05:setup_element:INFO: Eye window for uplink 0 : _________XXXXXXXXXXXXXXXXXXXXXXXXXXXXX__
Data delay found: 3
07:48:05:setup_element:INFO: Eye window for uplink 1 : ____XXXXX_XXXXXXXXXXXXXXXXXXXXXXXXXXXX__
Data delay found: 0
07:48:05:setup_element:INFO: Eye window for uplink 2 : ____XXXXX_______________________________
Data delay found: 26
07:48:05:setup_element:INFO: Eye window for uplink 3 : XXXXX___________________________________
Data delay found: 22
07:48:05:setup_element:INFO: Eye window for uplink 4 : XXXXXX__________________________________
Data delay found: 22
07:48:05:setup_element:INFO: Eye window for uplink 5 : X____________________________________XXX
Data delay found: 18
07:48:05:setup_element:INFO: Eye window for uplink 6 : __________________________________XXXXX_
Data delay found: 16
07:48:05:setup_element:INFO: Eye window for uplink 7 : _______________________________XXXX_____
Data delay found: 12
07:48:05:setup_element:INFO: Eye window for uplink 8 : __________________XXXXXX________________
Data delay found: 0
07:48:05:setup_element:INFO: Eye window for uplink 9 : ________________________XXXXX___________
Data delay found: 6
07:48:05:setup_element:INFO: Eye window for uplink 10: ___________________XXXXXXX______________
Data delay found: 2
07:48:05:setup_element:INFO: Eye window for uplink 11: ________________________XXXXX___________
Data delay found: 6
07:48:05:setup_element:INFO: Eye window for uplink 12: _______________________XXXXX____________
Data delay found: 5
07:48:05:setup_element:INFO: Eye window for uplink 13: ___________________________XXXX_________
Data delay found: 8
07:48:05:setup_element:INFO: Eye window for uplink 14: _______________________XXXXX____________
Data delay found: 5
07:48:05:setup_element:INFO: Eye window for uplink 15: __________________________XXXXX_________
Data delay found: 8
07:48:05:setup_element:INFO: Setting the data phase to 3 for uplink 0
07:48:05:setup_element:INFO: Setting the data phase to 0 for uplink 1
07:48:05:setup_element:INFO: Setting the data phase to 26 for uplink 2
07:48:05:setup_element:INFO: Setting the data phase to 22 for uplink 3
07:48:05:setup_element:INFO: Setting the data phase to 22 for uplink 4
07:48:05:setup_element:INFO: Setting the data phase to 18 for uplink 5
07:48:05:setup_element:INFO: Setting the data phase to 16 for uplink 6
07:48:05:setup_element:INFO: Setting the data phase to 12 for uplink 7
07:48:05:setup_element:INFO: Setting the data phase to 0 for uplink 8
07:48:05:setup_element:INFO: Setting the data phase to 6 for uplink 9
07:48:05:setup_element:INFO: Setting the data phase to 2 for uplink 10
07:48:05:setup_element:INFO: Setting the data phase to 6 for uplink 11
07:48:05:setup_element:INFO: Setting the data phase to 5 for uplink 12
07:48:05:setup_element:INFO: Setting the data phase to 8 for uplink 13
07:48:05:setup_element:INFO: Setting the data phase to 5 for uplink 14
07:48:05:setup_element:INFO: Setting the data phase to 8 for uplink 15
07:48:05:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 36
Window Length: 71
Eye Windows:
Uplink 0: X___________________________________________________________________________XXXX
Uplink 1: X___________________________________________________________________________XXXX
Uplink 2: X___________________________________________________________________________XXXX
Uplink 3: X___________________________________________________________________________XXXX
Uplink 4: ___________________________________________________________________________XXXXX
Uplink 5: ___________________________________________________________________________XXXXX
Uplink 6: ____________________________________________________________________________XXXX
Uplink 7: ____________________________________________________________________________XXXX
Uplink 8: ________________________________________________________________________XXXXXX__
Uplink 9: ________________________________________________________________________XXXXXX__
Uplink 10: ________________________________________________________________________XXXXXX__
Uplink 11: ________________________________________________________________________XXXXXX__
Uplink 12: __________________________________________________________________________XXXXX_
Uplink 13: __________________________________________________________________________XXXXX_
Uplink 14: ___________________________________________________________________________XXXXX
Uplink 15: ___________________________________________________________________________XXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 3
Window Length: 11
Eye Window: _________XXXXXXXXXXXXXXXXXXXXXXXXXXXXX__
Uplink 1:
Optimal Phase: 0
Window Length: 6
Eye Window: ____XXXXX_XXXXXXXXXXXXXXXXXXXXXXXXXXXX__
Uplink 2:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 3:
Optimal Phase: 22
Window Length: 35
Eye Window: XXXXX___________________________________
Uplink 4:
Optimal Phase: 22
Window Length: 34
Eye Window: XXXXXX__________________________________
Uplink 5:
Optimal Phase: 18
Window Length: 36
Eye Window: X____________________________________XXX
Uplink 6:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 7:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
Uplink 8:
Optimal Phase: 0
Window Length: 34
Eye Window: __________________XXXXXX________________
Uplink 9:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 10:
Optimal Phase: 2
Window Length: 33
Eye Window: ___________________XXXXXXX______________
Uplink 11:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 12:
Optimal Phase: 5
Window Length: 35
Eye Window: _______________________XXXXX____________
Uplink 13:
Optimal Phase: 8
Window Length: 36
Eye Window: ___________________________XXXX_________
Uplink 14:
Optimal Phase: 5
Window Length: 35
Eye Window: _______________________XXXXX____________
Uplink 15:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
]
07:48:05:setup_element:INFO: Beginning SMX ASICs map scan
07:48:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:48:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:48:06:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
07:48:06:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
07:48:06:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
07:48:06:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
07:48:06:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
07:48:06:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
07:48:06:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
07:48:06:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
07:48:06:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
07:48:06:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
07:48:06:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
07:48:06:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
07:48:06:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
07:48:06:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
07:48:07:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
07:48:07:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
07:48:07:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
07:48:07:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
07:48:07:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
07:48:08:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 36
Window Length: 71
Eye Windows:
Uplink 0: X___________________________________________________________________________XXXX
Uplink 1: X___________________________________________________________________________XXXX
Uplink 2: X___________________________________________________________________________XXXX
Uplink 3: X___________________________________________________________________________XXXX
Uplink 4: ___________________________________________________________________________XXXXX
Uplink 5: ___________________________________________________________________________XXXXX
Uplink 6: ____________________________________________________________________________XXXX
Uplink 7: ____________________________________________________________________________XXXX
Uplink 8: ________________________________________________________________________XXXXXX__
Uplink 9: ________________________________________________________________________XXXXXX__
Uplink 10: ________________________________________________________________________XXXXXX__
Uplink 11: ________________________________________________________________________XXXXXX__
Uplink 12: __________________________________________________________________________XXXXX_
Uplink 13: __________________________________________________________________________XXXXX_
Uplink 14: ___________________________________________________________________________XXXXX
Uplink 15: ___________________________________________________________________________XXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 3
Window Length: 11
Eye Window: _________XXXXXXXXXXXXXXXXXXXXXXXXXXXXX__
Uplink 1:
Optimal Phase: 0
Window Length: 6
Eye Window: ____XXXXX_XXXXXXXXXXXXXXXXXXXXXXXXXXXX__
Uplink 2:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 3:
Optimal Phase: 22
Window Length: 35
Eye Window: XXXXX___________________________________
Uplink 4:
Optimal Phase: 22
Window Length: 34
Eye Window: XXXXXX__________________________________
Uplink 5:
Optimal Phase: 18
Window Length: 36
Eye Window: X____________________________________XXX
Uplink 6:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 7:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
Uplink 8:
Optimal Phase: 0
Window Length: 34
Eye Window: __________________XXXXXX________________
Uplink 9:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 10:
Optimal Phase: 2
Window Length: 33
Eye Window: ___________________XXXXXXX______________
Uplink 11:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 12:
Optimal Phase: 5
Window Length: 35
Eye Window: _______________________XXXXX____________
Uplink 13:
Optimal Phase: 8
Window Length: 36
Eye Window: ___________________________XXXX_________
Uplink 14:
Optimal Phase: 5
Window Length: 35
Eye Window: _______________________XXXXX____________
Uplink 15:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
07:48:08:setup_element:INFO: Performing Elink synchronization
07:48:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:48:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:48:08:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
07:48:08:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
07:48:08:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
07:48:08:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
07:48:08:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
FEB type: A FEB_A: 1 FEB_B: 0
07:48:10:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:48:10:febtest:INFO: 01-00 | XA-000-08-003-000-001-192-06 | 47.3 | 1147.8
07:48:10:febtest:INFO: 08-01 | XA-000-08-003-000-001-186-10 | 21.9 | 1236.2
07:48:11:febtest:INFO: 03-02 | XA-000-08-003-000-001-185-10 | 28.2 | 1212.7
07:48:11:febtest:INFO: 10-03 | XA-000-08-003-000-001-190-10 | 34.6 | 1201.0
07:48:11:febtest:INFO: 05-04 | XA-000-08-003-000-001-189-10 | 37.7 | 1189.2
07:48:11:febtest:INFO: 12-05 | XA-000-08-003-000-001-195-06 | 47.3 | 1165.6
07:48:12:febtest:INFO: 07-06 | XA-000-08-003-000-001-193-06 | 47.3 | 1141.9
07:48:12:febtest:INFO: 14-07 | XA-000-08-003-000-001-187-10 | 28.2 | 1224.5
07:48:12:ST3_smx:INFO: Configuring SMX FAST
07:48:14:ST3_smx:INFO: chip: 1-0 44.073563 C 1165.571835 mV
07:48:14:ST3_smx:INFO: Electrons
07:48:14:ST3_smx:INFO: # loops 0
07:48:16:ST3_smx:INFO: # loops 1
07:48:18:ST3_smx:INFO: # loops 2
07:48:20:ST3_smx:INFO: Total # of broken channels: 0
07:48:20:ST3_smx:INFO: List of broken channels: []
07:48:20:ST3_smx:INFO: Total # of broken channels: 0
07:48:20:ST3_smx:INFO: List of broken channels: []
07:48:22:ST3_smx:INFO: Configuring SMX FAST
07:48:24:ST3_smx:INFO: chip: 8-1 28.225000 C 1224.468235 mV
07:48:24:ST3_smx:INFO: Electrons
07:48:24:ST3_smx:INFO: # loops 0
07:48:26:ST3_smx:INFO: # loops 1
07:48:28:ST3_smx:INFO: # loops 2
07:48:30:ST3_smx:INFO: Total # of broken channels: 0
07:48:30:ST3_smx:INFO: List of broken channels: []
07:48:30:ST3_smx:INFO: Total # of broken channels: 0
07:48:30:ST3_smx:INFO: List of broken channels: []
07:48:31:ST3_smx:INFO: Configuring SMX FAST
07:48:33:ST3_smx:INFO: chip: 3-2 40.898880 C 1171.483840 mV
07:48:33:ST3_smx:INFO: Electrons
07:48:33:ST3_smx:INFO: # loops 0
07:48:35:ST3_smx:INFO: # loops 1
07:48:37:ST3_smx:INFO: # loops 2
07:48:39:ST3_smx:INFO: Total # of broken channels: 0
07:48:39:ST3_smx:INFO: List of broken channels: []
07:48:39:ST3_smx:INFO: Total # of broken channels: 0
07:48:39:ST3_smx:INFO: List of broken channels: []
07:48:40:ST3_smx:INFO: Configuring SMX FAST
07:48:42:ST3_smx:INFO: chip: 10-3 34.556970 C 1206.851500 mV
07:48:43:ST3_smx:INFO: Electrons
07:48:43:ST3_smx:INFO: # loops 0
07:48:44:ST3_smx:INFO: # loops 1
07:48:46:ST3_smx:INFO: # loops 2
07:48:48:ST3_smx:INFO: Total # of broken channels: 0
07:48:48:ST3_smx:INFO: List of broken channels: []
07:48:48:ST3_smx:INFO: Total # of broken channels: 0
07:48:48:ST3_smx:INFO: List of broken channels: []
07:48:49:ST3_smx:INFO: Configuring SMX FAST
07:48:51:ST3_smx:INFO: chip: 5-4 34.556970 C 1200.969315 mV
07:48:51:ST3_smx:INFO: Electrons
07:48:51:ST3_smx:INFO: # loops 0
07:48:54:ST3_smx:INFO: # loops 1
07:48:55:ST3_smx:INFO: # loops 2
07:48:58:ST3_smx:INFO: Total # of broken channels: 0
07:48:58:ST3_smx:INFO: List of broken channels: []
07:48:58:ST3_smx:INFO: Total # of broken channels: 0
07:48:58:ST3_smx:INFO: List of broken channels: []
07:48:59:ST3_smx:INFO: Configuring SMX FAST
07:49:01:ST3_smx:INFO: chip: 12-5 50.430383 C 1165.571835 mV
07:49:01:ST3_smx:INFO: Electrons
07:49:01:ST3_smx:INFO: # loops 0
07:49:03:ST3_smx:INFO: # loops 1
07:49:06:ST3_smx:INFO: # loops 2
07:49:08:ST3_smx:INFO: Total # of broken channels: 0
07:49:08:ST3_smx:INFO: List of broken channels: []
07:49:08:ST3_smx:INFO: Total # of broken channels: 0
07:49:08:ST3_smx:INFO: List of broken channels: []
07:49:08:ST3_smx:INFO: Configuring SMX FAST
07:49:11:ST3_smx:INFO: chip: 7-6 47.250730 C 1153.732915 mV
07:49:11:ST3_smx:INFO: Electrons
07:49:11:ST3_smx:INFO: # loops 0
07:49:13:ST3_smx:INFO: # loops 1
07:49:15:ST3_smx:INFO: # loops 2
07:49:17:ST3_smx:INFO: Total # of broken channels: 0
07:49:17:ST3_smx:INFO: List of broken channels: []
07:49:17:ST3_smx:INFO: Total # of broken channels: 0
07:49:17:ST3_smx:INFO: List of broken channels: []
07:49:18:ST3_smx:INFO: Configuring SMX FAST
07:49:20:ST3_smx:INFO: chip: 14-7 34.556970 C 1212.728715 mV
07:49:20:ST3_smx:INFO: Electrons
07:49:20:ST3_smx:INFO: # loops 0
07:49:22:ST3_smx:INFO: # loops 1
07:49:25:ST3_smx:INFO: # loops 2
07:49:27:ST3_smx:INFO: Total # of broken channels: 0
07:49:27:ST3_smx:INFO: List of broken channels: []
07:49:27:ST3_smx:INFO: Total # of broken channels: 0
07:49:27:ST3_smx:INFO: List of broken channels: []
07:49:28:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:49:28:febtest:INFO: 01-00 | XA-000-08-003-000-001-192-06 | 47.3 | 1165.6
07:49:28:febtest:INFO: 08-01 | XA-000-08-003-000-001-186-10 | 31.4 | 1224.5
07:49:28:febtest:INFO: 03-02 | XA-000-08-003-000-001-185-10 | 44.1 | 1171.5
07:49:29:febtest:INFO: 10-03 | XA-000-08-003-000-001-190-10 | 37.7 | 1206.9
07:49:29:febtest:INFO: 05-04 | XA-000-08-003-000-001-189-10 | 37.7 | 1201.0
07:49:29:febtest:INFO: 12-05 | XA-000-08-003-000-001-195-06 | 50.4 | 1165.6
07:49:29:febtest:INFO: 07-06 | XA-000-08-003-000-001-193-06 | 47.3 | 1153.7
07:49:29:febtest:INFO: 14-07 | XA-000-08-003-000-001-187-10 | 37.7 | 1212.7
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_05_14-07_47_56
OPERATOR : Benjamin;
SITE : KIT
SETUP : KIT_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME :
FEB_SN : 3018
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.450', '1.6400', '1.854', '1.7680', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9870', '1.850', '0.5954', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9830', '1.850', '0.3252', '0.000', '0.0000', '0.000', '0.0000']