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FEB_3020 04.06.24 15:26:29
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15:26:29:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:26:29:ST3_Shared:INFO: FEB-Microcable
15:26:29:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:26:30:febtest:INFO: Testing FEB with SN 3020
15:26:32:smx_tester:INFO: Scanning setup
15:26:32:elinks:INFO: Disabling clock on downlink 0
15:26:32:elinks:INFO: Disabling clock on downlink 1
15:26:32:elinks:INFO: Disabling clock on downlink 2
15:26:32:elinks:INFO: Disabling clock on downlink 3
15:26:32:elinks:INFO: Disabling clock on downlink 4
15:26:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:26:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
15:26:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:26:32:elinks:INFO: Disabling clock on downlink 0
15:26:32:elinks:INFO: Disabling clock on downlink 1
15:26:32:elinks:INFO: Disabling clock on downlink 2
15:26:32:elinks:INFO: Disabling clock on downlink 3
15:26:32:elinks:INFO: Disabling clock on downlink 4
15:26:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:26:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:26:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
15:26:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
15:26:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
15:26:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
15:26:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
15:26:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
15:26:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
15:26:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
15:26:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
15:26:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
15:26:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
15:26:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
15:26:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
15:26:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
15:26:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
15:26:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
15:26:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:26:33:elinks:INFO: Disabling clock on downlink 0
15:26:33:elinks:INFO: Disabling clock on downlink 1
15:26:33:elinks:INFO: Disabling clock on downlink 2
15:26:33:elinks:INFO: Disabling clock on downlink 3
15:26:33:elinks:INFO: Disabling clock on downlink 4
15:26:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:26:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:26:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:26:33:elinks:INFO: Disabling clock on downlink 0
15:26:33:elinks:INFO: Disabling clock on downlink 1
15:26:33:elinks:INFO: Disabling clock on downlink 2
15:26:33:elinks:INFO: Disabling clock on downlink 3
15:26:33:elinks:INFO: Disabling clock on downlink 4
15:26:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:26:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
15:26:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:26:33:elinks:INFO: Disabling clock on downlink 0
15:26:33:elinks:INFO: Disabling clock on downlink 1
15:26:33:elinks:INFO: Disabling clock on downlink 2
15:26:33:elinks:INFO: Disabling clock on downlink 3
15:26:33:elinks:INFO: Disabling clock on downlink 4
15:26:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:26:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
15:26:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:26:33:setup_element:INFO: Scanning clock phase
15:26:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:26:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:26:33:setup_element:INFO: Clock phase scan results for group 0, downlink 1
15:26:33:setup_element:INFO: Eye window for uplink 0 : ___________________________________________________________________________XXXXX
Clock Delay: 37
15:26:33:setup_element:INFO: Eye window for uplink 1 : ___________________________________________________________________________XXXXX
Clock Delay: 37
15:26:33:setup_element:INFO: Eye window for uplink 2 : ___________________________________________________________________________XXXXX
Clock Delay: 37
15:26:33:setup_element:INFO: Eye window for uplink 3 : ___________________________________________________________________________XXXXX
Clock Delay: 37
15:26:33:setup_element:INFO: Eye window for uplink 4 : ___________________________________________________________________________XXXXX
Clock Delay: 37
15:26:33:setup_element:INFO: Eye window for uplink 5 : ___________________________________________________________________________XXXXX
Clock Delay: 37
15:26:33:setup_element:INFO: Eye window for uplink 6 : X__________________________________________________________________________XXXXX
Clock Delay: 37
15:26:33:setup_element:INFO: Eye window for uplink 7 : X__________________________________________________________________________XXXXX
Clock Delay: 37
15:26:33:setup_element:INFO: Eye window for uplink 8 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
15:26:33:setup_element:INFO: Eye window for uplink 9 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
15:26:33:setup_element:INFO: Eye window for uplink 10: ___________________________________________________________________________XXXXX
Clock Delay: 37
15:26:33:setup_element:INFO: Eye window for uplink 11: ___________________________________________________________________________XXXXX
Clock Delay: 37
15:26:33:setup_element:INFO: Eye window for uplink 12: __________________________________________________________________________XXXXXX
Clock Delay: 36
15:26:33:setup_element:INFO: Eye window for uplink 13: __________________________________________________________________________XXXXXX
Clock Delay: 36
15:26:33:setup_element:INFO: Eye window for uplink 14: __________________________________________________________________________XXXXX_
Clock Delay: 36
15:26:33:setup_element:INFO: Eye window for uplink 15: __________________________________________________________________________XXXXX_
Clock Delay: 36
15:26:33:setup_element:INFO: Setting the clock phase to 36 for group 0, downlink 1
15:26:33:setup_element:INFO: Scanning data phases
15:26:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:26:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:26:38:setup_element:INFO: Data phase scan results for group 0, downlink 1
15:26:38:setup_element:INFO: Eye window for uplink 0 : _______XXXXX____________________________
Data delay found: 29
15:26:38:setup_element:INFO: Eye window for uplink 1 : __XXXXX_________________________________
Data delay found: 24
15:26:38:setup_element:INFO: Eye window for uplink 2 : __XXXXX_________________________________
Data delay found: 24
15:26:38:setup_element:INFO: Eye window for uplink 3 : XXXX__________________________________XX
Data delay found: 20
15:26:38:setup_element:INFO: Eye window for uplink 4 : XXXXX_________________________________XX
Data delay found: 21
15:26:38:setup_element:INFO: Eye window for uplink 5 : ___________________________________XXXXX
Data delay found: 17
15:26:38:setup_element:INFO: Eye window for uplink 6 : __________________________________XXXXX_
Data delay found: 16
15:26:38:setup_element:INFO: Eye window for uplink 7 : ______________________________XXXXX_____
Data delay found: 12
15:26:38:setup_element:INFO: Eye window for uplink 8 : _________________XXXXXX_________________
Data delay found: 39
15:26:38:setup_element:INFO: Eye window for uplink 9 : _______________________XXXXX____________
Data delay found: 5
15:26:38:setup_element:INFO: Eye window for uplink 10: ________________________XXXXX___________
Data delay found: 6
15:26:38:setup_element:INFO: Eye window for uplink 11: ___________________________XXXXX________
Data delay found: 9
15:26:38:setup_element:INFO: Eye window for uplink 12: _______________________XXXX_____________
Data delay found: 4
15:26:38:setup_element:INFO: Eye window for uplink 13: __________________________XXXXX_________
Data delay found: 8
15:26:38:setup_element:INFO: Eye window for uplink 14: ____________________XXXXXX______________
Data delay found: 2
15:26:38:setup_element:INFO: Eye window for uplink 15: _______________________XXXXX____________
Data delay found: 5
15:26:38:setup_element:INFO: Setting the data phase to 29 for uplink 0
15:26:38:setup_element:INFO: Setting the data phase to 24 for uplink 1
15:26:38:setup_element:INFO: Setting the data phase to 24 for uplink 2
15:26:38:setup_element:INFO: Setting the data phase to 20 for uplink 3
15:26:38:setup_element:INFO: Setting the data phase to 21 for uplink 4
15:26:38:setup_element:INFO: Setting the data phase to 17 for uplink 5
15:26:38:setup_element:INFO: Setting the data phase to 16 for uplink 6
15:26:38:setup_element:INFO: Setting the data phase to 12 for uplink 7
15:26:38:setup_element:INFO: Setting the data phase to 39 for uplink 8
15:26:39:setup_element:INFO: Setting the data phase to 5 for uplink 9
15:26:39:setup_element:INFO: Setting the data phase to 6 for uplink 10
15:26:39:setup_element:INFO: Setting the data phase to 9 for uplink 11
15:26:39:setup_element:INFO: Setting the data phase to 4 for uplink 12
15:26:39:setup_element:INFO: Setting the data phase to 8 for uplink 13
15:26:39:setup_element:INFO: Setting the data phase to 2 for uplink 14
15:26:39:setup_element:INFO: Setting the data phase to 5 for uplink 15
15:26:39:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 36
Window Length: 72
Eye Windows:
Uplink 0: ___________________________________________________________________________XXXXX
Uplink 1: ___________________________________________________________________________XXXXX
Uplink 2: ___________________________________________________________________________XXXXX
Uplink 3: ___________________________________________________________________________XXXXX
Uplink 4: ___________________________________________________________________________XXXXX
Uplink 5: ___________________________________________________________________________XXXXX
Uplink 6: X__________________________________________________________________________XXXXX
Uplink 7: X__________________________________________________________________________XXXXX
Uplink 8: _________________________________________________________________________XXXXXX_
Uplink 9: _________________________________________________________________________XXXXXX_
Uplink 10: ___________________________________________________________________________XXXXX
Uplink 11: ___________________________________________________________________________XXXXX
Uplink 12: __________________________________________________________________________XXXXXX
Uplink 13: __________________________________________________________________________XXXXXX
Uplink 14: __________________________________________________________________________XXXXX_
Uplink 15: __________________________________________________________________________XXXXX_
Data phase characteristics:
Uplink 0:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 1:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 2:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 3:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 4:
Optimal Phase: 21
Window Length: 33
Eye Window: XXXXX_________________________________XX
Uplink 5:
Optimal Phase: 17
Window Length: 35
Eye Window: ___________________________________XXXXX
Uplink 6:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 7:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 8:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
Uplink 9:
Optimal Phase: 5
Window Length: 35
Eye Window: _______________________XXXXX____________
Uplink 10:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 11:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 12:
Optimal Phase: 4
Window Length: 36
Eye Window: _______________________XXXX_____________
Uplink 13:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 14:
Optimal Phase: 2
Window Length: 34
Eye Window: ____________________XXXXXX______________
Uplink 15:
Optimal Phase: 5
Window Length: 35
Eye Window: _______________________XXXXX____________
]
15:26:39:setup_element:INFO: Beginning SMX ASICs map scan
15:26:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:26:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:26:39:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
15:26:39:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
15:26:39:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
15:26:39:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
15:26:39:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
15:26:39:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
15:26:39:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
15:26:39:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
15:26:39:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
15:26:39:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
15:26:39:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
15:26:39:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
15:26:39:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
15:26:39:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
15:26:40:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
15:26:40:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
15:26:40:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
15:26:40:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
15:26:40:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
15:26:41:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 36
Window Length: 72
Eye Windows:
Uplink 0: ___________________________________________________________________________XXXXX
Uplink 1: ___________________________________________________________________________XXXXX
Uplink 2: ___________________________________________________________________________XXXXX
Uplink 3: ___________________________________________________________________________XXXXX
Uplink 4: ___________________________________________________________________________XXXXX
Uplink 5: ___________________________________________________________________________XXXXX
Uplink 6: X__________________________________________________________________________XXXXX
Uplink 7: X__________________________________________________________________________XXXXX
Uplink 8: _________________________________________________________________________XXXXXX_
Uplink 9: _________________________________________________________________________XXXXXX_
Uplink 10: ___________________________________________________________________________XXXXX
Uplink 11: ___________________________________________________________________________XXXXX
Uplink 12: __________________________________________________________________________XXXXXX
Uplink 13: __________________________________________________________________________XXXXXX
Uplink 14: __________________________________________________________________________XXXXX_
Uplink 15: __________________________________________________________________________XXXXX_
Data phase characteristics:
Uplink 0:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 1:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 2:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 3:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 4:
Optimal Phase: 21
Window Length: 33
Eye Window: XXXXX_________________________________XX
Uplink 5:
Optimal Phase: 17
Window Length: 35
Eye Window: ___________________________________XXXXX
Uplink 6:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 7:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 8:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
Uplink 9:
Optimal Phase: 5
Window Length: 35
Eye Window: _______________________XXXXX____________
Uplink 10:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 11:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 12:
Optimal Phase: 4
Window Length: 36
Eye Window: _______________________XXXX_____________
Uplink 13:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 14:
Optimal Phase: 2
Window Length: 34
Eye Window: ____________________XXXXXX______________
Uplink 15:
Optimal Phase: 5
Window Length: 35
Eye Window: _______________________XXXXX____________
15:26:41:setup_element:INFO: Performing Elink synchronization
15:26:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:26:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:26:41:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
15:26:41:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
15:26:41:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
15:26:41:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
15:26:41:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
FEB type: A FEB_A: 1 FEB_B: 0
15:26:43:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:26:43:febtest:INFO: 01-00 | XA-000-08-003-000-001-064-12 | 44.1 | 1171.5
15:26:43:febtest:INFO: 08-01 | XA-000-08-003-000-001-014-09 | 56.8 | 1135.9
15:26:43:febtest:INFO: 03-02 | XA-000-08-003-000-001-058-00 | 47.3 | 1159.7
15:26:43:febtest:INFO: 10-03 | XA-000-08-003-000-001-009-09 | 47.3 | 1165.6
15:26:44:febtest:INFO: 05-04 | XA-000-08-003-000-001-050-00 | 37.7 | 1201.0
15:26:44:febtest:INFO: 12-05 | XA-000-08-003-000-001-012-09 | 56.8 | 1135.9
15:26:44:febtest:INFO: 07-06 | XA-000-08-003-000-001-053-00 | 37.7 | 1189.2
15:26:44:febtest:INFO: 14-07 | XA-000-08-003-000-001-002-09 | 37.7 | 1201.0
15:26:44:ST3_smx:INFO: Configuring SMX FAST
15:26:46:ST3_smx:INFO: chip: 1-0 50.430383 C 1147.806000 mV
15:26:46:ST3_smx:INFO: Electrons
15:26:46:ST3_smx:INFO: # loops 0
15:26:48:ST3_smx:INFO: # loops 1
15:26:49:ST3_smx:INFO: # loops 2
15:26:51:ST3_smx:INFO: Total # of broken channels: 0
15:26:51:ST3_smx:INFO: List of broken channels: []
15:26:51:ST3_smx:INFO: Total # of broken channels: 0
15:26:51:ST3_smx:INFO: List of broken channels: []
15:26:52:ST3_smx:INFO: Configuring SMX FAST
15:26:54:ST3_smx:INFO: chip: 8-1 56.797143 C 1141.874115 mV
15:26:54:ST3_smx:INFO: Electrons
15:26:54:ST3_smx:INFO: # loops 0
15:26:55:ST3_smx:INFO: # loops 1
15:26:57:ST3_smx:INFO: # loops 2
15:26:58:ST3_smx:INFO: Total # of broken channels: 0
15:26:58:ST3_smx:INFO: List of broken channels: []
15:26:58:ST3_smx:INFO: Total # of broken channels: 0
15:26:58:ST3_smx:INFO: List of broken channels: []
15:26:59:ST3_smx:INFO: Configuring SMX FAST
15:27:01:ST3_smx:INFO: chip: 3-2 53.612520 C 1141.874115 mV
15:27:01:ST3_smx:INFO: Electrons
15:27:01:ST3_smx:INFO: # loops 0
15:27:03:ST3_smx:INFO: # loops 1
15:27:04:ST3_smx:INFO: # loops 2
15:27:06:ST3_smx:INFO: Total # of broken channels: 0
15:27:06:ST3_smx:INFO: List of broken channels: []
15:27:06:ST3_smx:INFO: Total # of broken channels: 15
15:27:06:ST3_smx:INFO: List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 33]
15:27:07:ST3_smx:INFO: Configuring SMX FAST
15:27:09:ST3_smx:INFO: chip: 10-3 50.430383 C 1165.571835 mV
15:27:09:ST3_smx:INFO: Electrons
15:27:09:ST3_smx:INFO: # loops 0
15:27:11:ST3_smx:INFO: # loops 1
15:27:12:ST3_smx:INFO: # loops 2
15:27:14:ST3_smx:INFO: Total # of broken channels: 0
15:27:14:ST3_smx:INFO: List of broken channels: []
15:27:14:ST3_smx:INFO: Total # of broken channels: 7
15:27:14:ST3_smx:INFO: List of broken channels: [1, 3, 5, 7, 13, 15, 17]
15:27:15:ST3_smx:INFO: Configuring SMX FAST
15:27:16:ST3_smx:INFO: chip: 5-4 37.726682 C 1200.969315 mV
15:27:16:ST3_smx:INFO: Electrons
15:27:16:ST3_smx:INFO: # loops 0
15:27:18:ST3_smx:INFO: # loops 1
15:27:20:ST3_smx:INFO: # loops 2
15:27:21:ST3_smx:INFO: Total # of broken channels: 0
15:27:21:ST3_smx:INFO: List of broken channels: []
15:27:21:ST3_smx:INFO: Total # of broken channels: 4
15:27:21:ST3_smx:INFO: List of broken channels: [1, 3, 5, 7]
15:27:22:ST3_smx:INFO: Configuring SMX FAST
15:27:24:ST3_smx:INFO: chip: 12-5 56.797143 C 1153.732915 mV
15:27:24:ST3_smx:INFO: Electrons
15:27:24:ST3_smx:INFO: # loops 0
15:27:25:ST3_smx:INFO: # loops 1
15:27:27:ST3_smx:INFO: # loops 2
15:27:29:ST3_smx:INFO: Total # of broken channels: 0
15:27:29:ST3_smx:INFO: List of broken channels: []
15:27:29:ST3_smx:INFO: Total # of broken channels: 0
15:27:29:ST3_smx:INFO: List of broken channels: []
15:27:30:ST3_smx:INFO: Configuring SMX FAST
15:27:31:ST3_smx:INFO: chip: 7-6 40.898880 C 1183.292940 mV
15:27:31:ST3_smx:INFO: Electrons
15:27:31:ST3_smx:INFO: # loops 0
15:27:33:ST3_smx:INFO: # loops 1
15:27:34:ST3_smx:INFO: # loops 2
15:27:36:ST3_smx:INFO: Total # of broken channels: 0
15:27:36:ST3_smx:INFO: List of broken channels: []
15:27:36:ST3_smx:INFO: Total # of broken channels: 6
15:27:36:ST3_smx:INFO: List of broken channels: [113, 115, 117, 119, 121, 123]
15:27:37:ST3_smx:INFO: Configuring SMX FAST
15:27:39:ST3_smx:INFO: chip: 14-7 50.430383 C 1165.571835 mV
15:27:39:ST3_smx:INFO: Electrons
15:27:39:ST3_smx:INFO: # loops 0
15:27:41:ST3_smx:INFO: # loops 1
15:27:42:ST3_smx:INFO: # loops 2
15:27:44:ST3_smx:INFO: Total # of broken channels: 0
15:27:44:ST3_smx:INFO: List of broken channels: []
15:27:44:ST3_smx:INFO: Total # of broken channels: 0
15:27:44:ST3_smx:INFO: List of broken channels: []
15:27:45:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:27:45:febtest:INFO: 01-00 | XA-000-08-003-000-001-064-12 | 56.8 | 1147.8
15:27:46:febtest:INFO: 08-01 | XA-000-08-003-000-001-014-09 | 60.0 | 1141.9
15:27:46:febtest:INFO: 03-02 | XA-000-08-003-000-001-058-00 | 56.8 | 1141.9
15:27:46:febtest:INFO: 10-03 | XA-000-08-003-000-001-009-09 | 53.6 | 1165.6
15:27:46:febtest:INFO: 05-04 | XA-000-08-003-000-001-050-00 | 37.7 | 1206.9
15:27:46:febtest:INFO: 12-05 | XA-000-08-003-000-001-012-09 | 56.8 | 1153.7
15:27:47:febtest:INFO: 07-06 | XA-000-08-003-000-001-053-00 | 40.9 | 1183.3
15:27:47:febtest:INFO: 14-07 | XA-000-08-003-000-001-002-09 | 50.4 | 1165.6
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_06_04-15_26_29
OPERATOR : Henrik;
SITE : KIT
SETUP : KIT_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L5UL101016 M5UL1T4010164B2 124 C
FEB_SN : 3020
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.450', '1.5540', '1.850', '2.4230', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0130', '1.850', '0.6018', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '2.0090', '1.850', '0.3270', '0.000', '0.0000', '0.000', '0.0000']