14:52:49:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:52:49:ST3_Shared:INFO:	                         FEB-Sensor                         
14:52:49:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:53:03:ST3_ModuleSelector:INFO:	L5UL101016 M5UL1T2010162B2 62 A

14:53:03:ST3_ModuleSelector:INFO:	22443

14:53:04:febtest:INFO:	Testing FEB with SN 3022
14:53:06:smx_tester:INFO:	Scanning setup
14:53:06:elinks:INFO:	Disabling clock on downlink 0
14:53:06:elinks:INFO:	Disabling clock on downlink 1
14:53:06:elinks:INFO:	Disabling clock on downlink 2
14:53:06:elinks:INFO:	Disabling clock on downlink 3
14:53:06:elinks:INFO:	Disabling clock on downlink 4
14:53:06:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:53:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
14:53:06:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:53:06:elinks:INFO:	Disabling clock on downlink 0
14:53:06:elinks:INFO:	Disabling clock on downlink 1
14:53:06:elinks:INFO:	Disabling clock on downlink 2
14:53:06:elinks:INFO:	Disabling clock on downlink 3
14:53:06:elinks:INFO:	Disabling clock on downlink 4
14:53:06:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:53:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:53:06:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
14:53:06:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
14:53:06:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
14:53:06:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
14:53:06:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
14:53:06:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
14:53:07:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
14:53:07:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
14:53:07:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
14:53:07:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
14:53:07:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
14:53:07:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
14:53:07:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
14:53:07:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
14:53:07:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
14:53:07:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
14:53:07:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:53:07:elinks:INFO:	Disabling clock on downlink 0
14:53:07:elinks:INFO:	Disabling clock on downlink 1
14:53:07:elinks:INFO:	Disabling clock on downlink 2
14:53:07:elinks:INFO:	Disabling clock on downlink 3
14:53:07:elinks:INFO:	Disabling clock on downlink 4
14:53:07:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:53:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:53:07:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:53:07:elinks:INFO:	Disabling clock on downlink 0
14:53:07:elinks:INFO:	Disabling clock on downlink 1
14:53:07:elinks:INFO:	Disabling clock on downlink 2
14:53:07:elinks:INFO:	Disabling clock on downlink 3
14:53:07:elinks:INFO:	Disabling clock on downlink 4
14:53:07:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:53:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
14:53:07:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:53:07:elinks:INFO:	Disabling clock on downlink 0
14:53:07:elinks:INFO:	Disabling clock on downlink 1
14:53:07:elinks:INFO:	Disabling clock on downlink 2
14:53:07:elinks:INFO:	Disabling clock on downlink 3
14:53:07:elinks:INFO:	Disabling clock on downlink 4
14:53:07:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:53:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
14:53:07:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:53:07:setup_element:INFO:	Scanning clock phase
14:53:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:53:07:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:53:07:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
14:53:07:setup_element:INFO:	Eye window for uplink 0 : XX__________________________________________________________________________XXXX
Clock Delay: 38
14:53:07:setup_element:INFO:	Eye window for uplink 1 : XX__________________________________________________________________________XXXX
Clock Delay: 38
14:53:07:setup_element:INFO:	Eye window for uplink 2 : ____________________________________________________________________________XXXX
Clock Delay: 37
14:53:07:setup_element:INFO:	Eye window for uplink 3 : ____________________________________________________________________________XXXX
Clock Delay: 37
14:53:07:setup_element:INFO:	Eye window for uplink 4 : __________________________________________________________________________XXXXX_
Clock Delay: 36
14:53:07:setup_element:INFO:	Eye window for uplink 5 : __________________________________________________________________________XXXXX_
Clock Delay: 36
14:53:07:setup_element:INFO:	Eye window for uplink 6 : ___________________________________________________________________________XXXXX
Clock Delay: 37
14:53:07:setup_element:INFO:	Eye window for uplink 7 : ___________________________________________________________________________XXXXX
Clock Delay: 37
14:53:07:setup_element:INFO:	Eye window for uplink 8 : __________________________________________________________________________XXXXXX
Clock Delay: 36
14:53:07:setup_element:INFO:	Eye window for uplink 9 : __________________________________________________________________________XXXXXX
Clock Delay: 36
14:53:07:setup_element:INFO:	Eye window for uplink 10: ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:53:07:setup_element:INFO:	Eye window for uplink 11: ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:53:07:setup_element:INFO:	Eye window for uplink 12: _________________________________________________________________________XXXXXX_
Clock Delay: 35
14:53:07:setup_element:INFO:	Eye window for uplink 13: _________________________________________________________________________XXXXXX_
Clock Delay: 35
14:53:07:setup_element:INFO:	Eye window for uplink 14: ___________________________________________________________________________XXXXX
Clock Delay: 37
14:53:07:setup_element:INFO:	Eye window for uplink 15: ___________________________________________________________________________XXXXX
Clock Delay: 37
14:53:07:setup_element:INFO:	Setting the clock phase to 36 for group 0, downlink 1
14:53:07:setup_element:INFO:	Scanning data phases
14:53:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:53:07:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:53:12:setup_element:INFO:	Data phase scan results for group 0, downlink 1
14:53:12:setup_element:INFO:	Eye window for uplink 0 : _________XXXXX__________________________
Data delay found: 31
14:53:12:setup_element:INFO:	Eye window for uplink 1 : _____XXXXX______________________________
Data delay found: 27
14:53:12:setup_element:INFO:	Eye window for uplink 2 : ___XXXX_________________________________
Data delay found: 24
14:53:12:setup_element:INFO:	Eye window for uplink 3 : XXXX__________________________________XX
Data delay found: 20
14:53:12:setup_element:INFO:	Eye window for uplink 4 : XXX__________________________________XXX
Data delay found: 19
14:53:12:setup_element:INFO:	Eye window for uplink 5 : __________________________________XXXX__
Data delay found: 15
14:53:12:setup_element:INFO:	Eye window for uplink 6 : ________________________________XXXXX___
Data delay found: 14
14:53:12:setup_element:INFO:	Eye window for uplink 7 : ____________________________XXXX________
Data delay found: 9
14:53:12:setup_element:INFO:	Eye window for uplink 8 : ___________________XXXXXX_______________
Data delay found: 1
14:53:12:setup_element:INFO:	Eye window for uplink 9 : ________________________XXXXXX__________
Data delay found: 6
14:53:12:setup_element:INFO:	Eye window for uplink 10: _________________XXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 8
14:53:12:setup_element:INFO:	Eye window for uplink 11: _________________XXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 8
14:53:12:setup_element:INFO:	Eye window for uplink 12: _____________________XXXXX______________
Data delay found: 3
14:53:12:setup_element:INFO:	Eye window for uplink 13: ________________________XXXXX___________
Data delay found: 6
14:53:12:setup_element:INFO:	Eye window for uplink 14: _______________________XXXXX____________
Data delay found: 5
14:53:12:setup_element:INFO:	Eye window for uplink 15: __________________________XXXXX_________
Data delay found: 8
14:53:12:setup_element:INFO:	Setting the data phase to 31 for uplink 0
14:53:12:setup_element:INFO:	Setting the data phase to 27 for uplink 1
14:53:13:setup_element:INFO:	Setting the data phase to 24 for uplink 2
14:53:13:setup_element:INFO:	Setting the data phase to 20 for uplink 3
14:53:13:setup_element:INFO:	Setting the data phase to 19 for uplink 4
14:53:13:setup_element:INFO:	Setting the data phase to 15 for uplink 5
14:53:13:setup_element:INFO:	Setting the data phase to 14 for uplink 6
14:53:13:setup_element:INFO:	Setting the data phase to 9 for uplink 7
14:53:13:setup_element:INFO:	Setting the data phase to 1 for uplink 8
14:53:13:setup_element:INFO:	Setting the data phase to 6 for uplink 9
14:53:13:setup_element:INFO:	Setting the data phase to 8 for uplink 10
14:53:13:setup_element:INFO:	Setting the data phase to 8 for uplink 11
14:53:13:setup_element:INFO:	Setting the data phase to 3 for uplink 12
14:53:13:setup_element:INFO:	Setting the data phase to 6 for uplink 13
14:53:13:setup_element:INFO:	Setting the data phase to 5 for uplink 14
14:53:13:setup_element:INFO:	Setting the data phase to 8 for uplink 15
14:53:13:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 36
    Window Length: 70
    Eye Windows:
      Uplink  0: XX__________________________________________________________________________XXXX
      Uplink  1: XX__________________________________________________________________________XXXX
      Uplink  2: ____________________________________________________________________________XXXX
      Uplink  3: ____________________________________________________________________________XXXX
      Uplink  4: __________________________________________________________________________XXXXX_
      Uplink  5: __________________________________________________________________________XXXXX_
      Uplink  6: ___________________________________________________________________________XXXXX
      Uplink  7: ___________________________________________________________________________XXXXX
      Uplink  8: __________________________________________________________________________XXXXXX
      Uplink  9: __________________________________________________________________________XXXXXX
      Uplink 10: ________________________________________________________________________XXXXXX__
      Uplink 11: ________________________________________________________________________XXXXXX__
      Uplink 12: _________________________________________________________________________XXXXXX_
      Uplink 13: _________________________________________________________________________XXXXXX_
      Uplink 14: ___________________________________________________________________________XXXXX
      Uplink 15: ___________________________________________________________________________XXXXX
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 1:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 2:
      Optimal Phase: 24
      Window Length: 36
      Eye Window: ___XXXX_________________________________
    Uplink 3:
      Optimal Phase: 20
      Window Length: 34
      Eye Window: XXXX__________________________________XX
    Uplink 4:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 5:
      Optimal Phase: 15
      Window Length: 36
      Eye Window: __________________________________XXXX__
    Uplink 6:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 7:
      Optimal Phase: 9
      Window Length: 36
      Eye Window: ____________________________XXXX________
    Uplink 8:
      Optimal Phase: 1
      Window Length: 34
      Eye Window: ___________________XXXXXX_______________
    Uplink 9:
      Optimal Phase: 6
      Window Length: 34
      Eye Window: ________________________XXXXXX__________
    Uplink 10:
      Optimal Phase: 8
      Window Length: 17
      Eye Window: _________________XXXXXXXXXXXXXXXXXXXXXXX
    Uplink 11:
      Optimal Phase: 8
      Window Length: 17
      Eye Window: _________________XXXXXXXXXXXXXXXXXXXXXXX
    Uplink 12:
      Optimal Phase: 3
      Window Length: 35
      Eye Window: _____________________XXXXX______________
    Uplink 13:
      Optimal Phase: 6
      Window Length: 35
      Eye Window: ________________________XXXXX___________
    Uplink 14:
      Optimal Phase: 5
      Window Length: 35
      Eye Window: _______________________XXXXX____________
    Uplink 15:
      Optimal Phase: 8
      Window Length: 35
      Eye Window: __________________________XXXXX_________
]
14:53:13:setup_element:INFO:	Beginning SMX ASICs map scan
14:53:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:53:13:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:53:13:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
14:53:13:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
14:53:13:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:53:13:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
14:53:13:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
14:53:13:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:53:13:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:53:13:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
14:53:13:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
14:53:13:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:53:13:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:53:13:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
14:53:13:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
14:53:14:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:53:14:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:53:14:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
14:53:14:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
14:53:14:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:53:14:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:53:15:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 36
    Window Length: 70
    Eye Windows:
      Uplink  0: XX__________________________________________________________________________XXXX
      Uplink  1: XX__________________________________________________________________________XXXX
      Uplink  2: ____________________________________________________________________________XXXX
      Uplink  3: ____________________________________________________________________________XXXX
      Uplink  4: __________________________________________________________________________XXXXX_
      Uplink  5: __________________________________________________________________________XXXXX_
      Uplink  6: ___________________________________________________________________________XXXXX
      Uplink  7: ___________________________________________________________________________XXXXX
      Uplink  8: __________________________________________________________________________XXXXXX
      Uplink  9: __________________________________________________________________________XXXXXX
      Uplink 10: ________________________________________________________________________XXXXXX__
      Uplink 11: ________________________________________________________________________XXXXXX__
      Uplink 12: _________________________________________________________________________XXXXXX_
      Uplink 13: _________________________________________________________________________XXXXXX_
      Uplink 14: ___________________________________________________________________________XXXXX
      Uplink 15: ___________________________________________________________________________XXXXX
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 1:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 2:
      Optimal Phase: 24
      Window Length: 36
      Eye Window: ___XXXX_________________________________
    Uplink 3:
      Optimal Phase: 20
      Window Length: 34
      Eye Window: XXXX__________________________________XX
    Uplink 4:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 5:
      Optimal Phase: 15
      Window Length: 36
      Eye Window: __________________________________XXXX__
    Uplink 6:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 7:
      Optimal Phase: 9
      Window Length: 36
      Eye Window: ____________________________XXXX________
    Uplink 8:
      Optimal Phase: 1
      Window Length: 34
      Eye Window: ___________________XXXXXX_______________
    Uplink 9:
      Optimal Phase: 6
      Window Length: 34
      Eye Window: ________________________XXXXXX__________
    Uplink 10:
      Optimal Phase: 8
      Window Length: 17
      Eye Window: _________________XXXXXXXXXXXXXXXXXXXXXXX
    Uplink 11:
      Optimal Phase: 8
      Window Length: 17
      Eye Window: _________________XXXXXXXXXXXXXXXXXXXXXXX
    Uplink 12:
      Optimal Phase: 3
      Window Length: 35
      Eye Window: _____________________XXXXX______________
    Uplink 13:
      Optimal Phase: 6
      Window Length: 35
      Eye Window: ________________________XXXXX___________
    Uplink 14:
      Optimal Phase: 5
      Window Length: 35
      Eye Window: _______________________XXXXX____________
    Uplink 15:
      Optimal Phase: 8
      Window Length: 35
      Eye Window: __________________________XXXXX_________

14:53:15:setup_element:INFO:	Performing Elink synchronization
14:53:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:53:15:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:53:15:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
14:53:15:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
14:53:15:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
14:53:15:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:53:15:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  1  |  0  |     [1]      |   [(0, 1), (1, 0)] 
   1  |   [0]   |  1  |  0  |     [8]      |   [(0, 8), (1, 9)] 
   2  |   [0]   |  1  |  0  |     [3]      |   [(0, 3), (1, 2)] 
   3  |   [0]   |  1  |  0  |     [10]     |  [(0, 10), (1, 11)]
   4  |   [0]   |  1  |  0  |     [5]      |   [(0, 5), (1, 4)] 
   5  |   [0]   |  1  |  0  |     [12]     |  [(0, 12), (1, 13)]
   6  |   [0]   |  1  |  0  |     [7]      |   [(0, 7), (1, 6)] 
   7  |   [0]   |  1  |  0  |     [14]     |  [(0, 14), (1, 15)]
FEB type: A FEB_A: 1 FEB_B: 0
14:53:17:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:53:17:febtest:INFO:	01-00 | XA-000-08-003-000-000-192-11 |  37.7 | 1189.2
14:53:17:febtest:INFO:	08-01 | XA-000-08-003-000-000-193-11 |  50.4 | 1147.8
14:53:17:febtest:INFO:	03-02 | XA-000-08-003-000-000-198-11 |  40.9 | 1171.5
14:53:17:febtest:INFO:	10-03 | XA-000-08-003-000-000-187-07 |  44.1 | 1195.1
14:53:18:febtest:INFO:	05-04 | XA-000-08-003-000-000-199-11 |  34.6 | 1201.0
14:53:18:febtest:INFO:	12-05 | XA-000-08-003-000-000-194-11 |  53.6 | 1141.9
14:53:18:febtest:INFO:	07-06 | XA-000-08-003-000-000-200-11 |  60.0 | 1106.2
14:53:18:febtest:INFO:	14-07 | XA-000-08-003-000-000-185-07 |  40.9 | 1189.2
14:53:19:ST3_smx:INFO:	Configuring SMX FAST
14:53:21:ST3_smx:INFO:	chip: 1-0 	 34.556970 C 	 1206.851500 mV
14:53:21:ST3_smx:INFO:		Electrons
14:53:21:ST3_smx:INFO:	# loops 0
14:53:23:ST3_smx:INFO:	# loops 1
14:53:24:ST3_smx:INFO:	# loops 2
14:53:26:ST3_smx:INFO:	Total # of broken channels: 0
14:53:26:ST3_smx:INFO:	List of broken channels: []
14:53:26:ST3_smx:INFO:	Total # of broken channels: 0
14:53:26:ST3_smx:INFO:	List of broken channels: []
14:53:27:ST3_smx:INFO:	Configuring SMX FAST
14:53:29:ST3_smx:INFO:	chip: 8-1 	 47.250730 C 	 1159.654860 mV
14:53:29:ST3_smx:INFO:		Electrons
14:53:29:ST3_smx:INFO:	# loops 0
14:53:31:ST3_smx:INFO:	# loops 1
14:53:33:ST3_smx:INFO:	# loops 2
14:53:34:ST3_smx:INFO:	Total # of broken channels: 0
14:53:34:ST3_smx:INFO:	List of broken channels: []
14:53:34:ST3_smx:INFO:	Total # of broken channels: 0
14:53:34:ST3_smx:INFO:	List of broken channels: []
14:53:35:ST3_smx:INFO:	Configuring SMX FAST
14:53:37:ST3_smx:INFO:	chip: 3-2 	 44.073563 C 	 1165.571835 mV
14:53:37:ST3_smx:INFO:		Electrons
14:53:37:ST3_smx:INFO:	# loops 0
14:53:39:ST3_smx:INFO:	# loops 1
14:53:41:ST3_smx:INFO:	# loops 2
14:53:42:ST3_smx:INFO:	Total # of broken channels: 0
14:53:42:ST3_smx:INFO:	List of broken channels: []
14:53:42:ST3_smx:INFO:	Total # of broken channels: 0
14:53:42:ST3_smx:INFO:	List of broken channels: []
14:53:43:ST3_smx:INFO:	Configuring SMX FAST
14:53:45:ST3_smx:INFO:	chip: 10-3 	 44.073563 C 	 1195.082160 mV
14:53:45:ST3_smx:INFO:		Electrons
14:53:45:ST3_smx:INFO:	# loops 0
14:53:47:ST3_smx:INFO:	# loops 1
14:53:49:ST3_smx:INFO:	# loops 2
14:53:51:ST3_smx:INFO:	Total # of broken channels: 0
14:53:51:ST3_smx:INFO:	List of broken channels: []
14:53:51:ST3_smx:INFO:	Total # of broken channels: 0
14:53:51:ST3_smx:INFO:	List of broken channels: []
14:53:51:ST3_smx:INFO:	Configuring SMX FAST
14:53:53:ST3_smx:INFO:	chip: 5-4 	 34.556970 C 	 1206.851500 mV
14:53:53:ST3_smx:INFO:		Electrons
14:53:53:ST3_smx:INFO:	# loops 0
14:53:55:ST3_smx:INFO:	# loops 1
14:53:57:ST3_smx:INFO:	# loops 2
14:53:59:ST3_smx:INFO:	Total # of broken channels: 0
14:53:59:ST3_smx:INFO:	List of broken channels: []
14:53:59:ST3_smx:INFO:	Total # of broken channels: 0
14:53:59:ST3_smx:INFO:	List of broken channels: []
14:53:59:ST3_smx:INFO:	Configuring SMX FAST
14:54:02:ST3_smx:INFO:	chip: 12-5 	 56.797143 C 	 1135.937260 mV
14:54:02:ST3_smx:INFO:		Electrons
14:54:02:ST3_smx:INFO:	# loops 0
14:54:04:ST3_smx:INFO:	# loops 1
14:54:05:ST3_smx:INFO:	# loops 2
14:54:07:ST3_smx:INFO:	Total # of broken channels: 0
14:54:07:ST3_smx:INFO:	List of broken channels: []
14:54:07:ST3_smx:INFO:	Total # of broken channels: 1
14:54:07:ST3_smx:INFO:	List of broken channels: [56]
14:54:08:ST3_smx:INFO:	Configuring SMX FAST
14:54:10:ST3_smx:INFO:	chip: 7-6 	 56.797143 C 	 1129.995435 mV
14:54:10:ST3_smx:INFO:		Electrons
14:54:10:ST3_smx:INFO:	# loops 0
14:54:12:ST3_smx:INFO:	# loops 1
14:54:13:ST3_smx:INFO:	# loops 2
14:54:15:ST3_smx:INFO:	Total # of broken channels: 0
14:54:15:ST3_smx:INFO:	List of broken channels: []
14:54:15:ST3_smx:INFO:	Total # of broken channels: 0
14:54:15:ST3_smx:INFO:	List of broken channels: []
14:54:16:ST3_smx:INFO:	Configuring SMX FAST
14:54:18:ST3_smx:INFO:	chip: 14-7 	 44.073563 C 	 1177.390875 mV
14:54:18:ST3_smx:INFO:		Electrons
14:54:18:ST3_smx:INFO:	# loops 0
14:54:19:ST3_smx:INFO:	# loops 1
14:54:21:ST3_smx:INFO:	# loops 2
14:54:23:ST3_smx:INFO:	Total # of broken channels: 0
14:54:23:ST3_smx:INFO:	List of broken channels: []
14:54:23:ST3_smx:INFO:	Total # of broken channels: 0
14:54:23:ST3_smx:INFO:	List of broken channels: []
14:54:24:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:54:24:febtest:INFO:	01-00 | XA-000-08-003-000-000-192-11 |  37.7 | 1201.0
14:54:24:febtest:INFO:	08-01 | XA-000-08-003-000-000-193-11 |  50.4 | 1159.7
14:54:24:febtest:INFO:	03-02 | XA-000-08-003-000-000-198-11 |  47.3 | 1165.6
14:54:25:febtest:INFO:	10-03 | XA-000-08-003-000-000-187-07 |  44.1 | 1201.0
14:54:25:febtest:INFO:	05-04 | XA-000-08-003-000-000-199-11 |  34.6 | 1206.9
14:54:25:febtest:INFO:	12-05 | XA-000-08-003-000-000-194-11 |  56.8 | 1135.9
14:54:25:febtest:INFO:	07-06 | XA-000-08-003-000-000-200-11 |  56.8 | 1135.9
14:54:25:febtest:INFO:	14-07 | XA-000-08-003-000-000-185-07 |  47.3 | 1177.4
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_06_06-14_52_49
OPERATOR  : Henrik; 
SITE      : KIT
SETUP     : KIT_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L5UL101016 M5UL1T2010162B2 62 A

FEB_SN : 3022
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID:	22443

MODULE_NAME:	L5UL101016 M5UL1T2010162B2 62 A

MODULE_TYPE:	
MODULE_LADDER:	L5UL101016
MODULE_MODULE:	M5UL1T2010162B2
MODULE_SIZE:	62
MODULE_GRADE:	A
---------------------------------------
VI_before_Init : ['2.450', '1.9300', '1.850', '0.3308', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0080', '1.850', '0.5960', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '2.0010', '1.850', '0.3243', '0.000', '0.0000', '0.000', '0.0000']