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FEB_3026 13.06.24 11:10:54
Info
11:10:54:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:10:54:ST3_Shared:INFO: FEB-Microcable
11:10:54:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:10:54:febtest:INFO: Testing FEB with SN 3026
11:10:57:smx_tester:INFO: Scanning setup
11:10:57:elinks:INFO: Disabling clock on downlink 0
11:10:57:elinks:INFO: Disabling clock on downlink 1
11:10:57:elinks:INFO: Disabling clock on downlink 2
11:10:57:elinks:INFO: Disabling clock on downlink 3
11:10:57:elinks:INFO: Disabling clock on downlink 4
11:10:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:10:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:10:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:10:57:elinks:INFO: Disabling clock on downlink 0
11:10:57:elinks:INFO: Disabling clock on downlink 1
11:10:57:elinks:INFO: Disabling clock on downlink 2
11:10:57:elinks:INFO: Disabling clock on downlink 3
11:10:57:elinks:INFO: Disabling clock on downlink 4
11:10:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:10:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:10:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
11:10:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
11:10:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
11:10:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
11:10:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
11:10:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
11:10:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
11:10:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
11:10:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
11:10:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
11:10:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
11:10:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
11:10:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
11:10:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
11:10:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
11:10:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
11:10:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:10:57:elinks:INFO: Disabling clock on downlink 0
11:10:57:elinks:INFO: Disabling clock on downlink 1
11:10:57:elinks:INFO: Disabling clock on downlink 2
11:10:57:elinks:INFO: Disabling clock on downlink 3
11:10:57:elinks:INFO: Disabling clock on downlink 4
11:10:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:10:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:10:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:10:57:elinks:INFO: Disabling clock on downlink 0
11:10:57:elinks:INFO: Disabling clock on downlink 1
11:10:57:elinks:INFO: Disabling clock on downlink 2
11:10:57:elinks:INFO: Disabling clock on downlink 3
11:10:57:elinks:INFO: Disabling clock on downlink 4
11:10:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:10:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:10:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:10:57:elinks:INFO: Disabling clock on downlink 0
11:10:57:elinks:INFO: Disabling clock on downlink 1
11:10:57:elinks:INFO: Disabling clock on downlink 2
11:10:58:elinks:INFO: Disabling clock on downlink 3
11:10:58:elinks:INFO: Disabling clock on downlink 4
11:10:58:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:10:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:10:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:10:58:setup_element:INFO: Scanning clock phase
11:10:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:10:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:10:58:setup_element:INFO: Clock phase scan results for group 0, downlink 1
11:10:58:setup_element:INFO: Eye window for uplink 0 : __________________________________________________________________________XXXX__
Clock Delay: 35
11:10:58:setup_element:INFO: Eye window for uplink 1 : __________________________________________________________________________XXXX__
Clock Delay: 35
11:10:58:setup_element:INFO: Eye window for uplink 2 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:10:58:setup_element:INFO: Eye window for uplink 3 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:10:58:setup_element:INFO: Eye window for uplink 4 : __________________________________________________________________________XXXXX_
Clock Delay: 36
11:10:58:setup_element:INFO: Eye window for uplink 5 : __________________________________________________________________________XXXXX_
Clock Delay: 36
11:10:58:setup_element:INFO: Eye window for uplink 6 : __________________________________________________________________________XXXXX_
Clock Delay: 36
11:10:58:setup_element:INFO: Eye window for uplink 7 : __________________________________________________________________________XXXXX_
Clock Delay: 36
11:10:58:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________XXXXX___
Clock Delay: 34
11:10:58:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________XXXXX___
Clock Delay: 34
11:10:58:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________XXXXX___
Clock Delay: 34
11:10:58:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________XXXXX___
Clock Delay: 34
11:10:58:setup_element:INFO: Eye window for uplink 12: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:10:58:setup_element:INFO: Eye window for uplink 13: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:10:58:setup_element:INFO: Eye window for uplink 14: _________________________________________________________________________XXXXX__
Clock Delay: 35
11:10:58:setup_element:INFO: Eye window for uplink 15: _________________________________________________________________________XXXXX__
Clock Delay: 35
11:10:58:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1
11:10:58:setup_element:INFO: Scanning data phases
11:10:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:10:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:11:03:setup_element:INFO: Data phase scan results for group 0, downlink 1
11:11:03:setup_element:INFO: Eye window for uplink 0 : _____XXXXX______________________________
Data delay found: 27
11:11:03:setup_element:INFO: Eye window for uplink 1 : _XXXXX__________________________________
Data delay found: 23
11:11:03:setup_element:INFO: Eye window for uplink 2 : __XXXXXX________________________________
Data delay found: 24
11:11:03:setup_element:INFO: Eye window for uplink 3 : XXXX__________________________________XX
Data delay found: 20
11:11:03:setup_element:INFO: Eye window for uplink 4 : _XXXX___________________________________
Data delay found: 22
11:11:03:setup_element:INFO: Eye window for uplink 5 : X____________________________________XXX
Data delay found: 18
11:11:03:setup_element:INFO: Eye window for uplink 6 : ___________________________________XXXX_
Data delay found: 16
11:11:03:setup_element:INFO: Eye window for uplink 7 : _______________________________XXXX_____
Data delay found: 12
11:11:03:setup_element:INFO: Eye window for uplink 8 : __________________XXXXXXX______XXXXXXXXX
Data delay found: 8
11:11:03:setup_element:INFO: Eye window for uplink 9 : ________________________XXXXX__XXXXXXXXX
Data delay found: 11
11:11:03:setup_element:INFO: Eye window for uplink 10: _____________________XXXXX______________
Data delay found: 3
11:11:03:setup_element:INFO: Eye window for uplink 11: _________________________XXXXX__________
Data delay found: 7
11:11:03:setup_element:INFO: Eye window for uplink 12: ______________________XXXX______________
Data delay found: 3
11:11:03:setup_element:INFO: Eye window for uplink 13: _________________________XXXXX__________
Data delay found: 7
11:11:03:setup_element:INFO: Eye window for uplink 14: _______________________XXXXX____________
Data delay found: 5
11:11:03:setup_element:INFO: Eye window for uplink 15: _________________________XXXXX__________
Data delay found: 7
11:11:03:setup_element:INFO: Setting the data phase to 27 for uplink 0
11:11:03:setup_element:INFO: Setting the data phase to 23 for uplink 1
11:11:03:setup_element:INFO: Setting the data phase to 24 for uplink 2
11:11:03:setup_element:INFO: Setting the data phase to 20 for uplink 3
11:11:03:setup_element:INFO: Setting the data phase to 22 for uplink 4
11:11:03:setup_element:INFO: Setting the data phase to 18 for uplink 5
11:11:03:setup_element:INFO: Setting the data phase to 16 for uplink 6
11:11:03:setup_element:INFO: Setting the data phase to 12 for uplink 7
11:11:03:setup_element:INFO: Setting the data phase to 8 for uplink 8
11:11:03:setup_element:INFO: Setting the data phase to 11 for uplink 9
11:11:03:setup_element:INFO: Setting the data phase to 3 for uplink 10
11:11:03:setup_element:INFO: Setting the data phase to 7 for uplink 11
11:11:03:setup_element:INFO: Setting the data phase to 3 for uplink 12
11:11:03:setup_element:INFO: Setting the data phase to 7 for uplink 13
11:11:03:setup_element:INFO: Setting the data phase to 5 for uplink 14
11:11:03:setup_element:INFO: Setting the data phase to 7 for uplink 15
11:11:03:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 72
Eye Windows:
Uplink 0: __________________________________________________________________________XXXX__
Uplink 1: __________________________________________________________________________XXXX__
Uplink 2: _________________________________________________________________________XXXXXX_
Uplink 3: _________________________________________________________________________XXXXXX_
Uplink 4: __________________________________________________________________________XXXXX_
Uplink 5: __________________________________________________________________________XXXXX_
Uplink 6: __________________________________________________________________________XXXXX_
Uplink 7: __________________________________________________________________________XXXXX_
Uplink 8: ________________________________________________________________________XXXXX___
Uplink 9: ________________________________________________________________________XXXXX___
Uplink 10: ________________________________________________________________________XXXXX___
Uplink 11: ________________________________________________________________________XXXXX___
Uplink 12: _______________________________________________________________________XXXXXXX__
Uplink 13: _______________________________________________________________________XXXXXXX__
Uplink 14: _________________________________________________________________________XXXXX__
Uplink 15: _________________________________________________________________________XXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 1:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 2:
Optimal Phase: 24
Window Length: 34
Eye Window: __XXXXXX________________________________
Uplink 3:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 4:
Optimal Phase: 22
Window Length: 36
Eye Window: _XXXX___________________________________
Uplink 5:
Optimal Phase: 18
Window Length: 36
Eye Window: X____________________________________XXX
Uplink 6:
Optimal Phase: 16
Window Length: 36
Eye Window: ___________________________________XXXX_
Uplink 7:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
Uplink 8:
Optimal Phase: 8
Window Length: 18
Eye Window: __________________XXXXXXX______XXXXXXXXX
Uplink 9:
Optimal Phase: 11
Window Length: 24
Eye Window: ________________________XXXXX__XXXXXXXXX
Uplink 10:
Optimal Phase: 3
Window Length: 35
Eye Window: _____________________XXXXX______________
Uplink 11:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 12:
Optimal Phase: 3
Window Length: 36
Eye Window: ______________________XXXX______________
Uplink 13:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 14:
Optimal Phase: 5
Window Length: 35
Eye Window: _______________________XXXXX____________
Uplink 15:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
]
11:11:03:setup_element:INFO: Beginning SMX ASICs map scan
11:11:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:11:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:11:03:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:11:03:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:11:03:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:11:03:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
11:11:03:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
11:11:03:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:11:04:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:11:04:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
11:11:04:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
11:11:04:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:11:04:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:11:04:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
11:11:04:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
11:11:04:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:11:04:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:11:04:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
11:11:04:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
11:11:05:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:11:05:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:11:06:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 72
Eye Windows:
Uplink 0: __________________________________________________________________________XXXX__
Uplink 1: __________________________________________________________________________XXXX__
Uplink 2: _________________________________________________________________________XXXXXX_
Uplink 3: _________________________________________________________________________XXXXXX_
Uplink 4: __________________________________________________________________________XXXXX_
Uplink 5: __________________________________________________________________________XXXXX_
Uplink 6: __________________________________________________________________________XXXXX_
Uplink 7: __________________________________________________________________________XXXXX_
Uplink 8: ________________________________________________________________________XXXXX___
Uplink 9: ________________________________________________________________________XXXXX___
Uplink 10: ________________________________________________________________________XXXXX___
Uplink 11: ________________________________________________________________________XXXXX___
Uplink 12: _______________________________________________________________________XXXXXXX__
Uplink 13: _______________________________________________________________________XXXXXXX__
Uplink 14: _________________________________________________________________________XXXXX__
Uplink 15: _________________________________________________________________________XXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 1:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 2:
Optimal Phase: 24
Window Length: 34
Eye Window: __XXXXXX________________________________
Uplink 3:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 4:
Optimal Phase: 22
Window Length: 36
Eye Window: _XXXX___________________________________
Uplink 5:
Optimal Phase: 18
Window Length: 36
Eye Window: X____________________________________XXX
Uplink 6:
Optimal Phase: 16
Window Length: 36
Eye Window: ___________________________________XXXX_
Uplink 7:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
Uplink 8:
Optimal Phase: 8
Window Length: 18
Eye Window: __________________XXXXXXX______XXXXXXXXX
Uplink 9:
Optimal Phase: 11
Window Length: 24
Eye Window: ________________________XXXXX__XXXXXXXXX
Uplink 10:
Optimal Phase: 3
Window Length: 35
Eye Window: _____________________XXXXX______________
Uplink 11:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 12:
Optimal Phase: 3
Window Length: 36
Eye Window: ______________________XXXX______________
Uplink 13:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 14:
Optimal Phase: 5
Window Length: 35
Eye Window: _______________________XXXXX____________
Uplink 15:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
11:11:06:setup_element:INFO: Performing Elink synchronization
11:11:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:11:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:11:06:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:11:06:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:11:06:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
11:11:06:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:11:06:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4_5 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_4__upli_5
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_12 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_5__upli_12
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_6__upli_7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_14 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_7__upli_14
FEB type: A FEB_A: 1 FEB_B: 0
11:11:07:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:11:08:febtest:INFO: 01-00 | XA-000-08-001-064-062-120-15 | 37.7 | 1189.2
11:11:08:febtest:INFO: 08-01 | XA-000-08-001-064-047-064-07 | 47.3 | 1153.7
11:11:08:febtest:INFO: 03-02 | XA-000-08-001-064-062-152-14 | 44.1 | 1171.5
11:11:08:febtest:INFO: 10-03 | XA-000-08-001-064-047-072-07 | 28.2 | 1236.2
11:11:08:febtest:INFO: 05-04 | XA-000-08-003-000-001-049-00 | 25.1 | 1230.3
11:11:09:febtest:INFO: 12-05 | XA-000-08-001-064-047-104-09 | 47.3 | 1171.5
11:11:09:febtest:INFO: 07-06 | XA-000-08-001-064-047-032-12 | 53.6 | 1130.0
11:11:09:febtest:INFO: 14-07 | XA-000-08-001-064-047-040-12 | 47.3 | 1165.6
11:11:09:ST3_smx:INFO: Configuring SMX FAST
11:11:12:ST3_smx:INFO: chip: 1-0 37.726682 C 1195.082160 mV
11:11:12:ST3_smx:INFO: Electrons
11:11:12:ST3_smx:INFO: # loops 0
11:11:13:ST3_smx:INFO: # loops 1
11:11:15:ST3_smx:INFO: # loops 2
11:11:17:ST3_smx:INFO: Total # of broken channels: 0
11:11:17:ST3_smx:INFO: List of broken channels: []
11:11:17:ST3_smx:INFO: Total # of broken channels: 0
11:11:17:ST3_smx:INFO: List of broken channels: []
11:11:18:ST3_smx:INFO: Configuring SMX FAST
11:11:20:ST3_smx:INFO: chip: 8-1 53.612520 C 1141.874115 mV
11:11:20:ST3_smx:INFO: Electrons
11:11:20:ST3_smx:INFO: # loops 0
11:11:22:ST3_smx:INFO: # loops 1
11:11:23:ST3_smx:INFO: # loops 2
11:11:25:ST3_smx:INFO: Total # of broken channels: 0
11:11:25:ST3_smx:INFO: List of broken channels: []
11:11:25:ST3_smx:INFO: Total # of broken channels: 0
11:11:25:ST3_smx:INFO: List of broken channels: []
11:11:26:ST3_smx:INFO: Configuring SMX FAST
11:11:28:ST3_smx:INFO: chip: 3-2 50.430383 C 1153.732915 mV
11:11:28:ST3_smx:INFO: Electrons
11:11:28:ST3_smx:INFO: # loops 0
11:11:29:ST3_smx:INFO: # loops 1
11:11:31:ST3_smx:INFO: # loops 2
11:11:32:ST3_smx:INFO: Total # of broken channels: 0
11:11:32:ST3_smx:INFO: List of broken channels: []
11:11:32:ST3_smx:INFO: Total # of broken channels: 0
11:11:32:ST3_smx:INFO: List of broken channels: []
11:11:33:ST3_smx:INFO: Configuring SMX FAST
11:11:35:ST3_smx:INFO: chip: 10-3 34.556970 C 1212.728715 mV
11:11:35:ST3_smx:INFO: Electrons
11:11:35:ST3_smx:INFO: # loops 0
11:11:37:ST3_smx:INFO: # loops 1
11:11:38:ST3_smx:INFO: # loops 2
11:11:40:ST3_smx:INFO: Total # of broken channels: 0
11:11:40:ST3_smx:INFO: List of broken channels: []
11:11:40:ST3_smx:INFO: Total # of broken channels: 0
11:11:40:ST3_smx:INFO: List of broken channels: []
11:11:41:ST3_smx:INFO: Configuring SMX FAST
11:11:43:ST3_smx:INFO: chip: 5-4 34.556970 C 1206.851500 mV
11:11:43:ST3_smx:INFO: Electrons
11:11:43:ST3_smx:INFO: # loops 0
11:11:44:ST3_smx:INFO: # loops 1
11:11:46:ST3_smx:INFO: # loops 2
11:11:48:ST3_smx:INFO: Total # of broken channels: 0
11:11:48:ST3_smx:INFO: List of broken channels: []
11:11:48:ST3_smx:INFO: Total # of broken channels: 0
11:11:48:ST3_smx:INFO: List of broken channels: []
11:11:49:ST3_smx:INFO: Configuring SMX FAST
11:11:51:ST3_smx:INFO: chip: 12-5 50.430383 C 1159.654860 mV
11:11:51:ST3_smx:INFO: Electrons
11:11:51:ST3_smx:INFO: # loops 0
11:11:53:ST3_smx:INFO: # loops 1
11:11:54:ST3_smx:INFO: # loops 2
11:11:56:ST3_smx:INFO: Total # of broken channels: 0
11:11:56:ST3_smx:INFO: List of broken channels: []
11:11:56:ST3_smx:INFO: Total # of broken channels: 1
11:11:56:ST3_smx:INFO: List of broken channels: [19]
11:11:57:ST3_smx:INFO: Configuring SMX FAST
11:11:58:ST3_smx:INFO: chip: 7-6 53.612520 C 1153.732915 mV
11:11:58:ST3_smx:INFO: Electrons
11:11:58:ST3_smx:INFO: # loops 0
11:12:00:ST3_smx:INFO: # loops 1
11:12:02:ST3_smx:INFO: # loops 2
11:12:03:ST3_smx:INFO: Total # of broken channels: 0
11:12:03:ST3_smx:INFO: List of broken channels: []
11:12:03:ST3_smx:INFO: Total # of broken channels: 0
11:12:03:ST3_smx:INFO: List of broken channels: []
11:12:04:ST3_smx:INFO: Configuring SMX FAST
11:12:06:ST3_smx:INFO: chip: 14-7 56.797143 C 1147.806000 mV
11:12:06:ST3_smx:INFO: Electrons
11:12:06:ST3_smx:INFO: # loops 0
11:12:08:ST3_smx:INFO: # loops 1
11:12:10:ST3_smx:INFO: # loops 2
11:12:11:ST3_smx:INFO: Total # of broken channels: 0
11:12:11:ST3_smx:INFO: List of broken channels: []
11:12:11:ST3_smx:INFO: Total # of broken channels: 0
11:12:11:ST3_smx:INFO: List of broken channels: []
11:12:12:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:12:13:febtest:INFO: 01-00 | XA-000-08-001-064-062-120-15 | 40.9 | 1195.1
11:12:13:febtest:INFO: 08-01 | XA-000-08-001-064-047-064-07 | 56.8 | 1141.9
11:12:13:febtest:INFO: 03-02 | XA-000-08-001-064-062-152-14 | 53.6 | 1153.7
11:12:13:febtest:INFO: 10-03 | XA-000-08-001-064-047-072-07 | 37.7 | 1212.7
11:12:13:febtest:INFO: 05-04 | XA-000-08-003-000-001-049-00 | 37.7 | 1206.9
11:12:14:febtest:INFO: 12-05 | XA-000-08-001-064-047-104-09 | 50.4 | 1159.7
11:12:14:febtest:INFO: 07-06 | XA-000-08-001-064-047-032-12 | 53.6 | 1147.8
11:12:14:febtest:INFO: 14-07 | XA-000-08-001-064-047-040-12 | 56.8 | 1141.9
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_06_13-11_10_54
OPERATOR : Henrik;
SITE : KIT
SETUP : KIT_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L5UL101016 M5UL1B3010163A2 124 B
FEB_SN : 3026
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.450', '1.5040', '1.850', '2.2910', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9850', '1.850', '0.6000', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9810', '1.850', '0.3277', '0.000', '0.0000', '0.000', '0.0000']