14:39:30:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:39:30:ST3_Shared:INFO:	                         FEB-Sensor                         
14:39:30:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:39:32:ST3_ModuleSelector:INFO:	L5UL101016 M5UL1B1010161A2 42 A

14:39:32:ST3_ModuleSelector:INFO:	21432

14:39:32:febtest:INFO:	Testing FEB with SN 3027
14:39:35:smx_tester:INFO:	Scanning setup
14:39:35:elinks:INFO:	Disabling clock on downlink 0
14:39:35:elinks:INFO:	Disabling clock on downlink 1
14:39:35:elinks:INFO:	Disabling clock on downlink 2
14:39:35:elinks:INFO:	Disabling clock on downlink 3
14:39:35:elinks:INFO:	Disabling clock on downlink 4
14:39:35:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:39:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
14:39:35:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:39:35:elinks:INFO:	Disabling clock on downlink 0
14:39:35:elinks:INFO:	Disabling clock on downlink 1
14:39:35:elinks:INFO:	Disabling clock on downlink 2
14:39:35:elinks:INFO:	Disabling clock on downlink 3
14:39:35:elinks:INFO:	Disabling clock on downlink 4
14:39:35:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:39:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:39:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
14:39:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
14:39:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
14:39:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
14:39:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
14:39:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
14:39:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
14:39:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
14:39:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
14:39:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
14:39:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
14:39:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
14:39:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
14:39:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
14:39:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
14:39:35:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
14:39:35:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:39:35:elinks:INFO:	Disabling clock on downlink 0
14:39:35:elinks:INFO:	Disabling clock on downlink 1
14:39:35:elinks:INFO:	Disabling clock on downlink 2
14:39:35:elinks:INFO:	Disabling clock on downlink 3
14:39:35:elinks:INFO:	Disabling clock on downlink 4
14:39:35:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:39:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:39:35:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:39:35:elinks:INFO:	Disabling clock on downlink 0
14:39:35:elinks:INFO:	Disabling clock on downlink 1
14:39:35:elinks:INFO:	Disabling clock on downlink 2
14:39:35:elinks:INFO:	Disabling clock on downlink 3
14:39:35:elinks:INFO:	Disabling clock on downlink 4
14:39:35:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:39:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
14:39:36:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:39:36:elinks:INFO:	Disabling clock on downlink 0
14:39:36:elinks:INFO:	Disabling clock on downlink 1
14:39:36:elinks:INFO:	Disabling clock on downlink 2
14:39:36:elinks:INFO:	Disabling clock on downlink 3
14:39:36:elinks:INFO:	Disabling clock on downlink 4
14:39:36:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:39:36:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
14:39:36:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:39:36:setup_element:INFO:	Scanning clock phase
14:39:36:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:39:36:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:39:36:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
14:39:36:setup_element:INFO:	Eye window for uplink 0 : _________________________________________________________________________XXXXX__
Clock Delay: 35
14:39:36:setup_element:INFO:	Eye window for uplink 1 : _________________________________________________________________________XXXXX__
Clock Delay: 35
14:39:36:setup_element:INFO:	Eye window for uplink 2 : _________________________________________________________________________XXXXX__
Clock Delay: 35
14:39:36:setup_element:INFO:	Eye window for uplink 3 : _________________________________________________________________________XXXXX__
Clock Delay: 35
14:39:36:setup_element:INFO:	Eye window for uplink 4 : _________________________________________________________________________XXXXX__
Clock Delay: 35
14:39:36:setup_element:INFO:	Eye window for uplink 5 : _________________________________________________________________________XXXXX__
Clock Delay: 35
14:39:36:setup_element:INFO:	Eye window for uplink 6 : _________________________________________________________________________XXXX___
Clock Delay: 34
14:39:36:setup_element:INFO:	Eye window for uplink 7 : _________________________________________________________________________XXXX___
Clock Delay: 34
14:39:36:setup_element:INFO:	Eye window for uplink 8 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
14:39:36:setup_element:INFO:	Eye window for uplink 9 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
14:39:36:setup_element:INFO:	Eye window for uplink 10: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
14:39:36:setup_element:INFO:	Eye window for uplink 11: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
14:39:36:setup_element:INFO:	Eye window for uplink 12: ___________________________________________________________________________XXXXX
Clock Delay: 37
14:39:36:setup_element:INFO:	Eye window for uplink 13: ___________________________________________________________________________XXXXX
Clock Delay: 37
14:39:36:setup_element:INFO:	Eye window for uplink 14: __________________________________________________________________________XXXXX_
Clock Delay: 36
14:39:36:setup_element:INFO:	Eye window for uplink 15: __________________________________________________________________________XXXXX_
Clock Delay: 36
14:39:36:setup_element:INFO:	Setting the clock phase to 35 for group 0, downlink 1
14:39:36:setup_element:INFO:	Scanning data phases
14:39:36:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:39:36:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:39:41:setup_element:INFO:	Data phase scan results for group 0, downlink 1
14:39:41:setup_element:INFO:	Eye window for uplink 0 : _____XXXXX______________________________
Data delay found: 27
14:39:41:setup_element:INFO:	Eye window for uplink 1 : _XXXX___________________________________
Data delay found: 22
14:39:41:setup_element:INFO:	Eye window for uplink 2 : XXXXX___________________________________
Data delay found: 22
14:39:41:setup_element:INFO:	Eye window for uplink 3 : XX__________________________________XXXX
Data delay found: 18
14:39:41:setup_element:INFO:	Eye window for uplink 4 : X___________________________________XXXX
Data delay found: 18
14:39:41:setup_element:INFO:	Eye window for uplink 5 : ________________________________XXXXX___
Data delay found: 14
14:39:41:setup_element:INFO:	Eye window for uplink 6 : ______________________________XXXXX_____
Data delay found: 12
14:39:41:setup_element:INFO:	Eye window for uplink 7 : __________________________XXXXX_________
Data delay found: 8
14:39:41:setup_element:INFO:	Eye window for uplink 8 : ___________________XXXXXX_______________
Data delay found: 1
14:39:41:setup_element:INFO:	Eye window for uplink 9 : ________________________XXXXXX__________
Data delay found: 6
14:39:41:setup_element:INFO:	Eye window for uplink 10: _____________________XXXXXX_____________
Data delay found: 3
14:39:41:setup_element:INFO:	Eye window for uplink 11: _________________________XXXXX__________
Data delay found: 7
14:39:41:setup_element:INFO:	Eye window for uplink 12: ________________________XXXXXX__________
Data delay found: 6
14:39:41:setup_element:INFO:	Eye window for uplink 13: ____________________________XXXXX_______
Data delay found: 10
14:39:41:setup_element:INFO:	Eye window for uplink 14: ________________________XXXXX___________
Data delay found: 6
14:39:41:setup_element:INFO:	Eye window for uplink 15: __________________________XXXXX_________
Data delay found: 8
14:39:41:setup_element:INFO:	Setting the data phase to 27 for uplink 0
14:39:41:setup_element:INFO:	Setting the data phase to 22 for uplink 1
14:39:41:setup_element:INFO:	Setting the data phase to 22 for uplink 2
14:39:41:setup_element:INFO:	Setting the data phase to 18 for uplink 3
14:39:41:setup_element:INFO:	Setting the data phase to 18 for uplink 4
14:39:41:setup_element:INFO:	Setting the data phase to 14 for uplink 5
14:39:41:setup_element:INFO:	Setting the data phase to 12 for uplink 6
14:39:41:setup_element:INFO:	Setting the data phase to 8 for uplink 7
14:39:41:setup_element:INFO:	Setting the data phase to 1 for uplink 8
14:39:41:setup_element:INFO:	Setting the data phase to 6 for uplink 9
14:39:41:setup_element:INFO:	Setting the data phase to 3 for uplink 10
14:39:41:setup_element:INFO:	Setting the data phase to 7 for uplink 11
14:39:41:setup_element:INFO:	Setting the data phase to 6 for uplink 12
14:39:41:setup_element:INFO:	Setting the data phase to 10 for uplink 13
14:39:41:setup_element:INFO:	Setting the data phase to 6 for uplink 14
14:39:41:setup_element:INFO:	Setting the data phase to 8 for uplink 15
14:39:41:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 35
    Window Length: 72
    Eye Windows:
      Uplink  0: _________________________________________________________________________XXXXX__
      Uplink  1: _________________________________________________________________________XXXXX__
      Uplink  2: _________________________________________________________________________XXXXX__
      Uplink  3: _________________________________________________________________________XXXXX__
      Uplink  4: _________________________________________________________________________XXXXX__
      Uplink  5: _________________________________________________________________________XXXXX__
      Uplink  6: _________________________________________________________________________XXXX___
      Uplink  7: _________________________________________________________________________XXXX___
      Uplink  8: _________________________________________________________________________XXXXXX_
      Uplink  9: _________________________________________________________________________XXXXXX_
      Uplink 10: ________________________________________________________________________XXXXXXX_
      Uplink 11: ________________________________________________________________________XXXXXXX_
      Uplink 12: ___________________________________________________________________________XXXXX
      Uplink 13: ___________________________________________________________________________XXXXX
      Uplink 14: __________________________________________________________________________XXXXX_
      Uplink 15: __________________________________________________________________________XXXXX_
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 1:
      Optimal Phase: 22
      Window Length: 36
      Eye Window: _XXXX___________________________________
    Uplink 2:
      Optimal Phase: 22
      Window Length: 35
      Eye Window: XXXXX___________________________________
    Uplink 3:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 4:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXXX
    Uplink 5:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 6:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 7:
      Optimal Phase: 8
      Window Length: 35
      Eye Window: __________________________XXXXX_________
    Uplink 8:
      Optimal Phase: 1
      Window Length: 34
      Eye Window: ___________________XXXXXX_______________
    Uplink 9:
      Optimal Phase: 6
      Window Length: 34
      Eye Window: ________________________XXXXXX__________
    Uplink 10:
      Optimal Phase: 3
      Window Length: 34
      Eye Window: _____________________XXXXXX_____________
    Uplink 11:
      Optimal Phase: 7
      Window Length: 35
      Eye Window: _________________________XXXXX__________
    Uplink 12:
      Optimal Phase: 6
      Window Length: 34
      Eye Window: ________________________XXXXXX__________
    Uplink 13:
      Optimal Phase: 10
      Window Length: 35
      Eye Window: ____________________________XXXXX_______
    Uplink 14:
      Optimal Phase: 6
      Window Length: 35
      Eye Window: ________________________XXXXX___________
    Uplink 15:
      Optimal Phase: 8
      Window Length: 35
      Eye Window: __________________________XXXXX_________
]
14:39:41:setup_element:INFO:	Beginning SMX ASICs map scan
14:39:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:39:41:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:39:41:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
14:39:41:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
14:39:41:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:39:41:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
14:39:41:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
14:39:41:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:39:41:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:39:42:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
14:39:42:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
14:39:42:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:39:42:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:39:42:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
14:39:42:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
14:39:42:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:39:42:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:39:42:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
14:39:42:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
14:39:43:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:39:43:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:39:44:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 35
    Window Length: 72
    Eye Windows:
      Uplink  0: _________________________________________________________________________XXXXX__
      Uplink  1: _________________________________________________________________________XXXXX__
      Uplink  2: _________________________________________________________________________XXXXX__
      Uplink  3: _________________________________________________________________________XXXXX__
      Uplink  4: _________________________________________________________________________XXXXX__
      Uplink  5: _________________________________________________________________________XXXXX__
      Uplink  6: _________________________________________________________________________XXXX___
      Uplink  7: _________________________________________________________________________XXXX___
      Uplink  8: _________________________________________________________________________XXXXXX_
      Uplink  9: _________________________________________________________________________XXXXXX_
      Uplink 10: ________________________________________________________________________XXXXXXX_
      Uplink 11: ________________________________________________________________________XXXXXXX_
      Uplink 12: ___________________________________________________________________________XXXXX
      Uplink 13: ___________________________________________________________________________XXXXX
      Uplink 14: __________________________________________________________________________XXXXX_
      Uplink 15: __________________________________________________________________________XXXXX_
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 1:
      Optimal Phase: 22
      Window Length: 36
      Eye Window: _XXXX___________________________________
    Uplink 2:
      Optimal Phase: 22
      Window Length: 35
      Eye Window: XXXXX___________________________________
    Uplink 3:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 4:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXXX
    Uplink 5:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 6:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 7:
      Optimal Phase: 8
      Window Length: 35
      Eye Window: __________________________XXXXX_________
    Uplink 8:
      Optimal Phase: 1
      Window Length: 34
      Eye Window: ___________________XXXXXX_______________
    Uplink 9:
      Optimal Phase: 6
      Window Length: 34
      Eye Window: ________________________XXXXXX__________
    Uplink 10:
      Optimal Phase: 3
      Window Length: 34
      Eye Window: _____________________XXXXXX_____________
    Uplink 11:
      Optimal Phase: 7
      Window Length: 35
      Eye Window: _________________________XXXXX__________
    Uplink 12:
      Optimal Phase: 6
      Window Length: 34
      Eye Window: ________________________XXXXXX__________
    Uplink 13:
      Optimal Phase: 10
      Window Length: 35
      Eye Window: ____________________________XXXXX_______
    Uplink 14:
      Optimal Phase: 6
      Window Length: 35
      Eye Window: ________________________XXXXX___________
    Uplink 15:
      Optimal Phase: 8
      Window Length: 35
      Eye Window: __________________________XXXXX_________

14:39:44:setup_element:INFO:	Performing Elink synchronization
14:39:44:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:39:44:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:39:44:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
14:39:44:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
14:39:44:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
14:39:44:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:39:44:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  1  |  0  |     [1]      |   [(0, 1), (1, 0)] 
   1  |   [0]   |  1  |  0  |     [8]      |   [(0, 8), (1, 9)] 
   2  |   [0]   |  1  |  0  |     [3]      |   [(0, 3), (1, 2)] 
   3  |   [0]   |  1  |  0  |     [10]     |  [(0, 10), (1, 11)]
   4  |   [0]   |  1  |  0  |     [5]      |   [(0, 5), (1, 4)] 
   5  |   [0]   |  1  |  0  |     [12]     |  [(0, 12), (1, 13)]
   6  |   [0]   |  1  |  0  |     [7]      |   [(0, 7), (1, 6)] 
   7  |   [0]   |  1  |  0  |     [14]     |  [(0, 14), (1, 15)]
FEB type: A FEB_A: 1 FEB_B: 0
14:39:45:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:39:45:febtest:INFO:	01-00 | XA-000-08-003-000-000-021-03 |  50.4 | 1153.7
14:39:46:febtest:INFO:	08-01 | XA-000-08-001-064-046-144-02 |  60.0 | 1135.9
14:39:46:febtest:INFO:	03-02 | XA-000-08-003-000-000-014-04 |  40.9 | 1195.1
14:39:46:febtest:INFO:	10-03 | XA-000-08-001-064-046-136-05 |  56.8 | 1147.8
14:39:46:febtest:INFO:	05-04 | XA-000-08-003-000-000-015-04 |  53.6 | 1141.9
14:39:46:febtest:INFO:	12-05 | XA-000-08-001-064-046-176-12 |  34.6 | 1212.7
14:39:47:febtest:INFO:	07-06 | XA-000-08-003-000-000-016-03 |  47.3 | 1165.6
14:39:47:febtest:INFO:	14-07 | XA-000-08-001-064-046-120-03 |  56.8 | 1147.8
14:39:47:ST3_smx:INFO:	Configuring SMX FAST
14:39:49:ST3_smx:INFO:	chip: 1-0 	 50.430383 C 	 1153.732915 mV
14:39:49:ST3_smx:INFO:		Electrons
14:39:49:ST3_smx:INFO:	# loops 0
14:39:51:ST3_smx:INFO:	# loops 1
14:39:52:ST3_smx:INFO:	# loops 2
14:39:54:ST3_smx:INFO:	Total # of broken channels: 0
14:39:54:ST3_smx:INFO:	List of broken channels: []
14:39:54:ST3_smx:INFO:	Total # of broken channels: 0
14:39:54:ST3_smx:INFO:	List of broken channels: []
14:39:55:ST3_smx:INFO:	Configuring SMX FAST
14:39:57:ST3_smx:INFO:	chip: 8-1 	 53.612520 C 	 1153.732915 mV
14:39:57:ST3_smx:INFO:		Electrons
14:39:57:ST3_smx:INFO:	# loops 0
14:39:58:ST3_smx:INFO:	# loops 1
14:40:00:ST3_smx:INFO:	# loops 2
14:40:02:ST3_smx:INFO:	Total # of broken channels: 0
14:40:02:ST3_smx:INFO:	List of broken channels: []
14:40:02:ST3_smx:INFO:	Total # of broken channels: 0
14:40:02:ST3_smx:INFO:	List of broken channels: []
14:40:02:ST3_smx:INFO:	Configuring SMX FAST
14:40:04:ST3_smx:INFO:	chip: 3-2 	 53.612520 C 	 1153.732915 mV
14:40:04:ST3_smx:INFO:		Electrons
14:40:04:ST3_smx:INFO:	# loops 0
14:40:06:ST3_smx:INFO:	# loops 1
14:40:08:ST3_smx:INFO:	# loops 2
14:40:09:ST3_smx:INFO:	Total # of broken channels: 0
14:40:09:ST3_smx:INFO:	List of broken channels: []
14:40:09:ST3_smx:INFO:	Total # of broken channels: 0
14:40:09:ST3_smx:INFO:	List of broken channels: []
14:40:10:ST3_smx:INFO:	Configuring SMX FAST
14:40:12:ST3_smx:INFO:	chip: 10-3 	 53.612520 C 	 1171.483840 mV
14:40:12:ST3_smx:INFO:		Electrons
14:40:12:ST3_smx:INFO:	# loops 0
14:40:14:ST3_smx:INFO:	# loops 1
14:40:15:ST3_smx:INFO:	# loops 2
14:40:17:ST3_smx:INFO:	Total # of broken channels: 0
14:40:17:ST3_smx:INFO:	List of broken channels: []
14:40:17:ST3_smx:INFO:	Total # of broken channels: 0
14:40:17:ST3_smx:INFO:	List of broken channels: []
14:40:18:ST3_smx:INFO:	Configuring SMX FAST
14:40:20:ST3_smx:INFO:	chip: 5-4 	 56.797143 C 	 1135.937260 mV
14:40:20:ST3_smx:INFO:		Electrons
14:40:20:ST3_smx:INFO:	# loops 0
14:40:22:ST3_smx:INFO:	# loops 1
14:40:23:ST3_smx:INFO:	# loops 2
14:40:25:ST3_smx:INFO:	Total # of broken channels: 0
14:40:25:ST3_smx:INFO:	List of broken channels: []
14:40:25:ST3_smx:INFO:	Total # of broken channels: 0
14:40:25:ST3_smx:INFO:	List of broken channels: []
14:40:26:ST3_smx:INFO:	Configuring SMX FAST
14:40:28:ST3_smx:INFO:	chip: 12-5 	 47.250730 C 	 1183.292940 mV
14:40:28:ST3_smx:INFO:		Electrons
14:40:28:ST3_smx:INFO:	# loops 0
14:40:29:ST3_smx:INFO:	# loops 1
14:40:31:ST3_smx:INFO:	# loops 2
14:40:32:ST3_smx:INFO:	Total # of broken channels: 0
14:40:32:ST3_smx:INFO:	List of broken channels: []
14:40:32:ST3_smx:INFO:	Total # of broken channels: 0
14:40:32:ST3_smx:INFO:	List of broken channels: []
14:40:33:ST3_smx:INFO:	Configuring SMX FAST
14:40:35:ST3_smx:INFO:	chip: 7-6 	 66.365920 C 	 1118.096875 mV
14:40:35:ST3_smx:INFO:		Electrons
14:40:35:ST3_smx:INFO:	# loops 0
14:40:37:ST3_smx:INFO:	# loops 1
14:40:38:ST3_smx:INFO:	# loops 2
14:40:40:ST3_smx:INFO:	Total # of broken channels: 0
14:40:40:ST3_smx:INFO:	List of broken channels: []
14:40:40:ST3_smx:INFO:	Total # of broken channels: 0
14:40:40:ST3_smx:INFO:	List of broken channels: []
14:40:41:ST3_smx:INFO:	Configuring SMX FAST
14:40:42:ST3_smx:INFO:	chip: 14-7 	 56.797143 C 	 1165.571835 mV
14:40:42:ST3_smx:INFO:		Electrons
14:40:42:ST3_smx:INFO:	# loops 0
14:40:44:ST3_smx:INFO:	# loops 1
14:40:46:ST3_smx:INFO:	# loops 2
14:40:47:ST3_smx:INFO:	Total # of broken channels: 0
14:40:47:ST3_smx:INFO:	List of broken channels: []
14:40:47:ST3_smx:INFO:	Total # of broken channels: 0
14:40:47:ST3_smx:INFO:	List of broken channels: []
14:40:48:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:40:48:febtest:INFO:	01-00 | XA-000-08-003-000-000-021-03 |  53.6 | 1159.7
14:40:48:febtest:INFO:	08-01 | XA-000-08-001-064-046-144-02 |  56.8 | 1153.7
14:40:49:febtest:INFO:	03-02 | XA-000-08-003-000-000-014-04 |  53.6 | 1153.7
14:40:49:febtest:INFO:	10-03 | XA-000-08-001-064-046-136-05 |  53.6 | 1171.5
14:40:49:febtest:INFO:	05-04 | XA-000-08-003-000-000-015-04 |  60.0 | 1135.9
14:40:49:febtest:INFO:	12-05 | XA-000-08-001-064-046-176-12 |  47.3 | 1177.4
14:40:49:febtest:INFO:	07-06 | XA-000-08-003-000-000-016-03 |  66.4 | 1118.1
14:40:50:febtest:INFO:	14-07 | XA-000-08-001-064-046-120-03 |  56.8 | 1165.6
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_06_14-14_39_30
OPERATOR  : Henrik; 
SITE      : KIT
SETUP     : KIT_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L5UL101016 M5UL1B1010161A2 42 A

FEB_SN : 3027
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID:	21432

MODULE_NAME:	L5UL101016 M5UL1B1010161A2 42 A

MODULE_TYPE:	
MODULE_LADDER:	L5UL101016
MODULE_MODULE:	M5UL1B1010161A2
MODULE_SIZE:	42
MODULE_GRADE:	A
---------------------------------------
VI_before_Init : ['2.450', '1.8940', '1.850', '0.4669', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0140', '1.850', '0.6122', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '2.0030', '1.850', '0.3263', '0.000', '0.0000', '0.000', '0.0000']