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FEB_3027 13.06.24 07:38:58
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07:38:58:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:38:58:ST3_Shared:INFO: FEB-Microcable
07:38:58:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:38:59:febtest:INFO: Testing FEB with SN 3027
07:39:01:smx_tester:INFO: Scanning setup
07:39:01:elinks:INFO: Disabling clock on downlink 0
07:39:01:elinks:INFO: Disabling clock on downlink 1
07:39:01:elinks:INFO: Disabling clock on downlink 2
07:39:01:elinks:INFO: Disabling clock on downlink 3
07:39:01:elinks:INFO: Disabling clock on downlink 4
07:39:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:39:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:39:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:39:01:elinks:INFO: Disabling clock on downlink 0
07:39:01:elinks:INFO: Disabling clock on downlink 1
07:39:01:elinks:INFO: Disabling clock on downlink 2
07:39:01:elinks:INFO: Disabling clock on downlink 3
07:39:01:elinks:INFO: Disabling clock on downlink 4
07:39:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:39:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:39:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
07:39:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
07:39:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
07:39:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
07:39:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
07:39:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
07:39:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
07:39:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
07:39:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
07:39:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
07:39:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
07:39:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
07:39:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
07:39:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
07:39:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
07:39:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
07:39:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:39:02:elinks:INFO: Disabling clock on downlink 0
07:39:02:elinks:INFO: Disabling clock on downlink 1
07:39:02:elinks:INFO: Disabling clock on downlink 2
07:39:02:elinks:INFO: Disabling clock on downlink 3
07:39:02:elinks:INFO: Disabling clock on downlink 4
07:39:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:39:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:39:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:39:02:elinks:INFO: Disabling clock on downlink 0
07:39:02:elinks:INFO: Disabling clock on downlink 1
07:39:02:elinks:INFO: Disabling clock on downlink 2
07:39:02:elinks:INFO: Disabling clock on downlink 3
07:39:02:elinks:INFO: Disabling clock on downlink 4
07:39:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:39:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
07:39:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:39:02:elinks:INFO: Disabling clock on downlink 0
07:39:02:elinks:INFO: Disabling clock on downlink 1
07:39:02:elinks:INFO: Disabling clock on downlink 2
07:39:02:elinks:INFO: Disabling clock on downlink 3
07:39:02:elinks:INFO: Disabling clock on downlink 4
07:39:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:39:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
07:39:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:39:02:setup_element:INFO: Scanning clock phase
07:39:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:39:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:39:02:setup_element:INFO: Clock phase scan results for group 0, downlink 1
07:39:02:setup_element:INFO: Eye window for uplink 0 : _________________________________________________________________________XXXXX__
Clock Delay: 35
07:39:02:setup_element:INFO: Eye window for uplink 1 : _________________________________________________________________________XXXXX__
Clock Delay: 35
07:39:02:setup_element:INFO: Eye window for uplink 2 : _________________________________________________________________________XXXXX__
Clock Delay: 35
07:39:02:setup_element:INFO: Eye window for uplink 3 : _________________________________________________________________________XXXXX__
Clock Delay: 35
07:39:02:setup_element:INFO: Eye window for uplink 4 : _________________________________________________________________________XXXX___
Clock Delay: 34
07:39:02:setup_element:INFO: Eye window for uplink 5 : _________________________________________________________________________XXXX___
Clock Delay: 34
07:39:02:setup_element:INFO: Eye window for uplink 6 : __________________________________________________________________________XXX___
Clock Delay: 35
07:39:02:setup_element:INFO: Eye window for uplink 7 : __________________________________________________________________________XXX___
Clock Delay: 35
07:39:02:setup_element:INFO: Eye window for uplink 8 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
07:39:02:setup_element:INFO: Eye window for uplink 9 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
07:39:02:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:39:02:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:39:02:setup_element:INFO: Eye window for uplink 12: X_________________________________________________________________________XXXXXX
Clock Delay: 37
07:39:02:setup_element:INFO: Eye window for uplink 13: X_________________________________________________________________________XXXXXX
Clock Delay: 37
07:39:02:setup_element:INFO: Eye window for uplink 14: __________________________________________________________________________XXXXXX
Clock Delay: 36
07:39:02:setup_element:INFO: Eye window for uplink 15: __________________________________________________________________________XXXXXX
Clock Delay: 36
07:39:02:setup_element:INFO: Setting the clock phase to 36 for group 0, downlink 1
07:39:02:setup_element:INFO: Scanning data phases
07:39:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:39:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:39:08:setup_element:INFO: Data phase scan results for group 0, downlink 1
07:39:08:setup_element:INFO: Eye window for uplink 0 : _____XXXXX______________________________
Data delay found: 27
07:39:08:setup_element:INFO: Eye window for uplink 1 : _XXXXX__________________________________
Data delay found: 23
07:39:08:setup_element:INFO: Eye window for uplink 2 : XXXXX__________________________________X
Data delay found: 21
07:39:08:setup_element:INFO: Eye window for uplink 3 : X___________________________________XXXX
Data delay found: 18
07:39:08:setup_element:INFO: Eye window for uplink 4 : X__________________________________XXXXX
Data delay found: 17
07:39:08:setup_element:INFO: Eye window for uplink 5 : ________________________________XXXX____
Data delay found: 13
07:39:08:setup_element:INFO: Eye window for uplink 6 : ______________________________XXXXX_____
Data delay found: 12
07:39:08:setup_element:INFO: Eye window for uplink 7 : __________________________XXXXX_________
Data delay found: 8
07:39:08:setup_element:INFO: Eye window for uplink 8 : ___________________XXXXXX_______________
Data delay found: 1
07:39:08:setup_element:INFO: Eye window for uplink 9 : ________________________XXXXXX__________
Data delay found: 6
07:39:08:setup_element:INFO: Eye window for uplink 10: _____________________XXXXXX_____________
Data delay found: 3
07:39:08:setup_element:INFO: Eye window for uplink 11: _________________________XXXXX__________
Data delay found: 7
07:39:08:setup_element:INFO: Eye window for uplink 12: _________________________XXXXX__________
Data delay found: 7
07:39:08:setup_element:INFO: Eye window for uplink 13: _____________________________XXXXX______
Data delay found: 11
07:39:08:setup_element:INFO: Eye window for uplink 14: ________________________XXXXX___________
Data delay found: 6
07:39:08:setup_element:INFO: Eye window for uplink 15: ___________________________XXXXX________
Data delay found: 9
07:39:08:setup_element:INFO: Setting the data phase to 27 for uplink 0
07:39:08:setup_element:INFO: Setting the data phase to 23 for uplink 1
07:39:08:setup_element:INFO: Setting the data phase to 21 for uplink 2
07:39:08:setup_element:INFO: Setting the data phase to 18 for uplink 3
07:39:08:setup_element:INFO: Setting the data phase to 17 for uplink 4
07:39:08:setup_element:INFO: Setting the data phase to 13 for uplink 5
07:39:08:setup_element:INFO: Setting the data phase to 12 for uplink 6
07:39:08:setup_element:INFO: Setting the data phase to 8 for uplink 7
07:39:08:setup_element:INFO: Setting the data phase to 1 for uplink 8
07:39:08:setup_element:INFO: Setting the data phase to 6 for uplink 9
07:39:08:setup_element:INFO: Setting the data phase to 3 for uplink 10
07:39:08:setup_element:INFO: Setting the data phase to 7 for uplink 11
07:39:08:setup_element:INFO: Setting the data phase to 7 for uplink 12
07:39:08:setup_element:INFO: Setting the data phase to 11 for uplink 13
07:39:08:setup_element:INFO: Setting the data phase to 6 for uplink 14
07:39:08:setup_element:INFO: Setting the data phase to 9 for uplink 15
07:39:08:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 36
Window Length: 71
Eye Windows:
Uplink 0: _________________________________________________________________________XXXXX__
Uplink 1: _________________________________________________________________________XXXXX__
Uplink 2: _________________________________________________________________________XXXXX__
Uplink 3: _________________________________________________________________________XXXXX__
Uplink 4: _________________________________________________________________________XXXX___
Uplink 5: _________________________________________________________________________XXXX___
Uplink 6: __________________________________________________________________________XXX___
Uplink 7: __________________________________________________________________________XXX___
Uplink 8: _________________________________________________________________________XXXXXX_
Uplink 9: _________________________________________________________________________XXXXXX_
Uplink 10: ________________________________________________________________________XXXXXX__
Uplink 11: ________________________________________________________________________XXXXXX__
Uplink 12: X_________________________________________________________________________XXXXXX
Uplink 13: X_________________________________________________________________________XXXXXX
Uplink 14: __________________________________________________________________________XXXXXX
Uplink 15: __________________________________________________________________________XXXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 1:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 2:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 3:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 4:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 5:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 6:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 7:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 8:
Optimal Phase: 1
Window Length: 34
Eye Window: ___________________XXXXXX_______________
Uplink 9:
Optimal Phase: 6
Window Length: 34
Eye Window: ________________________XXXXXX__________
Uplink 10:
Optimal Phase: 3
Window Length: 34
Eye Window: _____________________XXXXXX_____________
Uplink 11:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 12:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 13:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 14:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 15:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
]
07:39:08:setup_element:INFO: Beginning SMX ASICs map scan
07:39:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:39:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:39:08:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
07:39:08:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
07:39:08:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
07:39:08:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
07:39:08:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
07:39:08:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
07:39:08:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
07:39:08:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
07:39:08:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
07:39:08:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
07:39:08:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
07:39:09:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
07:39:09:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
07:39:09:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
07:39:09:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
07:39:09:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
07:39:09:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
07:39:09:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
07:39:09:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
07:39:11:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 36
Window Length: 71
Eye Windows:
Uplink 0: _________________________________________________________________________XXXXX__
Uplink 1: _________________________________________________________________________XXXXX__
Uplink 2: _________________________________________________________________________XXXXX__
Uplink 3: _________________________________________________________________________XXXXX__
Uplink 4: _________________________________________________________________________XXXX___
Uplink 5: _________________________________________________________________________XXXX___
Uplink 6: __________________________________________________________________________XXX___
Uplink 7: __________________________________________________________________________XXX___
Uplink 8: _________________________________________________________________________XXXXXX_
Uplink 9: _________________________________________________________________________XXXXXX_
Uplink 10: ________________________________________________________________________XXXXXX__
Uplink 11: ________________________________________________________________________XXXXXX__
Uplink 12: X_________________________________________________________________________XXXXXX
Uplink 13: X_________________________________________________________________________XXXXXX
Uplink 14: __________________________________________________________________________XXXXXX
Uplink 15: __________________________________________________________________________XXXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 1:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 2:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 3:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 4:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 5:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 6:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 7:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 8:
Optimal Phase: 1
Window Length: 34
Eye Window: ___________________XXXXXX_______________
Uplink 9:
Optimal Phase: 6
Window Length: 34
Eye Window: ________________________XXXXXX__________
Uplink 10:
Optimal Phase: 3
Window Length: 34
Eye Window: _____________________XXXXXX_____________
Uplink 11:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 12:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 13:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 14:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 15:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
07:39:11:setup_element:INFO: Performing Elink synchronization
07:39:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:39:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:39:11:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
07:39:11:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
07:39:11:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
07:39:11:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
07:39:11:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4_5 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_4__upli_5
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_6__upli_7
FEB type: A FEB_A: 1 FEB_B: 0
07:39:12:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:39:12:febtest:INFO: 01-00 | XA-000-08-003-000-000-021-03 | 50.4 | 1153.7
07:39:12:febtest:INFO: 08-01 | XA-000-08-001-064-046-144-02 | 60.0 | 1130.0
07:39:13:febtest:INFO: 03-02 | XA-000-08-003-000-000-014-04 | 40.9 | 1201.0
07:39:13:febtest:INFO: 10-03 | XA-000-08-001-064-046-136-05 | 56.8 | 1153.7
07:39:13:febtest:INFO: 05-04 | XA-000-08-003-000-000-015-04 | 53.6 | 1147.8
07:39:13:febtest:INFO: 12-05 | XA-000-08-001-064-046-176-12 | 34.6 | 1212.7
07:39:14:febtest:INFO: 07-06 | XA-000-08-003-000-000-016-03 | 47.3 | 1171.5
07:39:14:febtest:INFO: 14-07 | XA-000-08-001-064-046-120-03 | 53.6 | 1147.8
07:39:14:ST3_smx:INFO: Configuring SMX FAST
07:39:16:ST3_smx:INFO: chip: 1-0 50.430383 C 1153.732915 mV
07:39:16:ST3_smx:INFO: Electrons
07:39:16:ST3_smx:INFO: # loops 0
07:39:18:ST3_smx:INFO: # loops 1
07:39:20:ST3_smx:INFO: # loops 2
07:39:22:ST3_smx:INFO: Total # of broken channels: 0
07:39:22:ST3_smx:INFO: List of broken channels: []
07:39:22:ST3_smx:INFO: Total # of broken channels: 0
07:39:22:ST3_smx:INFO: List of broken channels: []
07:39:23:ST3_smx:INFO: Configuring SMX FAST
07:39:25:ST3_smx:INFO: chip: 8-1 53.612520 C 1153.732915 mV
07:39:25:ST3_smx:INFO: Electrons
07:39:25:ST3_smx:INFO: # loops 0
07:39:27:ST3_smx:INFO: # loops 1
07:39:29:ST3_smx:INFO: # loops 2
07:39:31:ST3_smx:INFO: Total # of broken channels: 0
07:39:31:ST3_smx:INFO: List of broken channels: []
07:39:31:ST3_smx:INFO: Total # of broken channels: 0
07:39:31:ST3_smx:INFO: List of broken channels: []
07:39:32:ST3_smx:INFO: Configuring SMX FAST
07:39:34:ST3_smx:INFO: chip: 3-2 56.797143 C 1153.732915 mV
07:39:34:ST3_smx:INFO: Electrons
07:39:34:ST3_smx:INFO: # loops 0
07:39:36:ST3_smx:INFO: # loops 1
07:39:38:ST3_smx:INFO: # loops 2
07:39:40:ST3_smx:INFO: Total # of broken channels: 0
07:39:40:ST3_smx:INFO: List of broken channels: []
07:39:40:ST3_smx:INFO: Total # of broken channels: 0
07:39:40:ST3_smx:INFO: List of broken channels: []
07:39:41:ST3_smx:INFO: Configuring SMX FAST
07:39:43:ST3_smx:INFO: chip: 10-3 53.612520 C 1171.483840 mV
07:39:43:ST3_smx:INFO: Electrons
07:39:43:ST3_smx:INFO: # loops 0
07:39:45:ST3_smx:INFO: # loops 1
07:39:48:ST3_smx:INFO: # loops 2
07:39:50:ST3_smx:INFO: Total # of broken channels: 0
07:39:50:ST3_smx:INFO: List of broken channels: []
07:39:50:ST3_smx:INFO: Total # of broken channels: 0
07:39:50:ST3_smx:INFO: List of broken channels: []
07:39:50:ST3_smx:INFO: Configuring SMX FAST
07:39:53:ST3_smx:INFO: chip: 5-4 59.984250 C 1135.937260 mV
07:39:53:ST3_smx:INFO: Electrons
07:39:53:ST3_smx:INFO: # loops 0
07:39:55:ST3_smx:INFO: # loops 1
07:39:57:ST3_smx:INFO: # loops 2
07:40:00:ST3_smx:INFO: Total # of broken channels: 0
07:40:00:ST3_smx:INFO: List of broken channels: []
07:40:00:ST3_smx:INFO: Total # of broken channels: 0
07:40:00:ST3_smx:INFO: List of broken channels: []
07:40:00:ST3_smx:INFO: Configuring SMX FAST
07:40:03:ST3_smx:INFO: chip: 12-5 47.250730 C 1183.292940 mV
07:40:03:ST3_smx:INFO: Electrons
07:40:03:ST3_smx:INFO: # loops 0
07:40:05:ST3_smx:INFO: # loops 1
07:40:07:ST3_smx:INFO: # loops 2
07:40:09:ST3_smx:INFO: Total # of broken channels: 0
07:40:10:ST3_smx:INFO: List of broken channels: []
07:40:10:ST3_smx:INFO: Total # of broken channels: 0
07:40:10:ST3_smx:INFO: List of broken channels: []
07:40:10:ST3_smx:INFO: Configuring SMX FAST
07:40:13:ST3_smx:INFO: chip: 7-6 63.173842 C 1118.096875 mV
07:40:13:ST3_smx:INFO: Electrons
07:40:13:ST3_smx:INFO: # loops 0
07:40:15:ST3_smx:INFO: # loops 1
07:40:17:ST3_smx:INFO: # loops 2
07:40:19:ST3_smx:INFO: Total # of broken channels: 0
07:40:19:ST3_smx:INFO: List of broken channels: []
07:40:19:ST3_smx:INFO: Total # of broken channels: 0
07:40:19:ST3_smx:INFO: List of broken channels: []
07:40:20:ST3_smx:INFO: Configuring SMX FAST
07:40:22:ST3_smx:INFO: chip: 14-7 53.612520 C 1159.654860 mV
07:40:22:ST3_smx:INFO: Electrons
07:40:22:ST3_smx:INFO: # loops 0
07:40:24:ST3_smx:INFO: # loops 1
07:40:26:ST3_smx:INFO: # loops 2
07:40:28:ST3_smx:INFO: Total # of broken channels: 0
07:40:28:ST3_smx:INFO: List of broken channels: []
07:40:28:ST3_smx:INFO: Total # of broken channels: 0
07:40:28:ST3_smx:INFO: List of broken channels: []
07:40:29:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:40:29:febtest:INFO: 01-00 | XA-000-08-003-000-000-021-03 | 53.6 | 1159.7
07:40:30:febtest:INFO: 08-01 | XA-000-08-001-064-046-144-02 | 56.8 | 1153.7
07:40:30:febtest:INFO: 03-02 | XA-000-08-003-000-000-014-04 | 56.8 | 1153.7
07:40:30:febtest:INFO: 10-03 | XA-000-08-001-064-046-136-05 | 53.6 | 1171.5
07:40:30:febtest:INFO: 05-04 | XA-000-08-003-000-000-015-04 | 60.0 | 1135.9
07:40:31:febtest:INFO: 12-05 | XA-000-08-001-064-046-176-12 | 47.3 | 1177.4
07:40:31:febtest:INFO: 07-06 | XA-000-08-003-000-000-016-03 | 63.2 | 1118.1
07:40:31:febtest:INFO: 14-07 | XA-000-08-001-064-046-120-03 | 53.6 | 1159.7
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_06_13-07_38_58
OPERATOR : Benjamin;
SITE : KIT
SETUP : KIT_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L5UL101016 M5UL1B2010162A2 62 A
FEB_SN : 3027
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.450', '1.9600', '1.852', '2.0240', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0050', '1.850', '0.5071', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '2.0010', '1.850', '0.3258', '0.000', '0.0000', '0.000', '0.0000']