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FEB_3028 12.06.24 11:22:04
Info
11:22:04:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:22:04:ST3_Shared:INFO: FEB-Microcable
11:22:04:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:22:04:febtest:INFO: Testing FEB with SN 3028
11:22:07:smx_tester:INFO: Scanning setup
11:22:07:elinks:INFO: Disabling clock on downlink 0
11:22:07:elinks:INFO: Disabling clock on downlink 1
11:22:07:elinks:INFO: Disabling clock on downlink 2
11:22:07:elinks:INFO: Disabling clock on downlink 3
11:22:07:elinks:INFO: Disabling clock on downlink 4
11:22:07:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:22:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:22:07:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:22:07:elinks:INFO: Disabling clock on downlink 0
11:22:07:elinks:INFO: Disabling clock on downlink 1
11:22:07:elinks:INFO: Disabling clock on downlink 2
11:22:07:elinks:INFO: Disabling clock on downlink 3
11:22:07:elinks:INFO: Disabling clock on downlink 4
11:22:07:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:22:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:22:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
11:22:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
11:22:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
11:22:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
11:22:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
11:22:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
11:22:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
11:22:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
11:22:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
11:22:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
11:22:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
11:22:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
11:22:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
11:22:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
11:22:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
11:22:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
11:22:07:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:22:07:elinks:INFO: Disabling clock on downlink 0
11:22:07:elinks:INFO: Disabling clock on downlink 1
11:22:07:elinks:INFO: Disabling clock on downlink 2
11:22:07:elinks:INFO: Disabling clock on downlink 3
11:22:07:elinks:INFO: Disabling clock on downlink 4
11:22:07:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:22:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:22:07:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:22:07:elinks:INFO: Disabling clock on downlink 0
11:22:07:elinks:INFO: Disabling clock on downlink 1
11:22:07:elinks:INFO: Disabling clock on downlink 2
11:22:07:elinks:INFO: Disabling clock on downlink 3
11:22:07:elinks:INFO: Disabling clock on downlink 4
11:22:07:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:22:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:22:07:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:22:07:elinks:INFO: Disabling clock on downlink 0
11:22:07:elinks:INFO: Disabling clock on downlink 1
11:22:08:elinks:INFO: Disabling clock on downlink 2
11:22:08:elinks:INFO: Disabling clock on downlink 3
11:22:08:elinks:INFO: Disabling clock on downlink 4
11:22:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:22:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:22:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:22:08:setup_element:INFO: Scanning clock phase
11:22:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:22:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:22:08:setup_element:INFO: Clock phase scan results for group 0, downlink 1
11:22:08:setup_element:INFO: Eye window for uplink 0 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
11:22:08:setup_element:INFO: Eye window for uplink 1 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
11:22:08:setup_element:INFO: Eye window for uplink 2 : __________________________________________________________________________XXXXX_
Clock Delay: 36
11:22:08:setup_element:INFO: Eye window for uplink 3 : __________________________________________________________________________XXXXX_
Clock Delay: 36
11:22:08:setup_element:INFO: Eye window for uplink 4 : __________________________________________________________________________XXXXX_
Clock Delay: 36
11:22:08:setup_element:INFO: Eye window for uplink 5 : __________________________________________________________________________XXXXX_
Clock Delay: 36
11:22:08:setup_element:INFO: Eye window for uplink 6 : __________________________________________________________________________XXXX__
Clock Delay: 35
11:22:08:setup_element:INFO: Eye window for uplink 7 : __________________________________________________________________________XXXX__
Clock Delay: 35
11:22:08:setup_element:INFO: Eye window for uplink 8 : _________________________________________________________________________XXXXX__
Clock Delay: 35
11:22:08:setup_element:INFO: Eye window for uplink 9 : _________________________________________________________________________XXXXX__
Clock Delay: 35
11:22:08:setup_element:INFO: Eye window for uplink 10: __________________________________________________________________________XXXXX_
Clock Delay: 36
11:22:08:setup_element:INFO: Eye window for uplink 11: __________________________________________________________________________XXXXX_
Clock Delay: 36
11:22:08:setup_element:INFO: Eye window for uplink 12: _________________________________________________________________________XXXXX__
Clock Delay: 35
11:22:08:setup_element:INFO: Eye window for uplink 13: _________________________________________________________________________XXXXX__
Clock Delay: 35
11:22:08:setup_element:INFO: Eye window for uplink 14: _________________________________________________________________________XXXXX__
Clock Delay: 35
11:22:08:setup_element:INFO: Eye window for uplink 15: _________________________________________________________________________XXXXX__
Clock Delay: 35
11:22:08:setup_element:INFO: Setting the clock phase to 36 for group 0, downlink 1
11:22:08:setup_element:INFO: Scanning data phases
11:22:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:22:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:22:13:setup_element:INFO: Data phase scan results for group 0, downlink 1
11:22:13:setup_element:INFO: Eye window for uplink 0 : _____XXXXX______________________________
Data delay found: 27
11:22:13:setup_element:INFO: Eye window for uplink 1 : XXXXXX__________________________________
Data delay found: 22
11:22:13:setup_element:INFO: Eye window for uplink 2 : __XXXX__________________________________
Data delay found: 23
11:22:13:setup_element:INFO: Eye window for uplink 3 : XXX__________________________________XXX
Data delay found: 19
11:22:13:setup_element:INFO: Eye window for uplink 4 : XXXX___________________________________X
Data delay found: 21
11:22:13:setup_element:INFO: Eye window for uplink 5 : ___________________________________XXXXX
Data delay found: 17
11:22:13:setup_element:INFO: Eye window for uplink 6 : ________________________________XXXXX___
Data delay found: 14
11:22:13:setup_element:INFO: Eye window for uplink 7 : ____________________________XXXXX_______
Data delay found: 10
11:22:13:setup_element:INFO: Eye window for uplink 8 : _________________XXXXXXX________________
Data delay found: 0
11:22:13:setup_element:INFO: Eye window for uplink 9 : _______________________XXXXX____________
Data delay found: 5
11:22:13:setup_element:INFO: Eye window for uplink 10: _____________________XXXXXX_____________
Data delay found: 3
11:22:13:setup_element:INFO: Eye window for uplink 11: _________________________XXXXXX_________
Data delay found: 7
11:22:13:setup_element:INFO: Eye window for uplink 12: ______________________XXXX______________
Data delay found: 3
11:22:13:setup_element:INFO: Eye window for uplink 13: _________________________XXXX___________
Data delay found: 6
11:22:13:setup_element:INFO: Eye window for uplink 14: _______________________XXXX_____________
Data delay found: 4
11:22:13:setup_element:INFO: Eye window for uplink 15: _________________________XXXX___________
Data delay found: 6
11:22:13:setup_element:INFO: Setting the data phase to 27 for uplink 0
11:22:13:setup_element:INFO: Setting the data phase to 22 for uplink 1
11:22:13:setup_element:INFO: Setting the data phase to 23 for uplink 2
11:22:13:setup_element:INFO: Setting the data phase to 19 for uplink 3
11:22:13:setup_element:INFO: Setting the data phase to 21 for uplink 4
11:22:13:setup_element:INFO: Setting the data phase to 17 for uplink 5
11:22:13:setup_element:INFO: Setting the data phase to 14 for uplink 6
11:22:13:setup_element:INFO: Setting the data phase to 10 for uplink 7
11:22:13:setup_element:INFO: Setting the data phase to 0 for uplink 8
11:22:13:setup_element:INFO: Setting the data phase to 5 for uplink 9
11:22:13:setup_element:INFO: Setting the data phase to 3 for uplink 10
11:22:13:setup_element:INFO: Setting the data phase to 7 for uplink 11
11:22:13:setup_element:INFO: Setting the data phase to 3 for uplink 12
11:22:13:setup_element:INFO: Setting the data phase to 6 for uplink 13
11:22:13:setup_element:INFO: Setting the data phase to 4 for uplink 14
11:22:13:setup_element:INFO: Setting the data phase to 6 for uplink 15
11:22:13:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 36
Window Length: 73
Eye Windows:
Uplink 0: _________________________________________________________________________XXXXXXX
Uplink 1: _________________________________________________________________________XXXXXXX
Uplink 2: __________________________________________________________________________XXXXX_
Uplink 3: __________________________________________________________________________XXXXX_
Uplink 4: __________________________________________________________________________XXXXX_
Uplink 5: __________________________________________________________________________XXXXX_
Uplink 6: __________________________________________________________________________XXXX__
Uplink 7: __________________________________________________________________________XXXX__
Uplink 8: _________________________________________________________________________XXXXX__
Uplink 9: _________________________________________________________________________XXXXX__
Uplink 10: __________________________________________________________________________XXXXX_
Uplink 11: __________________________________________________________________________XXXXX_
Uplink 12: _________________________________________________________________________XXXXX__
Uplink 13: _________________________________________________________________________XXXXX__
Uplink 14: _________________________________________________________________________XXXXX__
Uplink 15: _________________________________________________________________________XXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 1:
Optimal Phase: 22
Window Length: 34
Eye Window: XXXXXX__________________________________
Uplink 2:
Optimal Phase: 23
Window Length: 36
Eye Window: __XXXX__________________________________
Uplink 3:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 4:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 5:
Optimal Phase: 17
Window Length: 35
Eye Window: ___________________________________XXXXX
Uplink 6:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 7:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 8:
Optimal Phase: 0
Window Length: 33
Eye Window: _________________XXXXXXX________________
Uplink 9:
Optimal Phase: 5
Window Length: 35
Eye Window: _______________________XXXXX____________
Uplink 10:
Optimal Phase: 3
Window Length: 34
Eye Window: _____________________XXXXXX_____________
Uplink 11:
Optimal Phase: 7
Window Length: 34
Eye Window: _________________________XXXXXX_________
Uplink 12:
Optimal Phase: 3
Window Length: 36
Eye Window: ______________________XXXX______________
Uplink 13:
Optimal Phase: 6
Window Length: 36
Eye Window: _________________________XXXX___________
Uplink 14:
Optimal Phase: 4
Window Length: 36
Eye Window: _______________________XXXX_____________
Uplink 15:
Optimal Phase: 6
Window Length: 36
Eye Window: _________________________XXXX___________
]
11:22:13:setup_element:INFO: Beginning SMX ASICs map scan
11:22:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:22:13:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:22:13:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:22:13:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:22:13:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:22:13:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
11:22:13:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
11:22:13:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:22:14:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:22:14:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
11:22:14:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
11:22:14:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:22:14:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:22:14:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
11:22:14:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
11:22:14:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:22:14:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:22:14:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
11:22:14:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
11:22:15:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:22:15:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:22:16:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 36
Window Length: 73
Eye Windows:
Uplink 0: _________________________________________________________________________XXXXXXX
Uplink 1: _________________________________________________________________________XXXXXXX
Uplink 2: __________________________________________________________________________XXXXX_
Uplink 3: __________________________________________________________________________XXXXX_
Uplink 4: __________________________________________________________________________XXXXX_
Uplink 5: __________________________________________________________________________XXXXX_
Uplink 6: __________________________________________________________________________XXXX__
Uplink 7: __________________________________________________________________________XXXX__
Uplink 8: _________________________________________________________________________XXXXX__
Uplink 9: _________________________________________________________________________XXXXX__
Uplink 10: __________________________________________________________________________XXXXX_
Uplink 11: __________________________________________________________________________XXXXX_
Uplink 12: _________________________________________________________________________XXXXX__
Uplink 13: _________________________________________________________________________XXXXX__
Uplink 14: _________________________________________________________________________XXXXX__
Uplink 15: _________________________________________________________________________XXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 1:
Optimal Phase: 22
Window Length: 34
Eye Window: XXXXXX__________________________________
Uplink 2:
Optimal Phase: 23
Window Length: 36
Eye Window: __XXXX__________________________________
Uplink 3:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 4:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 5:
Optimal Phase: 17
Window Length: 35
Eye Window: ___________________________________XXXXX
Uplink 6:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 7:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 8:
Optimal Phase: 0
Window Length: 33
Eye Window: _________________XXXXXXX________________
Uplink 9:
Optimal Phase: 5
Window Length: 35
Eye Window: _______________________XXXXX____________
Uplink 10:
Optimal Phase: 3
Window Length: 34
Eye Window: _____________________XXXXXX_____________
Uplink 11:
Optimal Phase: 7
Window Length: 34
Eye Window: _________________________XXXXXX_________
Uplink 12:
Optimal Phase: 3
Window Length: 36
Eye Window: ______________________XXXX______________
Uplink 13:
Optimal Phase: 6
Window Length: 36
Eye Window: _________________________XXXX___________
Uplink 14:
Optimal Phase: 4
Window Length: 36
Eye Window: _______________________XXXX_____________
Uplink 15:
Optimal Phase: 6
Window Length: 36
Eye Window: _________________________XXXX___________
11:22:16:setup_element:INFO: Performing Elink synchronization
11:22:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:22:16:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:22:16:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:22:16:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:22:16:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
11:22:16:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:22:16:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4_5 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_4__upli_5
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_12 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_5__upli_12
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_6__upli_7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_14 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_7__upli_14
FEB type: A FEB_A: 1 FEB_B: 0
11:22:18:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:22:18:febtest:INFO: 01-00 | XA-000-08-003-000-000-048-13 | 56.8 | 1124.0
11:22:18:febtest:INFO: 08-01 | XA-000-08-003-000-000-042-10 | 47.3 | 1159.7
11:22:18:febtest:INFO: 03-02 | XA-000-08-003-000-000-049-13 | 50.4 | 1141.9
11:22:18:febtest:INFO: 10-03 | XA-000-08-003-000-000-044-10 | 31.4 | 1218.6
11:22:19:febtest:INFO: 05-04 | XA-000-08-003-000-001-063-00 | 34.6 | 1201.0
11:22:19:febtest:INFO: 12-05 | XA-000-08-003-000-000-046-10 | 44.1 | 1183.3
11:22:19:febtest:INFO: 07-06 | XA-000-08-003-000-000-051-13 | 47.3 | 1147.8
11:22:19:febtest:INFO: 14-07 | XA-000-08-003-000-000-047-10 | 56.8 | 1124.0
11:22:19:ST3_smx:INFO: Configuring SMX FAST
11:22:21:ST3_smx:INFO: chip: 1-0 50.430383 C 1147.806000 mV
11:22:21:ST3_smx:INFO: Electrons
11:22:21:ST3_smx:INFO: # loops 0
11:22:23:ST3_smx:INFO: # loops 1
11:22:24:ST3_smx:INFO: # loops 2
11:22:26:ST3_smx:INFO: Total # of broken channels: 0
11:22:26:ST3_smx:INFO: List of broken channels: []
11:22:26:ST3_smx:INFO: Total # of broken channels: 0
11:22:26:ST3_smx:INFO: List of broken channels: []
11:22:27:ST3_smx:INFO: Configuring SMX FAST
11:22:29:ST3_smx:INFO: chip: 8-1 47.250730 C 1171.483840 mV
11:22:29:ST3_smx:INFO: Electrons
11:22:29:ST3_smx:INFO: # loops 0
11:22:31:ST3_smx:INFO: # loops 1
11:22:32:ST3_smx:INFO: # loops 2
11:22:34:ST3_smx:INFO: Total # of broken channels: 0
11:22:34:ST3_smx:INFO: List of broken channels: []
11:22:34:ST3_smx:INFO: Total # of broken channels: 0
11:22:34:ST3_smx:INFO: List of broken channels: []
11:22:35:ST3_smx:INFO: Configuring SMX FAST
11:22:37:ST3_smx:INFO: chip: 3-2 53.612520 C 1135.937260 mV
11:22:37:ST3_smx:INFO: Electrons
11:22:37:ST3_smx:INFO: # loops 0
11:22:39:ST3_smx:INFO: # loops 1
11:22:41:ST3_smx:INFO: # loops 2
11:22:42:ST3_smx:INFO: Total # of broken channels: 0
11:22:42:ST3_smx:INFO: List of broken channels: []
11:22:42:ST3_smx:INFO: Total # of broken channels: 0
11:22:43:ST3_smx:INFO: List of broken channels: []
11:22:43:ST3_smx:INFO: Configuring SMX FAST
11:22:46:ST3_smx:INFO: chip: 10-3 34.556970 C 1218.600960 mV
11:22:46:ST3_smx:INFO: Electrons
11:22:46:ST3_smx:INFO: # loops 0
11:22:47:ST3_smx:INFO: # loops 1
11:22:49:ST3_smx:INFO: # loops 2
11:22:51:ST3_smx:INFO: Total # of broken channels: 0
11:22:51:ST3_smx:INFO: List of broken channels: []
11:22:51:ST3_smx:INFO: Total # of broken channels: 14
11:22:51:ST3_smx:INFO: List of broken channels: [73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99]
11:22:52:ST3_smx:INFO: Configuring SMX FAST
11:22:54:ST3_smx:INFO: chip: 5-4 47.250730 C 1159.654860 mV
11:22:54:ST3_smx:INFO: Electrons
11:22:54:ST3_smx:INFO: # loops 0
11:22:56:ST3_smx:INFO: # loops 1
11:22:58:ST3_smx:INFO: # loops 2
11:22:59:ST3_smx:INFO: Total # of broken channels: 0
11:22:59:ST3_smx:INFO: List of broken channels: []
11:22:59:ST3_smx:INFO: Total # of broken channels: 1
11:22:59:ST3_smx:INFO: List of broken channels: [64]
11:23:00:ST3_smx:INFO: Configuring SMX FAST
11:23:02:ST3_smx:INFO: chip: 12-5 50.430383 C 1165.571835 mV
11:23:02:ST3_smx:INFO: Electrons
11:23:02:ST3_smx:INFO: # loops 0
11:23:04:ST3_smx:INFO: # loops 1
11:23:05:ST3_smx:INFO: # loops 2
11:23:07:ST3_smx:INFO: Total # of broken channels: 0
11:23:07:ST3_smx:INFO: List of broken channels: []
11:23:07:ST3_smx:INFO: Total # of broken channels: 0
11:23:07:ST3_smx:INFO: List of broken channels: []
11:23:08:ST3_smx:INFO: Configuring SMX FAST
11:23:10:ST3_smx:INFO: chip: 7-6 56.797143 C 1129.995435 mV
11:23:10:ST3_smx:INFO: Electrons
11:23:10:ST3_smx:INFO: # loops 0
11:23:12:ST3_smx:INFO: # loops 1
11:23:13:ST3_smx:INFO: # loops 2
11:23:15:ST3_smx:INFO: Total # of broken channels: 0
11:23:15:ST3_smx:INFO: List of broken channels: []
11:23:15:ST3_smx:INFO: Total # of broken channels: 0
11:23:15:ST3_smx:INFO: List of broken channels: []
11:23:16:ST3_smx:INFO: Configuring SMX FAST
11:23:18:ST3_smx:INFO: chip: 14-7 56.797143 C 1147.806000 mV
11:23:18:ST3_smx:INFO: Electrons
11:23:18:ST3_smx:INFO: # loops 0
11:23:20:ST3_smx:INFO: # loops 1
11:23:22:ST3_smx:INFO: # loops 2
11:23:24:ST3_smx:INFO: Total # of broken channels: 0
11:23:24:ST3_smx:INFO: List of broken channels: []
11:23:24:ST3_smx:INFO: Total # of broken channels: 0
11:23:24:ST3_smx:INFO: List of broken channels: []
11:23:25:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:23:25:febtest:INFO: 01-00 | XA-000-08-003-000-000-048-13 | 53.6 | 1147.8
11:23:25:febtest:INFO: 08-01 | XA-000-08-003-000-000-042-10 | 47.3 | 1171.5
11:23:25:febtest:INFO: 03-02 | XA-000-08-003-000-000-049-13 | 56.8 | 1135.9
11:23:25:febtest:INFO: 10-03 | XA-000-08-003-000-000-044-10 | 37.7 | 1218.6
11:23:26:febtest:INFO: 05-04 | XA-000-08-003-000-001-063-00 | 47.3 | 1159.7
11:23:26:febtest:INFO: 12-05 | XA-000-08-003-000-000-046-10 | 50.4 | 1165.6
11:23:26:febtest:INFO: 07-06 | XA-000-08-003-000-000-051-13 | 56.8 | 1130.0
11:23:26:febtest:INFO: 14-07 | XA-000-08-003-000-000-047-10 | 56.8 | 1147.8
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_06_12-11_22_04
OPERATOR : Henrik;
SITE : KIT
SETUP : KIT_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L5UL101016 M5UL1B4010164A2 124 C
FEB_SN : 3028
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.450', '1.4880', '1.850', '2.3620', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9730', '1.850', '0.5323', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9700', '1.850', '0.3193', '0.000', '0.0000', '0.000', '0.0000']