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FEB_3031 14.06.24 11:09:52
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11:09:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:09:52:ST3_Shared:INFO: FEB-Microcable
11:09:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:09:53:febtest:INFO: Testing FEB with SN 3031
11:09:56:smx_tester:INFO: Scanning setup
11:09:56:elinks:INFO: Disabling clock on downlink 0
11:09:56:elinks:INFO: Disabling clock on downlink 1
11:09:56:elinks:INFO: Disabling clock on downlink 2
11:09:56:elinks:INFO: Disabling clock on downlink 3
11:09:56:elinks:INFO: Disabling clock on downlink 4
11:09:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:09:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:09:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:09:56:elinks:INFO: Disabling clock on downlink 0
11:09:56:elinks:INFO: Disabling clock on downlink 1
11:09:56:elinks:INFO: Disabling clock on downlink 2
11:09:56:elinks:INFO: Disabling clock on downlink 3
11:09:56:elinks:INFO: Disabling clock on downlink 4
11:09:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:09:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:09:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
11:09:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
11:09:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
11:09:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
11:09:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
11:09:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
11:09:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
11:09:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
11:09:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
11:09:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
11:09:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
11:09:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
11:09:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
11:09:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
11:09:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
11:09:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
11:09:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:09:56:elinks:INFO: Disabling clock on downlink 0
11:09:56:elinks:INFO: Disabling clock on downlink 1
11:09:56:elinks:INFO: Disabling clock on downlink 2
11:09:56:elinks:INFO: Disabling clock on downlink 3
11:09:56:elinks:INFO: Disabling clock on downlink 4
11:09:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:09:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:09:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:09:56:elinks:INFO: Disabling clock on downlink 0
11:09:56:elinks:INFO: Disabling clock on downlink 1
11:09:56:elinks:INFO: Disabling clock on downlink 2
11:09:56:elinks:INFO: Disabling clock on downlink 3
11:09:56:elinks:INFO: Disabling clock on downlink 4
11:09:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:09:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:09:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:09:56:elinks:INFO: Disabling clock on downlink 0
11:09:56:elinks:INFO: Disabling clock on downlink 1
11:09:56:elinks:INFO: Disabling clock on downlink 2
11:09:56:elinks:INFO: Disabling clock on downlink 3
11:09:56:elinks:INFO: Disabling clock on downlink 4
11:09:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:09:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:09:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:09:56:setup_element:INFO: Scanning clock phase
11:09:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:09:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:09:57:setup_element:INFO: Clock phase scan results for group 0, downlink 1
11:09:57:setup_element:INFO: Eye window for uplink 0 : ____________________________________________________________________________XXXX
Clock Delay: 37
11:09:57:setup_element:INFO: Eye window for uplink 1 : ____________________________________________________________________________XXXX
Clock Delay: 37
11:09:57:setup_element:INFO: Eye window for uplink 2 : X__________________________________________________________________________XXXXX
Clock Delay: 37
11:09:57:setup_element:INFO: Eye window for uplink 3 : X__________________________________________________________________________XXXXX
Clock Delay: 37
11:09:57:setup_element:INFO: Eye window for uplink 4 : X__________________________________________________________________________XXXXX
Clock Delay: 37
11:09:57:setup_element:INFO: Eye window for uplink 5 : X__________________________________________________________________________XXXXX
Clock Delay: 37
11:09:57:setup_element:INFO: Eye window for uplink 6 : ___________________________________________________________________________XXXXX
Clock Delay: 37
11:09:57:setup_element:INFO: Eye window for uplink 7 : ___________________________________________________________________________XXXXX
Clock Delay: 37
11:09:57:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:09:57:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:09:57:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:09:57:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:09:57:setup_element:INFO: Eye window for uplink 12: __________________________________________________________________________XXXXX_
Clock Delay: 36
11:09:57:setup_element:INFO: Eye window for uplink 13: __________________________________________________________________________XXXXX_
Clock Delay: 36
11:09:57:setup_element:INFO: Eye window for uplink 14: ___________________________________________________________________________XXXXX
Clock Delay: 37
11:09:57:setup_element:INFO: Eye window for uplink 15: ___________________________________________________________________________XXXXX
Clock Delay: 37
11:09:57:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1
11:09:57:setup_element:INFO: Scanning data phases
11:09:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:09:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:10:02:setup_element:INFO: Data phase scan results for group 0, downlink 1
11:10:02:setup_element:INFO: Eye window for uplink 0 : _________XXXXX__________________________
Data delay found: 31
11:10:02:setup_element:INFO: Eye window for uplink 1 : _____XXXXX______________________________
Data delay found: 27
11:10:02:setup_element:INFO: Eye window for uplink 2 : ____XXXXXX______________________________
Data delay found: 26
11:10:02:setup_element:INFO: Eye window for uplink 3 : XXXXXX_________________________________X
Data delay found: 22
11:10:02:setup_element:INFO: Eye window for uplink 4 : ___XXXX_________________________________
Data delay found: 24
11:10:02:setup_element:INFO: Eye window for uplink 5 : XXX___________________________________XX
Data delay found: 20
11:10:02:setup_element:INFO: Eye window for uplink 6 : XX__________________________________XXXX
Data delay found: 18
11:10:02:setup_element:INFO: Eye window for uplink 7 : _________________________________XXXX___
Data delay found: 14
11:10:02:setup_element:INFO: Eye window for uplink 8 : __________________XXXXXX________________
Data delay found: 0
11:10:02:setup_element:INFO: Eye window for uplink 9 : _______________________XXXXX____________
Data delay found: 5
11:10:02:setup_element:INFO: Eye window for uplink 10: ____________________XXXXX_______________
Data delay found: 2
11:10:02:setup_element:INFO: Eye window for uplink 11: ________________________XXXXX___________
Data delay found: 6
11:10:02:setup_element:INFO: Eye window for uplink 12: _______________________XXXXX____________
Data delay found: 5
11:10:02:setup_element:INFO: Eye window for uplink 13: __________________________XXXXX_________
Data delay found: 8
11:10:02:setup_element:INFO: Eye window for uplink 14: _________________________XXXXX__________
Data delay found: 7
11:10:02:setup_element:INFO: Eye window for uplink 15: ____________________________XXXXX_______
Data delay found: 10
11:10:02:setup_element:INFO: Setting the data phase to 31 for uplink 0
11:10:02:setup_element:INFO: Setting the data phase to 27 for uplink 1
11:10:02:setup_element:INFO: Setting the data phase to 26 for uplink 2
11:10:02:setup_element:INFO: Setting the data phase to 22 for uplink 3
11:10:02:setup_element:INFO: Setting the data phase to 24 for uplink 4
11:10:02:setup_element:INFO: Setting the data phase to 20 for uplink 5
11:10:02:setup_element:INFO: Setting the data phase to 18 for uplink 6
11:10:02:setup_element:INFO: Setting the data phase to 14 for uplink 7
11:10:02:setup_element:INFO: Setting the data phase to 0 for uplink 8
11:10:02:setup_element:INFO: Setting the data phase to 5 for uplink 9
11:10:02:setup_element:INFO: Setting the data phase to 2 for uplink 10
11:10:02:setup_element:INFO: Setting the data phase to 6 for uplink 11
11:10:02:setup_element:INFO: Setting the data phase to 5 for uplink 12
11:10:02:setup_element:INFO: Setting the data phase to 8 for uplink 13
11:10:02:setup_element:INFO: Setting the data phase to 7 for uplink 14
11:10:02:setup_element:INFO: Setting the data phase to 10 for uplink 15
11:10:02:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 35
Window Length: 70
Eye Windows:
Uplink 0: ____________________________________________________________________________XXXX
Uplink 1: ____________________________________________________________________________XXXX
Uplink 2: X__________________________________________________________________________XXXXX
Uplink 3: X__________________________________________________________________________XXXXX
Uplink 4: X__________________________________________________________________________XXXXX
Uplink 5: X__________________________________________________________________________XXXXX
Uplink 6: ___________________________________________________________________________XXXXX
Uplink 7: ___________________________________________________________________________XXXXX
Uplink 8: _______________________________________________________________________XXXXXXX__
Uplink 9: _______________________________________________________________________XXXXXXX__
Uplink 10: ________________________________________________________________________XXXXXX__
Uplink 11: ________________________________________________________________________XXXXXX__
Uplink 12: __________________________________________________________________________XXXXX_
Uplink 13: __________________________________________________________________________XXXXX_
Uplink 14: ___________________________________________________________________________XXXXX
Uplink 15: ___________________________________________________________________________XXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 1:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 2:
Optimal Phase: 26
Window Length: 34
Eye Window: ____XXXXXX______________________________
Uplink 3:
Optimal Phase: 22
Window Length: 33
Eye Window: XXXXXX_________________________________X
Uplink 4:
Optimal Phase: 24
Window Length: 36
Eye Window: ___XXXX_________________________________
Uplink 5:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 6:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 7:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 8:
Optimal Phase: 0
Window Length: 34
Eye Window: __________________XXXXXX________________
Uplink 9:
Optimal Phase: 5
Window Length: 35
Eye Window: _______________________XXXXX____________
Uplink 10:
Optimal Phase: 2
Window Length: 35
Eye Window: ____________________XXXXX_______________
Uplink 11:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 12:
Optimal Phase: 5
Window Length: 35
Eye Window: _______________________XXXXX____________
Uplink 13:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 14:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 15:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
]
11:10:02:setup_element:INFO: Beginning SMX ASICs map scan
11:10:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:10:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:10:02:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:10:02:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:10:02:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:10:02:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
11:10:02:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
11:10:02:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:10:02:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:10:02:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
11:10:02:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
11:10:03:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:10:03:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:10:03:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
11:10:03:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
11:10:03:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:10:03:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:10:03:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
11:10:03:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
11:10:03:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:10:03:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:10:05:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 35
Window Length: 70
Eye Windows:
Uplink 0: ____________________________________________________________________________XXXX
Uplink 1: ____________________________________________________________________________XXXX
Uplink 2: X__________________________________________________________________________XXXXX
Uplink 3: X__________________________________________________________________________XXXXX
Uplink 4: X__________________________________________________________________________XXXXX
Uplink 5: X__________________________________________________________________________XXXXX
Uplink 6: ___________________________________________________________________________XXXXX
Uplink 7: ___________________________________________________________________________XXXXX
Uplink 8: _______________________________________________________________________XXXXXXX__
Uplink 9: _______________________________________________________________________XXXXXXX__
Uplink 10: ________________________________________________________________________XXXXXX__
Uplink 11: ________________________________________________________________________XXXXXX__
Uplink 12: __________________________________________________________________________XXXXX_
Uplink 13: __________________________________________________________________________XXXXX_
Uplink 14: ___________________________________________________________________________XXXXX
Uplink 15: ___________________________________________________________________________XXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 1:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 2:
Optimal Phase: 26
Window Length: 34
Eye Window: ____XXXXXX______________________________
Uplink 3:
Optimal Phase: 22
Window Length: 33
Eye Window: XXXXXX_________________________________X
Uplink 4:
Optimal Phase: 24
Window Length: 36
Eye Window: ___XXXX_________________________________
Uplink 5:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 6:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 7:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 8:
Optimal Phase: 0
Window Length: 34
Eye Window: __________________XXXXXX________________
Uplink 9:
Optimal Phase: 5
Window Length: 35
Eye Window: _______________________XXXXX____________
Uplink 10:
Optimal Phase: 2
Window Length: 35
Eye Window: ____________________XXXXX_______________
Uplink 11:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 12:
Optimal Phase: 5
Window Length: 35
Eye Window: _______________________XXXXX____________
Uplink 13:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 14:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 15:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
11:10:05:setup_element:INFO: Performing Elink synchronization
11:10:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:10:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:10:05:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:10:05:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:10:05:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
11:10:05:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:10:05:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
FEB type: A FEB_A: 1 FEB_B: 0
11:10:06:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:10:06:febtest:INFO: 01-00 | XA-000-08-003-000-004-016-05 | 18.7 | 1265.4
11:10:07:febtest:INFO: 08-01 | XA-000-08-003-000-001-030-14 | 44.1 | 1171.5
11:10:07:febtest:INFO: 03-02 | XA-000-08-003-000-004-006-02 | 25.1 | 1242.0
11:10:07:febtest:INFO: 10-03 | XA-000-08-003-000-001-091-11 | 56.8 | 1135.9
11:10:07:febtest:INFO: 05-04 | XA-000-08-003-000-004-011-02 | 28.2 | 1236.2
11:10:07:febtest:INFO: 12-05 | XA-000-08-003-000-000-085-06 | 56.8 | 1147.8
11:10:08:febtest:INFO: 07-06 | XA-000-08-003-000-004-015-02 | 21.9 | 1242.0
11:10:08:febtest:INFO: 14-07 | XA-000-08-003-000-001-006-09 | 31.4 | 1218.6
11:10:08:ST3_smx:INFO: Configuring SMX FAST
11:10:10:ST3_smx:INFO: chip: 1-0 12.438562 C 1288.680240 mV
11:10:10:ST3_smx:INFO: Electrons
11:10:10:ST3_smx:INFO: # loops 0
11:10:12:ST3_smx:INFO: # loops 1
11:10:14:ST3_smx:INFO: # loops 2
11:10:16:ST3_smx:INFO: Total # of broken channels: 0
11:10:16:ST3_smx:INFO: List of broken channels: []
11:10:16:ST3_smx:INFO: Total # of broken channels: 0
11:10:16:ST3_smx:INFO: List of broken channels: []
11:10:17:ST3_smx:INFO: Configuring SMX FAST
11:10:19:ST3_smx:INFO: chip: 8-1 56.797143 C 1141.874115 mV
11:10:19:ST3_smx:INFO: Electrons
11:10:19:ST3_smx:INFO: # loops 0
11:10:21:ST3_smx:INFO: # loops 1
11:10:23:ST3_smx:INFO: # loops 2
11:10:25:ST3_smx:INFO: Total # of broken channels: 0
11:10:25:ST3_smx:INFO: List of broken channels: []
11:10:25:ST3_smx:INFO: Total # of broken channels: 0
11:10:25:ST3_smx:INFO: List of broken channels: []
11:10:26:ST3_smx:INFO: Configuring SMX FAST
11:10:28:ST3_smx:INFO: chip: 3-2 37.726682 C 1200.969315 mV
11:10:28:ST3_smx:INFO: Electrons
11:10:28:ST3_smx:INFO: # loops 0
11:10:30:ST3_smx:INFO: # loops 1
11:10:32:ST3_smx:INFO: # loops 2
11:10:34:ST3_smx:INFO: Total # of broken channels: 0
11:10:34:ST3_smx:INFO: List of broken channels: []
11:10:34:ST3_smx:INFO: Total # of broken channels: 1
11:10:34:ST3_smx:INFO: List of broken channels: [31]
11:10:35:ST3_smx:INFO: Configuring SMX FAST
11:10:37:ST3_smx:INFO: chip: 10-3 53.612520 C 1165.571835 mV
11:10:37:ST3_smx:INFO: Electrons
11:10:37:ST3_smx:INFO: # loops 0
11:10:39:ST3_smx:INFO: # loops 1
11:10:41:ST3_smx:INFO: # loops 2
11:10:43:ST3_smx:INFO: Total # of broken channels: 0
11:10:43:ST3_smx:INFO: List of broken channels: []
11:10:43:ST3_smx:INFO: Total # of broken channels: 0
11:10:43:ST3_smx:INFO: List of broken channels: []
11:10:44:ST3_smx:INFO: Configuring SMX FAST
11:10:46:ST3_smx:INFO: chip: 5-4 37.726682 C 1206.851500 mV
11:10:46:ST3_smx:INFO: Electrons
11:10:46:ST3_smx:INFO: # loops 0
11:10:48:ST3_smx:INFO: # loops 1
11:10:50:ST3_smx:INFO: # loops 2
11:10:52:ST3_smx:INFO: Total # of broken channels: 0
11:10:52:ST3_smx:INFO: List of broken channels: []
11:10:52:ST3_smx:INFO: Total # of broken channels: 0
11:10:52:ST3_smx:INFO: List of broken channels: []
11:10:53:ST3_smx:INFO: Configuring SMX FAST
11:10:55:ST3_smx:INFO: chip: 12-5 63.173842 C 1135.937260 mV
11:10:55:ST3_smx:INFO: Electrons
11:10:55:ST3_smx:INFO: # loops 0
11:10:57:ST3_smx:INFO: # loops 1
11:10:59:ST3_smx:INFO: # loops 2
11:11:01:ST3_smx:INFO: Total # of broken channels: 0
11:11:01:ST3_smx:INFO: List of broken channels: []
11:11:01:ST3_smx:INFO: Total # of broken channels: 0
11:11:01:ST3_smx:INFO: List of broken channels: []
11:11:02:ST3_smx:INFO: Configuring SMX FAST
11:11:04:ST3_smx:INFO: chip: 7-6 31.389742 C 1230.330540 mV
11:11:04:ST3_smx:INFO: Electrons
11:11:04:ST3_smx:INFO: # loops 0
11:11:06:ST3_smx:INFO: # loops 1
11:11:08:ST3_smx:INFO: # loops 2
11:11:10:ST3_smx:INFO: Total # of broken channels: 0
11:11:10:ST3_smx:INFO: List of broken channels: []
11:11:10:ST3_smx:INFO: Total # of broken channels: 1
11:11:10:ST3_smx:INFO: List of broken channels: [27]
11:11:11:ST3_smx:INFO: Configuring SMX FAST
11:11:14:ST3_smx:INFO: chip: 14-7 40.898880 C 1206.851500 mV
11:11:14:ST3_smx:INFO: Electrons
11:11:14:ST3_smx:INFO: # loops 0
11:11:16:ST3_smx:INFO: # loops 1
11:11:18:ST3_smx:INFO: # loops 2
11:11:20:ST3_smx:INFO: Total # of broken channels: 0
11:11:20:ST3_smx:INFO: List of broken channels: []
11:11:20:ST3_smx:INFO: Total # of broken channels: 0
11:11:20:ST3_smx:INFO: List of broken channels: []
11:11:21:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:11:21:febtest:INFO: 01-00 | XA-000-08-003-000-004-016-05 | 15.6 | 1288.7
11:11:22:febtest:INFO: 08-01 | XA-000-08-003-000-001-030-14 | 60.0 | 1141.9
11:11:22:febtest:INFO: 03-02 | XA-000-08-003-000-004-006-02 | 40.9 | 1201.0
11:11:22:febtest:INFO: 10-03 | XA-000-08-003-000-001-091-11 | 53.6 | 1165.6
11:11:22:febtest:INFO: 05-04 | XA-000-08-003-000-004-011-02 | 37.7 | 1206.9
11:11:22:febtest:INFO: 12-05 | XA-000-08-003-000-000-085-06 | 66.4 | 1135.9
11:11:23:febtest:INFO: 07-06 | XA-000-08-003-000-004-015-02 | 31.4 | 1230.3
11:11:23:febtest:INFO: 14-07 | XA-000-08-003-000-001-006-09 | 40.9 | 1206.9
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_06_14-11_09_52
OPERATOR : Benjamin;
SITE : KIT
SETUP : KIT_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME :
FEB_SN : 3031
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.450', '1.4300', '1.850', '2.5450', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9780', '1.850', '0.5760', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9720', '1.850', '0.3146', '0.000', '0.0000', '0.000', '0.0000']