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FEB_3032 25.06.24 07:57:32
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07:57:32:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:57:32:ST3_Shared:INFO: FEB-Microcable
07:57:32:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:57:32:febtest:INFO: Testing FEB with SN 3032
07:57:35:smx_tester:INFO: Scanning setup
07:57:35:elinks:INFO: Disabling clock on downlink 0
07:57:35:elinks:INFO: Disabling clock on downlink 1
07:57:35:elinks:INFO: Disabling clock on downlink 2
07:57:35:elinks:INFO: Disabling clock on downlink 3
07:57:35:elinks:INFO: Disabling clock on downlink 4
07:57:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:57:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:57:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:57:35:elinks:INFO: Disabling clock on downlink 0
07:57:35:elinks:INFO: Disabling clock on downlink 1
07:57:35:elinks:INFO: Disabling clock on downlink 2
07:57:35:elinks:INFO: Disabling clock on downlink 3
07:57:35:elinks:INFO: Disabling clock on downlink 4
07:57:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:57:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:57:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
07:57:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
07:57:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
07:57:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
07:57:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
07:57:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
07:57:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
07:57:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
07:57:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
07:57:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
07:57:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
07:57:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
07:57:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
07:57:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
07:57:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
07:57:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
07:57:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:57:35:elinks:INFO: Disabling clock on downlink 0
07:57:35:elinks:INFO: Disabling clock on downlink 1
07:57:35:elinks:INFO: Disabling clock on downlink 2
07:57:35:elinks:INFO: Disabling clock on downlink 3
07:57:35:elinks:INFO: Disabling clock on downlink 4
07:57:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:57:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:57:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:57:35:elinks:INFO: Disabling clock on downlink 0
07:57:35:elinks:INFO: Disabling clock on downlink 1
07:57:35:elinks:INFO: Disabling clock on downlink 2
07:57:35:elinks:INFO: Disabling clock on downlink 3
07:57:35:elinks:INFO: Disabling clock on downlink 4
07:57:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:57:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
07:57:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:57:35:elinks:INFO: Disabling clock on downlink 0
07:57:35:elinks:INFO: Disabling clock on downlink 1
07:57:35:elinks:INFO: Disabling clock on downlink 2
07:57:35:elinks:INFO: Disabling clock on downlink 3
07:57:35:elinks:INFO: Disabling clock on downlink 4
07:57:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:57:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
07:57:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:57:36:setup_element:INFO: Scanning clock phase
07:57:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:57:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:57:36:setup_element:INFO: Clock phase scan results for group 0, downlink 1
07:57:36:setup_element:INFO: Eye window for uplink 0 : XXXXXXXXXXXXXXXXXXXXXXXX_______________________________________________XXXXXXXXX
Clock Delay: 47
07:57:36:setup_element:INFO: Eye window for uplink 1 : XXXXXXXXXXXXXXXXXXXXXXXX_______________________________________________XXXXXXXXX
Clock Delay: 47
07:57:36:setup_element:INFO: Eye window for uplink 2 : XXXXXXXXXXXXXXXXXXXXX_X__________________________________________________XXXXXXX
Clock Delay: 47
07:57:36:setup_element:INFO: Eye window for uplink 3 : XXXXXXXXXXXXXXXXXXXXX_X__________________________________________________XXXXXXX
Clock Delay: 47
07:57:36:setup_element:INFO: Eye window for uplink 4 : XXXXXXXXXXXXXXXXXXX_____________________________________________________________
Clock Delay: 49
07:57:36:setup_element:INFO: Eye window for uplink 5 : XXXXXXXXXXXXXXXXXXX_____________________________________________________________
Clock Delay: 49
07:57:36:setup_element:INFO: Eye window for uplink 6 : XXX_____________________________________________________________________________
Clock Delay: 41
07:57:36:setup_element:INFO: Eye window for uplink 7 : XXX_____________________________________________________________________________
Clock Delay: 41
07:57:36:setup_element:INFO: Eye window for uplink 8 : XXXXXXXXX_______________________________________________________________XXXXXXXX
Clock Delay: 40
07:57:36:setup_element:INFO: Eye window for uplink 9 : XXXXXXXXX_______________________________________________________________XXXXXXXX
Clock Delay: 40
07:57:36:setup_element:INFO: Eye window for uplink 10: XXX_____________________________________________________________________________
Clock Delay: 41
07:57:36:setup_element:INFO: Eye window for uplink 11: XXX_____________________________________________________________________________
Clock Delay: 41
07:57:36:setup_element:INFO: Eye window for uplink 12: XXXXXXXXXXX____________________________________________________________XXXXXXXXX
Clock Delay: 40
07:57:36:setup_element:INFO: Eye window for uplink 13: XXXXXXXXXXX____________________________________________________________XXXXXXXXX
Clock Delay: 40
07:57:36:setup_element:INFO: Eye window for uplink 14: XXXXXXXXXXX____________________________________________________________XXXXXXXXX
Clock Delay: 40
07:57:36:setup_element:INFO: Eye window for uplink 15: XXXXXXXXXXX____________________________________________________________XXXXXXXXX
Clock Delay: 40
07:57:36:setup_element:INFO: Setting the clock phase to 47 for group 0, downlink 1
07:57:36:setup_element:INFO: Scanning data phases
07:57:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:57:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:57:41:setup_element:INFO: Data phase scan results for group 0, downlink 1
07:57:41:setup_element:INFO: Eye window for uplink 0 : ______________________________XXXXXXXXX_
Data delay found: 14
07:57:41:setup_element:INFO: Eye window for uplink 1 : _________________________XXXXXXXXXXX____
Data delay found: 10
07:57:41:setup_element:INFO: Eye window for uplink 2 : __________________________XXXXXXXXX_____
Data delay found: 10
07:57:41:setup_element:INFO: Eye window for uplink 3 : _______________________XXXXXXXXX________
Data delay found: 7
07:57:41:setup_element:INFO: Eye window for uplink 4 : _______________________XXXXXXXX_________
Data delay found: 6
07:57:41:setup_element:INFO: Eye window for uplink 5 : ___________________XXXXXXXXX____________
Data delay found: 3
07:57:41:setup_element:INFO: Eye window for uplink 6 : __________________XXXXXXXXXXXXXXXXXXXXXX
Data delay found: 8
07:57:41:setup_element:INFO: Eye window for uplink 7 : ____________X_XXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 5
07:57:41:setup_element:INFO: Eye window for uplink 8 : __XXXXXXXXX_____________________________
Data delay found: 26
07:57:41:setup_element:INFO: Eye window for uplink 9 : ________XXXXXXXX________________________
Data delay found: 31
07:57:41:setup_element:INFO: Eye window for uplink 10: ______XXXXXXXX________________XXXXXXXXXX
Data delay found: 21
07:57:41:setup_element:INFO: Eye window for uplink 11: __________XXXXXXX_____________XXXXXXXXXX
Data delay found: 23
07:57:41:setup_element:INFO: Eye window for uplink 12: ______XXXXXXXXX_________________________
Data delay found: 30
07:57:41:setup_element:INFO: Eye window for uplink 13: __________XXXXXXXX______________________
Data delay found: 33
07:57:41:setup_element:INFO: Eye window for uplink 14: ______XXXXXXXXXX________________________
Data delay found: 30
07:57:41:setup_element:INFO: Eye window for uplink 15: _________XXXXXXXXXXX____________________
Data delay found: 34
07:57:41:setup_element:INFO: Setting the data phase to 14 for uplink 0
07:57:41:setup_element:INFO: Setting the data phase to 10 for uplink 1
07:57:41:setup_element:INFO: Setting the data phase to 10 for uplink 2
07:57:41:setup_element:INFO: Setting the data phase to 7 for uplink 3
07:57:41:setup_element:INFO: Setting the data phase to 6 for uplink 4
07:57:41:setup_element:INFO: Setting the data phase to 3 for uplink 5
07:57:41:setup_element:INFO: Setting the data phase to 8 for uplink 6
07:57:41:setup_element:INFO: Setting the data phase to 5 for uplink 7
07:57:41:setup_element:INFO: Setting the data phase to 26 for uplink 8
07:57:41:setup_element:INFO: Setting the data phase to 31 for uplink 9
07:57:41:setup_element:INFO: Setting the data phase to 21 for uplink 10
07:57:41:setup_element:INFO: Setting the data phase to 23 for uplink 11
07:57:41:setup_element:INFO: Setting the data phase to 30 for uplink 12
07:57:41:setup_element:INFO: Setting the data phase to 33 for uplink 13
07:57:41:setup_element:INFO: Setting the data phase to 30 for uplink 14
07:57:41:setup_element:INFO: Setting the data phase to 34 for uplink 15
07:57:41:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 47
Window Length: 47
Eye Windows:
Uplink 0: XXXXXXXXXXXXXXXXXXXXXXXX_______________________________________________XXXXXXXXX
Uplink 1: XXXXXXXXXXXXXXXXXXXXXXXX_______________________________________________XXXXXXXXX
Uplink 2: XXXXXXXXXXXXXXXXXXXXX_X__________________________________________________XXXXXXX
Uplink 3: XXXXXXXXXXXXXXXXXXXXX_X__________________________________________________XXXXXXX
Uplink 4: XXXXXXXXXXXXXXXXXXX_____________________________________________________________
Uplink 5: XXXXXXXXXXXXXXXXXXX_____________________________________________________________
Uplink 6: XXX_____________________________________________________________________________
Uplink 7: XXX_____________________________________________________________________________
Uplink 8: XXXXXXXXX_______________________________________________________________XXXXXXXX
Uplink 9: XXXXXXXXX_______________________________________________________________XXXXXXXX
Uplink 10: XXX_____________________________________________________________________________
Uplink 11: XXX_____________________________________________________________________________
Uplink 12: XXXXXXXXXXX____________________________________________________________XXXXXXXXX
Uplink 13: XXXXXXXXXXX____________________________________________________________XXXXXXXXX
Uplink 14: XXXXXXXXXXX____________________________________________________________XXXXXXXXX
Uplink 15: XXXXXXXXXXX____________________________________________________________XXXXXXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 14
Window Length: 31
Eye Window: ______________________________XXXXXXXXX_
Uplink 1:
Optimal Phase: 10
Window Length: 29
Eye Window: _________________________XXXXXXXXXXX____
Uplink 2:
Optimal Phase: 10
Window Length: 31
Eye Window: __________________________XXXXXXXXX_____
Uplink 3:
Optimal Phase: 7
Window Length: 31
Eye Window: _______________________XXXXXXXXX________
Uplink 4:
Optimal Phase: 6
Window Length: 32
Eye Window: _______________________XXXXXXXX_________
Uplink 5:
Optimal Phase: 3
Window Length: 31
Eye Window: ___________________XXXXXXXXX____________
Uplink 6:
Optimal Phase: 8
Window Length: 18
Eye Window: __________________XXXXXXXXXXXXXXXXXXXXXX
Uplink 7:
Optimal Phase: 5
Window Length: 12
Eye Window: ____________X_XXXXXXXXXXXXXXXXXXXXXXXXXX
Uplink 8:
Optimal Phase: 26
Window Length: 31
Eye Window: __XXXXXXXXX_____________________________
Uplink 9:
Optimal Phase: 31
Window Length: 32
Eye Window: ________XXXXXXXX________________________
Uplink 10:
Optimal Phase: 21
Window Length: 16
Eye Window: ______XXXXXXXX________________XXXXXXXXXX
Uplink 11:
Optimal Phase: 23
Window Length: 13
Eye Window: __________XXXXXXX_____________XXXXXXXXXX
Uplink 12:
Optimal Phase: 30
Window Length: 31
Eye Window: ______XXXXXXXXX_________________________
Uplink 13:
Optimal Phase: 33
Window Length: 32
Eye Window: __________XXXXXXXX______________________
Uplink 14:
Optimal Phase: 30
Window Length: 30
Eye Window: ______XXXXXXXXXX________________________
Uplink 15:
Optimal Phase: 34
Window Length: 29
Eye Window: _________XXXXXXXXXXX____________________
]
07:57:41:setup_element:INFO: Beginning SMX ASICs map scan
07:57:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:57:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:57:41:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
07:57:41:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
07:57:41:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
07:57:41:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
07:57:41:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
07:57:41:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
07:57:41:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
07:57:42:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
07:57:42:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
07:57:42:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
07:57:42:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
07:57:42:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
07:57:42:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
07:57:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
07:57:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
07:57:42:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
07:57:42:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
07:57:42:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
07:57:42:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
07:57:44:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 47
Window Length: 47
Eye Windows:
Uplink 0: XXXXXXXXXXXXXXXXXXXXXXXX_______________________________________________XXXXXXXXX
Uplink 1: XXXXXXXXXXXXXXXXXXXXXXXX_______________________________________________XXXXXXXXX
Uplink 2: XXXXXXXXXXXXXXXXXXXXX_X__________________________________________________XXXXXXX
Uplink 3: XXXXXXXXXXXXXXXXXXXXX_X__________________________________________________XXXXXXX
Uplink 4: XXXXXXXXXXXXXXXXXXX_____________________________________________________________
Uplink 5: XXXXXXXXXXXXXXXXXXX_____________________________________________________________
Uplink 6: XXX_____________________________________________________________________________
Uplink 7: XXX_____________________________________________________________________________
Uplink 8: XXXXXXXXX_______________________________________________________________XXXXXXXX
Uplink 9: XXXXXXXXX_______________________________________________________________XXXXXXXX
Uplink 10: XXX_____________________________________________________________________________
Uplink 11: XXX_____________________________________________________________________________
Uplink 12: XXXXXXXXXXX____________________________________________________________XXXXXXXXX
Uplink 13: XXXXXXXXXXX____________________________________________________________XXXXXXXXX
Uplink 14: XXXXXXXXXXX____________________________________________________________XXXXXXXXX
Uplink 15: XXXXXXXXXXX____________________________________________________________XXXXXXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 14
Window Length: 31
Eye Window: ______________________________XXXXXXXXX_
Uplink 1:
Optimal Phase: 10
Window Length: 29
Eye Window: _________________________XXXXXXXXXXX____
Uplink 2:
Optimal Phase: 10
Window Length: 31
Eye Window: __________________________XXXXXXXXX_____
Uplink 3:
Optimal Phase: 7
Window Length: 31
Eye Window: _______________________XXXXXXXXX________
Uplink 4:
Optimal Phase: 6
Window Length: 32
Eye Window: _______________________XXXXXXXX_________
Uplink 5:
Optimal Phase: 3
Window Length: 31
Eye Window: ___________________XXXXXXXXX____________
Uplink 6:
Optimal Phase: 8
Window Length: 18
Eye Window: __________________XXXXXXXXXXXXXXXXXXXXXX
Uplink 7:
Optimal Phase: 5
Window Length: 12
Eye Window: ____________X_XXXXXXXXXXXXXXXXXXXXXXXXXX
Uplink 8:
Optimal Phase: 26
Window Length: 31
Eye Window: __XXXXXXXXX_____________________________
Uplink 9:
Optimal Phase: 31
Window Length: 32
Eye Window: ________XXXXXXXX________________________
Uplink 10:
Optimal Phase: 21
Window Length: 16
Eye Window: ______XXXXXXXX________________XXXXXXXXXX
Uplink 11:
Optimal Phase: 23
Window Length: 13
Eye Window: __________XXXXXXX_____________XXXXXXXXXX
Uplink 12:
Optimal Phase: 30
Window Length: 31
Eye Window: ______XXXXXXXXX_________________________
Uplink 13:
Optimal Phase: 33
Window Length: 32
Eye Window: __________XXXXXXXX______________________
Uplink 14:
Optimal Phase: 30
Window Length: 30
Eye Window: ______XXXXXXXXXX________________________
Uplink 15:
Optimal Phase: 34
Window Length: 29
Eye Window: _________XXXXXXXXXXX____________________
07:57:44:setup_element:INFO: Performing Elink synchronization
07:57:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:57:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:57:44:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
07:57:44:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
07:57:44:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
07:57:44:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
07:57:44:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
FEB type: A FEB_A: 1 FEB_B: 0
07:57:45:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:57:45:febtest:INFO: 01-00 | XA-000-08-003-000-002-097-12 | 44.1 | 1183.3
07:57:46:febtest:INFO: 08-01 | XA-000-08-003-000-002-102-12 | 44.1 | 1189.2
07:57:46:febtest:INFO: 03-02 | XA-000-08-003-000-002-101-12 | 12.4 | 1294.5
07:57:46:febtest:INFO: 10-03 | XA-000-08-003-000-002-106-12 | 63.2 | 1124.0
07:57:46:febtest:INFO: 05-04 | XA-000-08-003-000-002-105-12 | 44.1 | 1189.2
07:57:46:febtest:INFO: 12-05 | XA-000-08-003-000-002-099-12 | 44.1 | 1177.4
07:57:47:febtest:INFO: 07-06 | XA-000-08-003-000-002-098-12 | 34.6 | 1206.9
07:57:47:febtest:INFO: 14-07 | XA-000-08-003-000-002-103-12 | 44.1 | 1177.4
07:57:47:ST3_smx:INFO: Configuring SMX FAST
07:57:49:ST3_smx:INFO: chip: 1-0 47.250730 C 1171.483840 mV
07:57:49:ST3_smx:INFO: Electrons
07:57:49:ST3_smx:INFO: # loops 0
07:57:50:ST3_smx:INFO: # loops 1
07:57:52:ST3_smx:INFO: # loops 2
07:57:53:ST3_smx:INFO: Total # of broken channels: 0
07:57:53:ST3_smx:INFO: List of broken channels: []
07:57:53:ST3_smx:INFO: Total # of broken channels: 0
07:57:53:ST3_smx:INFO: List of broken channels: []
07:57:54:ST3_smx:INFO: Configuring SMX FAST
07:57:56:ST3_smx:INFO: chip: 8-1 37.726682 C 1206.851500 mV
07:57:56:ST3_smx:INFO: Electrons
07:57:56:ST3_smx:INFO: # loops 0
07:57:58:ST3_smx:INFO: # loops 1
07:57:59:ST3_smx:INFO: # loops 2
07:58:01:ST3_smx:INFO: Total # of broken channels: 0
07:58:01:ST3_smx:INFO: List of broken channels: []
07:58:01:ST3_smx:INFO: Total # of broken channels: 0
07:58:01:ST3_smx:INFO: List of broken channels: []
07:58:02:ST3_smx:INFO: Configuring SMX FAST
07:58:03:ST3_smx:INFO: chip: 3-2 21.902970 C 1265.400000 mV
07:58:03:ST3_smx:INFO: Electrons
07:58:03:ST3_smx:INFO: # loops 0
07:58:05:ST3_smx:INFO: # loops 1
07:58:06:ST3_smx:INFO: # loops 2
07:58:08:ST3_smx:INFO: Total # of broken channels: 0
07:58:08:ST3_smx:INFO: List of broken channels: []
07:58:08:ST3_smx:INFO: Total # of broken channels: 0
07:58:08:ST3_smx:INFO: List of broken channels: []
07:58:09:ST3_smx:INFO: Configuring SMX FAST
07:58:11:ST3_smx:INFO: chip: 10-3 59.984250 C 1129.995435 mV
07:58:11:ST3_smx:INFO: Electrons
07:58:11:ST3_smx:INFO: # loops 0
07:58:12:ST3_smx:INFO: # loops 1
07:58:14:ST3_smx:INFO: # loops 2
07:58:15:ST3_smx:INFO: Total # of broken channels: 0
07:58:15:ST3_smx:INFO: List of broken channels: []
07:58:15:ST3_smx:INFO: Total # of broken channels: 0
07:58:15:ST3_smx:INFO: List of broken channels: []
07:58:16:ST3_smx:INFO: Configuring SMX FAST
07:58:18:ST3_smx:INFO: chip: 5-4 40.898880 C 1200.969315 mV
07:58:18:ST3_smx:INFO: Electrons
07:58:18:ST3_smx:INFO: # loops 0
07:58:20:ST3_smx:INFO: # loops 1
07:58:21:ST3_smx:INFO: # loops 2
07:58:23:ST3_smx:INFO: Total # of broken channels: 0
07:58:23:ST3_smx:INFO: List of broken channels: []
07:58:23:ST3_smx:INFO: Total # of broken channels: 0
07:58:23:ST3_smx:INFO: List of broken channels: []
07:58:24:ST3_smx:INFO: Configuring SMX FAST
07:58:25:ST3_smx:INFO: chip: 12-5 50.430383 C 1165.571835 mV
07:58:25:ST3_smx:INFO: Electrons
07:58:26:ST3_smx:INFO: # loops 0
07:58:27:ST3_smx:INFO: # loops 1
07:58:29:ST3_smx:INFO: # loops 2
07:58:30:ST3_smx:INFO: Total # of broken channels: 0
07:58:30:ST3_smx:INFO: List of broken channels: []
07:58:30:ST3_smx:INFO: Total # of broken channels: 0
07:58:30:ST3_smx:INFO: List of broken channels: []
07:58:31:ST3_smx:INFO: Configuring SMX FAST
07:58:33:ST3_smx:INFO: chip: 7-6 40.898880 C 1195.082160 mV
07:58:33:ST3_smx:INFO: Electrons
07:58:33:ST3_smx:INFO: # loops 0
07:58:34:ST3_smx:INFO: # loops 1
07:58:36:ST3_smx:INFO: # loops 2
07:58:37:ST3_smx:INFO: Total # of broken channels: 0
07:58:37:ST3_smx:INFO: List of broken channels: []
07:58:37:ST3_smx:INFO: Total # of broken channels: 0
07:58:37:ST3_smx:INFO: List of broken channels: []
07:58:38:ST3_smx:INFO: Configuring SMX FAST
07:58:40:ST3_smx:INFO: chip: 14-7 47.250730 C 1159.654860 mV
07:58:40:ST3_smx:INFO: Electrons
07:58:40:ST3_smx:INFO: # loops 0
07:58:42:ST3_smx:INFO: # loops 1
07:58:43:ST3_smx:INFO: # loops 2
07:58:45:ST3_smx:INFO: Total # of broken channels: 0
07:58:45:ST3_smx:INFO: List of broken channels: []
07:58:45:ST3_smx:INFO: Total # of broken channels: 0
07:58:45:ST3_smx:INFO: List of broken channels: []
07:58:46:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:58:46:febtest:INFO: 01-00 | XA-000-08-003-000-002-097-12 | 53.6 | 1171.5
07:58:46:febtest:INFO: 08-01 | XA-000-08-003-000-002-102-12 | 40.9 | 1206.9
07:58:46:febtest:INFO: 03-02 | XA-000-08-003-000-002-101-12 | 25.1 | 1265.4
07:58:47:febtest:INFO: 10-03 | XA-000-08-003-000-002-106-12 | 63.2 | 1130.0
07:58:47:febtest:INFO: 05-04 | XA-000-08-003-000-002-105-12 | 40.9 | 1201.0
07:58:47:febtest:INFO: 12-05 | XA-000-08-003-000-002-099-12 | 50.4 | 1165.6
07:58:47:febtest:INFO: 07-06 | XA-000-08-003-000-002-098-12 | 40.9 | 1195.1
07:58:47:febtest:INFO: 14-07 | XA-000-08-003-000-002-103-12 | 50.4 | 1165.6
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_06_25-07_57_32
OPERATOR : Benjamin;
SITE : KIT
SETUP : KIT_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME :
FEB_SN : 3032
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.450', '1.5450', '1.851', '2.5550', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0020', '1.850', '0.5271', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9970', '1.851', '0.3237', '0.000', '0.0000', '0.000', '0.0000']