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FEB_3032 17.06.24 11:22:25
Info
11:22:25:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:22:25:ST3_Shared:INFO: FEB-Microcable
11:22:25:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:22:25:febtest:INFO: Testing FEB with SN 3032
11:22:28:smx_tester:INFO: Scanning setup
11:22:28:elinks:INFO: Disabling clock on downlink 0
11:22:28:elinks:INFO: Disabling clock on downlink 1
11:22:28:elinks:INFO: Disabling clock on downlink 2
11:22:28:elinks:INFO: Disabling clock on downlink 3
11:22:28:elinks:INFO: Disabling clock on downlink 4
11:22:28:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:22:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:22:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:22:28:elinks:INFO: Disabling clock on downlink 0
11:22:28:elinks:INFO: Disabling clock on downlink 1
11:22:28:elinks:INFO: Disabling clock on downlink 2
11:22:28:elinks:INFO: Disabling clock on downlink 3
11:22:28:elinks:INFO: Disabling clock on downlink 4
11:22:28:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:22:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:22:28:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
11:22:28:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
11:22:28:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
11:22:28:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
11:22:28:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
11:22:28:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
11:22:28:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
11:22:28:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
11:22:28:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
11:22:28:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
11:22:28:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
11:22:28:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
11:22:28:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
11:22:28:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
11:22:28:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
11:22:28:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
11:22:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:22:28:elinks:INFO: Disabling clock on downlink 0
11:22:28:elinks:INFO: Disabling clock on downlink 1
11:22:28:elinks:INFO: Disabling clock on downlink 2
11:22:28:elinks:INFO: Disabling clock on downlink 3
11:22:28:elinks:INFO: Disabling clock on downlink 4
11:22:28:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:22:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:22:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:22:28:elinks:INFO: Disabling clock on downlink 0
11:22:28:elinks:INFO: Disabling clock on downlink 1
11:22:28:elinks:INFO: Disabling clock on downlink 2
11:22:28:elinks:INFO: Disabling clock on downlink 3
11:22:28:elinks:INFO: Disabling clock on downlink 4
11:22:28:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:22:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:22:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:22:29:elinks:INFO: Disabling clock on downlink 0
11:22:29:elinks:INFO: Disabling clock on downlink 1
11:22:29:elinks:INFO: Disabling clock on downlink 2
11:22:29:elinks:INFO: Disabling clock on downlink 3
11:22:29:elinks:INFO: Disabling clock on downlink 4
11:22:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:22:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:22:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:22:29:setup_element:INFO: Scanning clock phase
11:22:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:22:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:22:29:setup_element:INFO: Clock phase scan results for group 0, downlink 1
11:22:29:setup_element:INFO: Eye window for uplink 0 : X___________________________________________________________________________XXXX
Clock Delay: 38
11:22:29:setup_element:INFO: Eye window for uplink 1 : X___________________________________________________________________________XXXX
Clock Delay: 38
11:22:29:setup_element:INFO: Eye window for uplink 2 : ___________________________________________________________________________XXXXX
Clock Delay: 37
11:22:29:setup_element:INFO: Eye window for uplink 3 : ___________________________________________________________________________XXXXX
Clock Delay: 37
11:22:29:setup_element:INFO: Eye window for uplink 4 : X__________________________________________________________________________XXXXX
Clock Delay: 37
11:22:29:setup_element:INFO: Eye window for uplink 5 : X__________________________________________________________________________XXXXX
Clock Delay: 37
11:22:29:setup_element:INFO: Eye window for uplink 6 : __________________________________________________________________________XXXXX_
Clock Delay: 36
11:22:29:setup_element:INFO: Eye window for uplink 7 : __________________________________________________________________________XXXXX_
Clock Delay: 36
11:22:29:setup_element:INFO: Eye window for uplink 8 : __________________________________________________________________________XXXXX_
Clock Delay: 36
11:22:29:setup_element:INFO: Eye window for uplink 9 : __________________________________________________________________________XXXXX_
Clock Delay: 36
11:22:29:setup_element:INFO: Eye window for uplink 10: _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:22:29:setup_element:INFO: Eye window for uplink 11: _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:22:29:setup_element:INFO: Eye window for uplink 12: ___________________________________________________________________________XXXXX
Clock Delay: 37
11:22:29:setup_element:INFO: Eye window for uplink 13: ___________________________________________________________________________XXXXX
Clock Delay: 37
11:22:29:setup_element:INFO: Eye window for uplink 14: ___________________________________________________________________________XXXXX
Clock Delay: 37
11:22:29:setup_element:INFO: Eye window for uplink 15: ___________________________________________________________________________XXXXX
Clock Delay: 37
11:22:29:setup_element:INFO: Setting the clock phase to 36 for group 0, downlink 1
11:22:29:setup_element:INFO: Scanning data phases
11:22:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:22:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:22:34:setup_element:INFO: Data phase scan results for group 0, downlink 1
11:22:34:setup_element:INFO: Eye window for uplink 0 : ________XXXX____________________________
Data delay found: 29
11:22:34:setup_element:INFO: Eye window for uplink 1 : ____XXXX________________________________
Data delay found: 25
11:22:34:setup_element:INFO: Eye window for uplink 2 : __XXXXX_________________________________
Data delay found: 24
11:22:34:setup_element:INFO: Eye window for uplink 3 : XXX___________________________________XX
Data delay found: 20
11:22:34:setup_element:INFO: Eye window for uplink 4 : _XXXXX__________________________________
Data delay found: 23
11:22:34:setup_element:INFO: Eye window for uplink 5 : X____________________________________XXX
Data delay found: 18
11:22:34:setup_element:INFO: Eye window for uplink 6 : _________________________________XXXX___
Data delay found: 14
11:22:34:setup_element:INFO: Eye window for uplink 7 : _____________________________XXXXX______
Data delay found: 11
11:22:34:setup_element:INFO: Eye window for uplink 8 : __________________XXXXXX________________
Data delay found: 0
11:22:34:setup_element:INFO: Eye window for uplink 9 : ________________________XXXXX___________
Data delay found: 6
11:22:34:setup_element:INFO: Eye window for uplink 10: ____________________XXXXX_______________
Data delay found: 2
11:22:34:setup_element:INFO: Eye window for uplink 11: ________________________XXXXX___________
Data delay found: 6
11:22:34:setup_element:INFO: Eye window for uplink 12: _______________________XXXXX____________
Data delay found: 5
11:22:34:setup_element:INFO: Eye window for uplink 13: __________________________XXXXX_________
Data delay found: 8
11:22:34:setup_element:INFO: Eye window for uplink 14: ________________________XXXXX___________
Data delay found: 6
11:22:34:setup_element:INFO: Eye window for uplink 15: __________________________XXXXX_________
Data delay found: 8
11:22:34:setup_element:INFO: Setting the data phase to 29 for uplink 0
11:22:34:setup_element:INFO: Setting the data phase to 25 for uplink 1
11:22:34:setup_element:INFO: Setting the data phase to 24 for uplink 2
11:22:34:setup_element:INFO: Setting the data phase to 20 for uplink 3
11:22:34:setup_element:INFO: Setting the data phase to 23 for uplink 4
11:22:34:setup_element:INFO: Setting the data phase to 18 for uplink 5
11:22:34:setup_element:INFO: Setting the data phase to 14 for uplink 6
11:22:34:setup_element:INFO: Setting the data phase to 11 for uplink 7
11:22:34:setup_element:INFO: Setting the data phase to 0 for uplink 8
11:22:34:setup_element:INFO: Setting the data phase to 6 for uplink 9
11:22:34:setup_element:INFO: Setting the data phase to 2 for uplink 10
11:22:34:setup_element:INFO: Setting the data phase to 6 for uplink 11
11:22:34:setup_element:INFO: Setting the data phase to 5 for uplink 12
11:22:34:setup_element:INFO: Setting the data phase to 8 for uplink 13
11:22:34:setup_element:INFO: Setting the data phase to 6 for uplink 14
11:22:34:setup_element:INFO: Setting the data phase to 8 for uplink 15
11:22:34:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 36
Window Length: 72
Eye Windows:
Uplink 0: X___________________________________________________________________________XXXX
Uplink 1: X___________________________________________________________________________XXXX
Uplink 2: ___________________________________________________________________________XXXXX
Uplink 3: ___________________________________________________________________________XXXXX
Uplink 4: X__________________________________________________________________________XXXXX
Uplink 5: X__________________________________________________________________________XXXXX
Uplink 6: __________________________________________________________________________XXXXX_
Uplink 7: __________________________________________________________________________XXXXX_
Uplink 8: __________________________________________________________________________XXXXX_
Uplink 9: __________________________________________________________________________XXXXX_
Uplink 10: _________________________________________________________________________XXXXXX_
Uplink 11: _________________________________________________________________________XXXXXX_
Uplink 12: ___________________________________________________________________________XXXXX
Uplink 13: ___________________________________________________________________________XXXXX
Uplink 14: ___________________________________________________________________________XXXXX
Uplink 15: ___________________________________________________________________________XXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 29
Window Length: 36
Eye Window: ________XXXX____________________________
Uplink 1:
Optimal Phase: 25
Window Length: 36
Eye Window: ____XXXX________________________________
Uplink 2:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 3:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 4:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 5:
Optimal Phase: 18
Window Length: 36
Eye Window: X____________________________________XXX
Uplink 6:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 7:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 8:
Optimal Phase: 0
Window Length: 34
Eye Window: __________________XXXXXX________________
Uplink 9:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 10:
Optimal Phase: 2
Window Length: 35
Eye Window: ____________________XXXXX_______________
Uplink 11:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 12:
Optimal Phase: 5
Window Length: 35
Eye Window: _______________________XXXXX____________
Uplink 13:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 14:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 15:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
]
11:22:34:setup_element:INFO: Beginning SMX ASICs map scan
11:22:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:22:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:22:34:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:22:34:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:22:34:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:22:34:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
11:22:34:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
11:22:35:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:22:35:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:22:35:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
11:22:35:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
11:22:35:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:22:35:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:22:35:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
11:22:35:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
11:22:35:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:22:35:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:22:35:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
11:22:36:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
11:22:36:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:22:36:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:22:37:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 36
Window Length: 72
Eye Windows:
Uplink 0: X___________________________________________________________________________XXXX
Uplink 1: X___________________________________________________________________________XXXX
Uplink 2: ___________________________________________________________________________XXXXX
Uplink 3: ___________________________________________________________________________XXXXX
Uplink 4: X__________________________________________________________________________XXXXX
Uplink 5: X__________________________________________________________________________XXXXX
Uplink 6: __________________________________________________________________________XXXXX_
Uplink 7: __________________________________________________________________________XXXXX_
Uplink 8: __________________________________________________________________________XXXXX_
Uplink 9: __________________________________________________________________________XXXXX_
Uplink 10: _________________________________________________________________________XXXXXX_
Uplink 11: _________________________________________________________________________XXXXXX_
Uplink 12: ___________________________________________________________________________XXXXX
Uplink 13: ___________________________________________________________________________XXXXX
Uplink 14: ___________________________________________________________________________XXXXX
Uplink 15: ___________________________________________________________________________XXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 29
Window Length: 36
Eye Window: ________XXXX____________________________
Uplink 1:
Optimal Phase: 25
Window Length: 36
Eye Window: ____XXXX________________________________
Uplink 2:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 3:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 4:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 5:
Optimal Phase: 18
Window Length: 36
Eye Window: X____________________________________XXX
Uplink 6:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 7:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 8:
Optimal Phase: 0
Window Length: 34
Eye Window: __________________XXXXXX________________
Uplink 9:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 10:
Optimal Phase: 2
Window Length: 35
Eye Window: ____________________XXXXX_______________
Uplink 11:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 12:
Optimal Phase: 5
Window Length: 35
Eye Window: _______________________XXXXX____________
Uplink 13:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 14:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 15:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
11:22:37:setup_element:INFO: Performing Elink synchronization
11:22:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:22:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:22:37:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:22:37:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:22:37:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
11:22:37:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:22:37:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
FEB type: A FEB_A: 1 FEB_B: 0
11:22:38:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:22:39:febtest:INFO: 01-00 | XA-000-08-003-000-002-238-06 | 31.4 | 1206.9
11:22:39:febtest:INFO: 08-01 | XA-000-08-003-000-002-241-01 | 18.7 | 1253.7
11:22:39:febtest:INFO: 03-02 | XA-000-08-003-000-002-245-01 | 31.4 | 1201.0
11:22:39:febtest:INFO: 10-03 | XA-000-08-003-000-002-247-01 | 31.4 | 1218.6
11:22:39:febtest:INFO: 05-04 | XA-000-08-003-000-002-237-06 | 31.4 | 1201.0
11:22:40:febtest:INFO: 12-05 | XA-000-08-003-000-002-235-06 | 25.1 | 1224.5
11:22:40:febtest:INFO: 07-06 | XA-000-08-003-000-002-248-01 | 34.6 | 1183.3
11:22:40:febtest:INFO: 14-07 | XA-000-08-003-000-002-240-01 | 37.7 | 1183.3
11:22:40:ST3_smx:INFO: Configuring SMX FAST
11:22:42:ST3_smx:INFO: chip: 1-0 34.556970 C 1200.969315 mV
11:22:42:ST3_smx:INFO: Electrons
11:22:42:ST3_smx:INFO: # loops 0
11:22:43:ST3_smx:INFO: # loops 1
11:22:45:ST3_smx:INFO: # loops 2
11:22:47:ST3_smx:INFO: Total # of broken channels: 0
11:22:47:ST3_smx:INFO: List of broken channels: []
11:22:47:ST3_smx:INFO: Total # of broken channels: 0
11:22:47:ST3_smx:INFO: List of broken channels: []
11:22:48:ST3_smx:INFO: Configuring SMX FAST
11:22:50:ST3_smx:INFO: chip: 8-1 34.556970 C 1195.082160 mV
11:22:50:ST3_smx:INFO: Electrons
11:22:50:ST3_smx:INFO: # loops 0
11:22:51:ST3_smx:INFO: # loops 1
11:22:53:ST3_smx:INFO: # loops 2
11:22:54:ST3_smx:INFO: Total # of broken channels: 0
11:22:54:ST3_smx:INFO: List of broken channels: []
11:22:54:ST3_smx:INFO: Total # of broken channels: 0
11:22:54:ST3_smx:INFO: List of broken channels: []
11:22:55:ST3_smx:INFO: Configuring SMX FAST
11:22:57:ST3_smx:INFO: chip: 3-2 34.556970 C 1195.082160 mV
11:22:57:ST3_smx:INFO: Electrons
11:22:57:ST3_smx:INFO: # loops 0
11:22:59:ST3_smx:INFO: # loops 1
11:23:00:ST3_smx:INFO: # loops 2
11:23:02:ST3_smx:INFO: Total # of broken channels: 0
11:23:02:ST3_smx:INFO: List of broken channels: []
11:23:02:ST3_smx:INFO: Total # of broken channels: 0
11:23:02:ST3_smx:INFO: List of broken channels: []
11:23:03:ST3_smx:INFO: Configuring SMX FAST
11:23:05:ST3_smx:INFO: chip: 10-3 37.726682 C 1195.082160 mV
11:23:05:ST3_smx:INFO: Electrons
11:23:05:ST3_smx:INFO: # loops 0
11:23:06:ST3_smx:INFO: # loops 1
11:23:08:ST3_smx:INFO: # loops 2
11:23:09:ST3_smx:INFO: Total # of broken channels: 0
11:23:09:ST3_smx:INFO: List of broken channels: []
11:23:09:ST3_smx:INFO: Total # of broken channels: 0
11:23:09:ST3_smx:INFO: List of broken channels: []
11:23:10:ST3_smx:INFO: Configuring SMX FAST
11:23:12:ST3_smx:INFO: chip: 5-4 34.556970 C 1195.082160 mV
11:23:12:ST3_smx:INFO: Electrons
11:23:12:ST3_smx:INFO: # loops 0
11:23:14:ST3_smx:INFO: # loops 1
11:23:15:ST3_smx:INFO: # loops 2
11:23:17:ST3_smx:INFO: Total # of broken channels: 0
11:23:17:ST3_smx:INFO: List of broken channels: []
11:23:17:ST3_smx:INFO: Total # of broken channels: 0
11:23:17:ST3_smx:INFO: List of broken channels: []
11:23:18:ST3_smx:INFO: Configuring SMX FAST
11:23:20:ST3_smx:INFO: chip: 12-5 21.902970 C 1247.887635 mV
11:23:20:ST3_smx:INFO: Electrons
11:23:20:ST3_smx:INFO: # loops 0
11:23:21:ST3_smx:INFO: # loops 1
11:23:23:ST3_smx:INFO: # loops 2
11:23:24:ST3_smx:INFO: Total # of broken channels: 0
11:23:24:ST3_smx:INFO: List of broken channels: []
11:23:24:ST3_smx:INFO: Total # of broken channels: 0
11:23:24:ST3_smx:INFO: List of broken channels: []
11:23:25:ST3_smx:INFO: Configuring SMX FAST
11:23:27:ST3_smx:INFO: chip: 7-6 37.726682 C 1183.292940 mV
11:23:27:ST3_smx:INFO: Electrons
11:23:27:ST3_smx:INFO: # loops 0
11:23:29:ST3_smx:INFO: # loops 1
11:23:30:ST3_smx:INFO: # loops 2
11:23:32:ST3_smx:INFO: Total # of broken channels: 0
11:23:32:ST3_smx:INFO: List of broken channels: []
11:23:32:ST3_smx:INFO: Total # of broken channels: 0
11:23:32:ST3_smx:INFO: List of broken channels: []
11:23:33:ST3_smx:INFO: Configuring SMX FAST
11:23:34:ST3_smx:INFO: chip: 14-7 44.073563 C 1183.292940 mV
11:23:34:ST3_smx:INFO: Electrons
11:23:34:ST3_smx:INFO: # loops 0
11:23:36:ST3_smx:INFO: # loops 1
11:23:38:ST3_smx:INFO: # loops 2
11:23:39:ST3_smx:INFO: Total # of broken channels: 0
11:23:39:ST3_smx:INFO: List of broken channels: []
11:23:39:ST3_smx:INFO: Total # of broken channels: 0
11:23:39:ST3_smx:INFO: List of broken channels: []
11:23:40:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:23:40:febtest:INFO: 01-00 | XA-000-08-003-000-002-238-06 | 37.7 | 1201.0
11:23:40:febtest:INFO: 08-01 | XA-000-08-003-000-002-241-01 | 37.7 | 1195.1
11:23:41:febtest:INFO: 03-02 | XA-000-08-003-000-002-245-01 | 37.7 | 1195.1
11:23:41:febtest:INFO: 10-03 | XA-000-08-003-000-002-247-01 | 37.7 | 1195.1
11:23:41:febtest:INFO: 05-04 | XA-000-08-003-000-002-237-06 | 34.6 | 1201.0
11:23:41:febtest:INFO: 12-05 | XA-000-08-003-000-002-235-06 | 21.9 | 1242.0
11:23:42:febtest:INFO: 07-06 | XA-000-08-003-000-002-248-01 | 40.9 | 1183.3
11:23:42:febtest:INFO: 14-07 | XA-000-08-003-000-002-240-01 | 44.1 | 1183.3
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_06_17-11_22_25
OPERATOR : Henrik;
SITE : KIT
SETUP : KIT_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L6UL201035 M6UL2T4010354B2 124 C
FEB_SN : 3032
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.450', '1.4540', '1.850', '2.4330', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9700', '1.850', '0.5456', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9660', '1.850', '0.3193', '0.000', '0.0000', '0.000', '0.0000']