FEB_3033 19.06.24 13:33:01
Info
13:33:01:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:33:01:ST3_Shared:INFO: FEB-Sensor
13:33:01:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:33:02:ST3_ModuleSelector:INFO: L6UL201035 M6UL2T2010352B2 62 A
13:33:02:ST3_ModuleSelector:INFO: 10233
13:33:03:febtest:INFO: Testing FEB with SN 3033
13:33:05:smx_tester:INFO: Scanning setup
13:33:05:elinks:INFO: Disabling clock on downlink 0
13:33:05:elinks:INFO: Disabling clock on downlink 1
13:33:05:elinks:INFO: Disabling clock on downlink 2
13:33:05:elinks:INFO: Disabling clock on downlink 3
13:33:05:elinks:INFO: Disabling clock on downlink 4
13:33:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:33:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:33:06:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:33:06:elinks:INFO: Disabling clock on downlink 0
13:33:06:elinks:INFO: Disabling clock on downlink 1
13:33:06:elinks:INFO: Disabling clock on downlink 2
13:33:06:elinks:INFO: Disabling clock on downlink 3
13:33:06:elinks:INFO: Disabling clock on downlink 4
13:33:06:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:33:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:33:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
13:33:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
13:33:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
13:33:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
13:33:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
13:33:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
13:33:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
13:33:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
13:33:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
13:33:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
13:33:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
13:33:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
13:33:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
13:33:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
13:33:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
13:33:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
13:33:06:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:33:06:elinks:INFO: Disabling clock on downlink 0
13:33:06:elinks:INFO: Disabling clock on downlink 1
13:33:06:elinks:INFO: Disabling clock on downlink 2
13:33:06:elinks:INFO: Disabling clock on downlink 3
13:33:06:elinks:INFO: Disabling clock on downlink 4
13:33:06:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:33:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:33:06:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:33:06:elinks:INFO: Disabling clock on downlink 0
13:33:06:elinks:INFO: Disabling clock on downlink 1
13:33:06:elinks:INFO: Disabling clock on downlink 2
13:33:06:elinks:INFO: Disabling clock on downlink 3
13:33:06:elinks:INFO: Disabling clock on downlink 4
13:33:06:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:33:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:33:06:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:33:06:elinks:INFO: Disabling clock on downlink 0
13:33:06:elinks:INFO: Disabling clock on downlink 1
13:33:06:elinks:INFO: Disabling clock on downlink 2
13:33:06:elinks:INFO: Disabling clock on downlink 3
13:33:06:elinks:INFO: Disabling clock on downlink 4
13:33:06:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:33:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:33:06:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:33:06:setup_element:INFO: Scanning clock phase
13:33:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:33:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:33:06:setup_element:INFO: Clock phase scan results for group 0, downlink 1
13:33:06:setup_element:INFO: Eye window for uplink 0 : X__________________________________________________________________________XXXXX
Clock Delay: 37
13:33:06:setup_element:INFO: Eye window for uplink 1 : X__________________________________________________________________________XXXXX
Clock Delay: 37
13:33:06:setup_element:INFO: Eye window for uplink 2 : ___________________________________________________________________________XXXXX
Clock Delay: 37
13:33:06:setup_element:INFO: Eye window for uplink 3 : ___________________________________________________________________________XXXXX
Clock Delay: 37
13:33:06:setup_element:INFO: Eye window for uplink 4 : __________________________________________________________________________XXXXX_
Clock Delay: 36
13:33:06:setup_element:INFO: Eye window for uplink 5 : __________________________________________________________________________XXXXX_
Clock Delay: 36
13:33:06:setup_element:INFO: Eye window for uplink 6 : X__________________________________________________________________________XXXXX
Clock Delay: 37
13:33:06:setup_element:INFO: Eye window for uplink 7 : X__________________________________________________________________________XXXXX
Clock Delay: 37
13:33:06:setup_element:INFO: Eye window for uplink 8 : __________________________________________________________________________XXXXX_
Clock Delay: 36
13:33:06:setup_element:INFO: Eye window for uplink 9 : __________________________________________________________________________XXXXX_
Clock Delay: 36
13:33:06:setup_element:INFO: Eye window for uplink 10: _________________________________________________________________________XXXXXX_
Clock Delay: 35
13:33:06:setup_element:INFO: Eye window for uplink 11: _________________________________________________________________________XXXXXX_
Clock Delay: 35
13:33:06:setup_element:INFO: Eye window for uplink 12: __________________________________________________________________________XXXXX_
Clock Delay: 36
13:33:06:setup_element:INFO: Eye window for uplink 13: __________________________________________________________________________XXXXX_
Clock Delay: 36
13:33:06:setup_element:INFO: Eye window for uplink 14: __________________________________________________________________________XXXXX_
Clock Delay: 36
13:33:06:setup_element:INFO: Eye window for uplink 15: __________________________________________________________________________XXXXX_
Clock Delay: 36
13:33:06:setup_element:INFO: Setting the clock phase to 36 for group 0, downlink 1
13:33:06:setup_element:INFO: Scanning data phases
13:33:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:33:07:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:33:11:setup_element:INFO: Data phase scan results for group 0, downlink 1
13:33:11:setup_element:INFO: Eye window for uplink 0 : ______XXXX______________________________
Data delay found: 27
13:33:11:setup_element:INFO: Eye window for uplink 1 : __XXXX__________________________________
Data delay found: 23
13:33:11:setup_element:INFO: Eye window for uplink 2 : __XXXXX_________________________________
Data delay found: 24
13:33:11:setup_element:INFO: Eye window for uplink 3 : XXX__________________________________XXX
Data delay found: 19
13:33:11:setup_element:INFO: Eye window for uplink 4 : XXX__________________________________XXX
Data delay found: 19
13:33:11:setup_element:INFO: Eye window for uplink 5 : __________________________________XXXX__
Data delay found: 15
13:33:11:setup_element:INFO: Eye window for uplink 6 : ________________________________XXXXXX__
Data delay found: 14
13:33:11:setup_element:INFO: Eye window for uplink 7 : _____________________________XXXXX______
Data delay found: 11
13:33:11:setup_element:INFO: Eye window for uplink 8 : __________________XXXXXX________________
Data delay found: 0
13:33:11:setup_element:INFO: Eye window for uplink 9 : _______________________XXXXX____________
Data delay found: 5
13:33:11:setup_element:INFO: Eye window for uplink 10: __________________XXXXXX________________
Data delay found: 0
13:33:11:setup_element:INFO: Eye window for uplink 11: ______________________XXXXX_____________
Data delay found: 4
13:33:11:setup_element:INFO: Eye window for uplink 12: ______________________XXXXX_____________
Data delay found: 4
13:33:11:setup_element:INFO: Eye window for uplink 13: __________________________XXXX__________
Data delay found: 7
13:33:11:setup_element:INFO: Eye window for uplink 14: _____________________XXXXX______________
Data delay found: 3
13:33:11:setup_element:INFO: Eye window for uplink 15: ________________________XXXXX___________
Data delay found: 6
13:33:11:setup_element:INFO: Setting the data phase to 27 for uplink 0
13:33:11:setup_element:INFO: Setting the data phase to 23 for uplink 1
13:33:11:setup_element:INFO: Setting the data phase to 24 for uplink 2
13:33:11:setup_element:INFO: Setting the data phase to 19 for uplink 3
13:33:11:setup_element:INFO: Setting the data phase to 19 for uplink 4
13:33:12:setup_element:INFO: Setting the data phase to 15 for uplink 5
13:33:12:setup_element:INFO: Setting the data phase to 14 for uplink 6
13:33:12:setup_element:INFO: Setting the data phase to 11 for uplink 7
13:33:12:setup_element:INFO: Setting the data phase to 0 for uplink 8
13:33:12:setup_element:INFO: Setting the data phase to 5 for uplink 9
13:33:12:setup_element:INFO: Setting the data phase to 0 for uplink 10
13:33:12:setup_element:INFO: Setting the data phase to 4 for uplink 11
13:33:12:setup_element:INFO: Setting the data phase to 4 for uplink 12
13:33:12:setup_element:INFO: Setting the data phase to 7 for uplink 13
13:33:12:setup_element:INFO: Setting the data phase to 3 for uplink 14
13:33:12:setup_element:INFO: Setting the data phase to 6 for uplink 15
13:33:12:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 36
Window Length: 72
Eye Windows:
Uplink 0: X__________________________________________________________________________XXXXX
Uplink 1: X__________________________________________________________________________XXXXX
Uplink 2: ___________________________________________________________________________XXXXX
Uplink 3: ___________________________________________________________________________XXXXX
Uplink 4: __________________________________________________________________________XXXXX_
Uplink 5: __________________________________________________________________________XXXXX_
Uplink 6: X__________________________________________________________________________XXXXX
Uplink 7: X__________________________________________________________________________XXXXX
Uplink 8: __________________________________________________________________________XXXXX_
Uplink 9: __________________________________________________________________________XXXXX_
Uplink 10: _________________________________________________________________________XXXXXX_
Uplink 11: _________________________________________________________________________XXXXXX_
Uplink 12: __________________________________________________________________________XXXXX_
Uplink 13: __________________________________________________________________________XXXXX_
Uplink 14: __________________________________________________________________________XXXXX_
Uplink 15: __________________________________________________________________________XXXXX_
Data phase characteristics:
Uplink 0:
Optimal Phase: 27
Window Length: 36
Eye Window: ______XXXX______________________________
Uplink 1:
Optimal Phase: 23
Window Length: 36
Eye Window: __XXXX__________________________________
Uplink 2:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 3:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 4:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 5:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 6:
Optimal Phase: 14
Window Length: 34
Eye Window: ________________________________XXXXXX__
Uplink 7:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 8:
Optimal Phase: 0
Window Length: 34
Eye Window: __________________XXXXXX________________
Uplink 9:
Optimal Phase: 5
Window Length: 35
Eye Window: _______________________XXXXX____________
Uplink 10:
Optimal Phase: 0
Window Length: 34
Eye Window: __________________XXXXXX________________
Uplink 11:
Optimal Phase: 4
Window Length: 35
Eye Window: ______________________XXXXX_____________
Uplink 12:
Optimal Phase: 4
Window Length: 35
Eye Window: ______________________XXXXX_____________
Uplink 13:
Optimal Phase: 7
Window Length: 36
Eye Window: __________________________XXXX__________
Uplink 14:
Optimal Phase: 3
Window Length: 35
Eye Window: _____________________XXXXX______________
Uplink 15:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
]
13:33:12:setup_element:INFO: Beginning SMX ASICs map scan
13:33:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:33:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:33:12:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:33:12:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:33:12:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:33:12:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
13:33:12:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
13:33:12:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:33:12:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:33:12:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
13:33:12:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
13:33:12:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:33:12:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:33:12:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:33:12:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:33:13:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:33:13:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:33:13:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:33:13:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:33:13:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:33:13:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:33:14:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 36
Window Length: 72
Eye Windows:
Uplink 0: X__________________________________________________________________________XXXXX
Uplink 1: X__________________________________________________________________________XXXXX
Uplink 2: ___________________________________________________________________________XXXXX
Uplink 3: ___________________________________________________________________________XXXXX
Uplink 4: __________________________________________________________________________XXXXX_
Uplink 5: __________________________________________________________________________XXXXX_
Uplink 6: X__________________________________________________________________________XXXXX
Uplink 7: X__________________________________________________________________________XXXXX
Uplink 8: __________________________________________________________________________XXXXX_
Uplink 9: __________________________________________________________________________XXXXX_
Uplink 10: _________________________________________________________________________XXXXXX_
Uplink 11: _________________________________________________________________________XXXXXX_
Uplink 12: __________________________________________________________________________XXXXX_
Uplink 13: __________________________________________________________________________XXXXX_
Uplink 14: __________________________________________________________________________XXXXX_
Uplink 15: __________________________________________________________________________XXXXX_
Data phase characteristics:
Uplink 0:
Optimal Phase: 27
Window Length: 36
Eye Window: ______XXXX______________________________
Uplink 1:
Optimal Phase: 23
Window Length: 36
Eye Window: __XXXX__________________________________
Uplink 2:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 3:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 4:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 5:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 6:
Optimal Phase: 14
Window Length: 34
Eye Window: ________________________________XXXXXX__
Uplink 7:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 8:
Optimal Phase: 0
Window Length: 34
Eye Window: __________________XXXXXX________________
Uplink 9:
Optimal Phase: 5
Window Length: 35
Eye Window: _______________________XXXXX____________
Uplink 10:
Optimal Phase: 0
Window Length: 34
Eye Window: __________________XXXXXX________________
Uplink 11:
Optimal Phase: 4
Window Length: 35
Eye Window: ______________________XXXXX_____________
Uplink 12:
Optimal Phase: 4
Window Length: 35
Eye Window: ______________________XXXXX_____________
Uplink 13:
Optimal Phase: 7
Window Length: 36
Eye Window: __________________________XXXX__________
Uplink 14:
Optimal Phase: 3
Window Length: 35
Eye Window: _____________________XXXXX______________
Uplink 15:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
13:33:14:setup_element:INFO: Performing Elink synchronization
13:33:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:33:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:33:14:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:33:14:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:33:14:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
13:33:14:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:33:14:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0_1 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_0__upli_1
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4_5 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_4__upli_5
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_6__upli_7
FEB type: A FEB_A: 1 FEB_B: 0
13:33:16:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:33:16:febtest:INFO: 01-00 | XA-000-08-003-000-003-015-10 | 44.1 | 1165.6
13:33:16:febtest:INFO: 08-01 | XA-000-08-003-000-003-009-10 | 53.6 | 1135.9
13:33:16:febtest:INFO: 03-02 | XA-000-08-003-000-003-011-10 | 34.6 | 1206.9
13:33:16:febtest:INFO: 10-03 | XA-000-08-003-000-003-017-13 | 47.3 | 1159.7
13:33:17:febtest:INFO: 05-04 | XA-000-08-003-000-003-018-13 | 40.9 | 1177.4
13:33:17:febtest:INFO: 12-05 | XA-000-08-003-000-003-013-10 | 31.4 | 1212.7
13:33:17:febtest:INFO: 07-06 | XA-000-08-003-000-003-014-10 | 31.4 | 1206.9
13:33:17:febtest:INFO: 14-07 | XA-000-08-003-000-003-008-10 | 25.1 | 1230.3
13:33:18:ST3_smx:INFO: Configuring SMX FAST
13:33:20:ST3_smx:INFO: chip: 1-0 47.250730 C 1165.571835 mV
13:33:20:ST3_smx:INFO: Electrons
13:33:20:ST3_smx:INFO: # loops 0
13:33:21:ST3_smx:INFO: # loops 1
13:33:23:ST3_smx:INFO: # loops 2
13:33:24:ST3_smx:INFO: # loops 3
13:33:26:ST3_smx:INFO: # loops 4
13:33:27:ST3_smx:INFO: Total # of broken channels: 0
13:33:27:ST3_smx:INFO: List of broken channels: []
13:33:27:ST3_smx:INFO: Total # of broken channels: 0
13:33:27:ST3_smx:INFO: List of broken channels: []
13:33:28:ST3_smx:INFO: Configuring SMX FAST
13:33:31:ST3_smx:INFO: chip: 8-1 50.430383 C 1153.732915 mV
13:33:31:ST3_smx:INFO: Electrons
13:33:31:ST3_smx:INFO: # loops 0
13:33:32:ST3_smx:INFO: # loops 1
13:33:34:ST3_smx:INFO: # loops 2
13:33:36:ST3_smx:INFO: # loops 3
13:33:38:ST3_smx:INFO: # loops 4
13:33:39:ST3_smx:INFO: Total # of broken channels: 0
13:33:39:ST3_smx:INFO: List of broken channels: []
13:33:39:ST3_smx:INFO: Total # of broken channels: 0
13:33:39:ST3_smx:INFO: List of broken channels: []
13:33:40:ST3_smx:INFO: Configuring SMX FAST
13:33:42:ST3_smx:INFO: chip: 3-2 44.073563 C 1189.190035 mV
13:33:42:ST3_smx:INFO: Electrons
13:33:42:ST3_smx:INFO: # loops 0
13:33:44:ST3_smx:INFO: # loops 1
13:33:46:ST3_smx:INFO: # loops 2
13:33:47:ST3_smx:INFO: # loops 3
13:33:49:ST3_smx:INFO: # loops 4
13:33:51:ST3_smx:INFO: Total # of broken channels: 0
13:33:51:ST3_smx:INFO: List of broken channels: []
13:33:51:ST3_smx:INFO: Total # of broken channels: 0
13:33:51:ST3_smx:INFO: List of broken channels: []
13:33:52:ST3_smx:INFO: Configuring SMX FAST
13:33:54:ST3_smx:INFO: chip: 10-3 47.250730 C 1177.390875 mV
13:33:54:ST3_smx:INFO: Electrons
13:33:54:ST3_smx:INFO: # loops 0
13:33:55:ST3_smx:INFO: # loops 1
13:33:57:ST3_smx:INFO: # loops 2
13:33:59:ST3_smx:INFO: # loops 3
13:34:00:ST3_smx:INFO: # loops 4
13:34:02:ST3_smx:INFO: Total # of broken channels: 0
13:34:02:ST3_smx:INFO: List of broken channels: []
13:34:02:ST3_smx:INFO: Total # of broken channels: 0
13:34:02:ST3_smx:INFO: List of broken channels: []
13:34:03:ST3_smx:INFO: Configuring SMX FAST
13:34:05:ST3_smx:INFO: chip: 5-4 40.898880 C 1200.969315 mV
13:34:05:ST3_smx:INFO: Electrons
13:34:05:ST3_smx:INFO: # loops 0
13:34:07:ST3_smx:INFO: # loops 1
13:34:09:ST3_smx:INFO: # loops 2
13:34:10:ST3_smx:INFO: # loops 3
13:34:12:ST3_smx:INFO: # loops 4
13:34:14:ST3_smx:INFO: Total # of broken channels: 0
13:34:14:ST3_smx:INFO: List of broken channels: []
13:34:14:ST3_smx:INFO: Total # of broken channels: 0
13:34:14:ST3_smx:INFO: List of broken channels: []
13:34:15:ST3_smx:INFO: Configuring SMX FAST
13:34:17:ST3_smx:INFO: chip: 12-5 40.898880 C 1195.082160 mV
13:34:17:ST3_smx:INFO: Electrons
13:34:17:ST3_smx:INFO: # loops 0
13:34:18:ST3_smx:INFO: # loops 1
13:34:20:ST3_smx:INFO: # loops 2
13:34:22:ST3_smx:INFO: # loops 3
13:34:23:ST3_smx:INFO: # loops 4
13:34:25:ST3_smx:INFO: Total # of broken channels: 0
13:34:25:ST3_smx:INFO: List of broken channels: []
13:34:25:ST3_smx:INFO: Total # of broken channels: 1
13:34:25:ST3_smx:INFO: List of broken channels: [6]
13:34:26:ST3_smx:INFO: Configuring SMX FAST
13:34:28:ST3_smx:INFO: chip: 7-6 37.726682 C 1212.728715 mV
13:34:28:ST3_smx:INFO: Electrons
13:34:28:ST3_smx:INFO: # loops 0
13:34:29:ST3_smx:INFO: # loops 1
13:34:31:ST3_smx:INFO: # loops 2
13:34:32:ST3_smx:INFO: # loops 3
13:34:34:ST3_smx:INFO: # loops 4
13:34:36:ST3_smx:INFO: Total # of broken channels: 0
13:34:36:ST3_smx:INFO: List of broken channels: []
13:34:36:ST3_smx:INFO: Total # of broken channels: 0
13:34:36:ST3_smx:INFO: List of broken channels: []
13:34:36:ST3_smx:INFO: Configuring SMX FAST
13:34:39:ST3_smx:INFO: chip: 14-7 40.898880 C 1183.292940 mV
13:34:39:ST3_smx:INFO: Electrons
13:34:39:ST3_smx:INFO: # loops 0
13:34:40:ST3_smx:INFO: # loops 1
13:34:42:ST3_smx:INFO: # loops 2
13:34:43:ST3_smx:INFO: # loops 3
13:34:45:ST3_smx:INFO: # loops 4
13:34:47:ST3_smx:INFO: Total # of broken channels: 0
13:34:47:ST3_smx:INFO: List of broken channels: []
13:34:47:ST3_smx:INFO: Total # of broken channels: 0
13:34:47:ST3_smx:INFO: List of broken channels: []
13:34:48:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:34:48:febtest:INFO: 01-00 | XA-000-08-003-000-003-015-10 | 53.6 | 1165.6
13:34:48:febtest:INFO: 08-01 | XA-000-08-003-000-003-009-10 | 56.8 | 1153.7
13:34:48:febtest:INFO: 03-02 | XA-000-08-003-000-003-011-10 | 47.3 | 1189.2
13:34:49:febtest:INFO: 10-03 | XA-000-08-003-000-003-017-13 | 50.4 | 1177.4
13:34:49:febtest:INFO: 05-04 | XA-000-08-003-000-003-018-13 | 40.9 | 1201.0
13:34:49:febtest:INFO: 12-05 | XA-000-08-003-000-003-013-10 | 44.1 | 1195.1
13:34:49:febtest:INFO: 07-06 | XA-000-08-003-000-003-014-10 | 37.7 | 1212.7
13:34:50:febtest:INFO: 14-07 | XA-000-08-003-000-003-008-10 | 40.9 | 1183.3
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_06_19-13_33_01
OPERATOR : Henrik;
SITE : KIT
SETUP : KIT_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L6UL201035 M6UL2T2010352B2 62 A
FEB_SN : 3033
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID: 10233
MODULE_NAME: L6UL201035 M6UL2T2010352B2 62 A
MODULE_TYPE:
MODULE_LADDER: L6UL201035
MODULE_MODULE: M6UL2T2010352B2
MODULE_SIZE: 62
MODULE_GRADE: A
---------------------------------------
VI_before_Init : ['2.450', '1.9080', '1.851', '0.5189', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0080', '1.850', '0.5815', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '2.0040', '1.850', '0.3215', '0.000', '0.0000', '0.000', '0.0000']