14:50:08:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:50:08:ST3_Shared:INFO:	                         FEB-Sensor                         
14:50:08:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:50:11:ST3_ModuleSelector:INFO:	L6UL201035 M6UL2B0010350A2 42 A

14:50:11:ST3_ModuleSelector:INFO:	07062

14:50:11:febtest:INFO:	Testing FEB with SN 3036
14:50:14:smx_tester:INFO:	Scanning setup
14:50:14:elinks:INFO:	Disabling clock on downlink 0
14:50:14:elinks:INFO:	Disabling clock on downlink 1
14:50:14:elinks:INFO:	Disabling clock on downlink 2
14:50:14:elinks:INFO:	Disabling clock on downlink 3
14:50:14:elinks:INFO:	Disabling clock on downlink 4
14:50:14:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:50:14:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
14:50:14:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:50:14:elinks:INFO:	Disabling clock on downlink 0
14:50:14:elinks:INFO:	Disabling clock on downlink 1
14:50:14:elinks:INFO:	Disabling clock on downlink 2
14:50:14:elinks:INFO:	Disabling clock on downlink 3
14:50:14:elinks:INFO:	Disabling clock on downlink 4
14:50:14:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:50:14:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:50:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
14:50:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
14:50:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
14:50:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
14:50:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
14:50:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
14:50:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
14:50:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
14:50:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
14:50:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
14:50:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
14:50:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
14:50:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
14:50:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
14:50:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
14:50:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
14:50:14:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:50:14:elinks:INFO:	Disabling clock on downlink 0
14:50:14:elinks:INFO:	Disabling clock on downlink 1
14:50:14:elinks:INFO:	Disabling clock on downlink 2
14:50:14:elinks:INFO:	Disabling clock on downlink 3
14:50:14:elinks:INFO:	Disabling clock on downlink 4
14:50:14:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:50:14:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:50:14:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:50:14:elinks:INFO:	Disabling clock on downlink 0
14:50:14:elinks:INFO:	Disabling clock on downlink 1
14:50:14:elinks:INFO:	Disabling clock on downlink 2
14:50:14:elinks:INFO:	Disabling clock on downlink 3
14:50:14:elinks:INFO:	Disabling clock on downlink 4
14:50:14:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:50:14:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
14:50:14:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:50:14:elinks:INFO:	Disabling clock on downlink 0
14:50:14:elinks:INFO:	Disabling clock on downlink 1
14:50:14:elinks:INFO:	Disabling clock on downlink 2
14:50:14:elinks:INFO:	Disabling clock on downlink 3
14:50:14:elinks:INFO:	Disabling clock on downlink 4
14:50:14:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:50:14:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
14:50:14:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:50:14:setup_element:INFO:	Scanning clock phase
14:50:14:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:50:15:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:50:15:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
14:50:15:setup_element:INFO:	Eye window for uplink 0 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:50:15:setup_element:INFO:	Eye window for uplink 1 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:50:15:setup_element:INFO:	Eye window for uplink 2 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:50:15:setup_element:INFO:	Eye window for uplink 3 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:50:15:setup_element:INFO:	Eye window for uplink 4 : _____________________________________________________________________XXXXXX_____
Clock Delay: 31
14:50:15:setup_element:INFO:	Eye window for uplink 5 : _____________________________________________________________________XXXXXX_____
Clock Delay: 31
14:50:15:setup_element:INFO:	Eye window for uplink 6 : ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
14:50:15:setup_element:INFO:	Eye window for uplink 7 : ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
14:50:15:setup_element:INFO:	Eye window for uplink 8 : ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
14:50:15:setup_element:INFO:	Eye window for uplink 9 : ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
14:50:15:setup_element:INFO:	Eye window for uplink 10: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
14:50:15:setup_element:INFO:	Eye window for uplink 11: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
14:50:15:setup_element:INFO:	Eye window for uplink 12: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
14:50:15:setup_element:INFO:	Eye window for uplink 13: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
14:50:15:setup_element:INFO:	Eye window for uplink 14: ____________________________________________________________________XXXXXX______
Clock Delay: 30
14:50:15:setup_element:INFO:	Eye window for uplink 15: ____________________________________________________________________XXXXXX______
Clock Delay: 30
14:50:15:setup_element:INFO:	Setting the clock phase to 32 for group 0, downlink 1
14:50:15:setup_element:INFO:	Scanning data phases
14:50:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:50:15:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:50:20:setup_element:INFO:	Data phase scan results for group 0, downlink 1
14:50:20:setup_element:INFO:	Eye window for uplink 0 : __XXXXXXXX______________________________
Data delay found: 25
14:50:20:setup_element:INFO:	Eye window for uplink 1 : XXXXXX________________________________XX
Data delay found: 21
14:50:20:setup_element:INFO:	Eye window for uplink 2 : _XXXXXX_________________________________
Data delay found: 23
14:50:20:setup_element:INFO:	Eye window for uplink 3 : XXXX_________________________________XXX
Data delay found: 20
14:50:20:setup_element:INFO:	Eye window for uplink 4 : X_________________________________XXXXXX
Data delay found: 17
14:50:20:setup_element:INFO:	Eye window for uplink 5 : _______________________________XXXXXX___
Data delay found: 13
14:50:20:setup_element:INFO:	Eye window for uplink 6 : ___________________________XXXXXXXX_____
Data delay found: 10
14:50:20:setup_element:INFO:	Eye window for uplink 7 : ________________________XXXXXX__________
Data delay found: 6
14:50:20:setup_element:INFO:	Eye window for uplink 8 : _______________XXXXXXX__________________
Data delay found: 38
14:50:20:setup_element:INFO:	Eye window for uplink 9 : ___________________XXXXXXX______________
Data delay found: 2
14:50:20:setup_element:INFO:	Eye window for uplink 10: __________________XXXXXXXX______________
Data delay found: 1
14:50:20:setup_element:INFO:	Eye window for uplink 11: ______________________XXXXXXX___________
Data delay found: 5
14:50:20:setup_element:INFO:	Eye window for uplink 12: ______________________XXXXXX____________
Data delay found: 4
14:50:20:setup_element:INFO:	Eye window for uplink 13: __________________________XXXXX_________
Data delay found: 8
14:50:20:setup_element:INFO:	Eye window for uplink 14: __________________XXXXXX________________
Data delay found: 0
14:50:20:setup_element:INFO:	Eye window for uplink 15: _____________________XXXXXXX____________
Data delay found: 4
14:50:20:setup_element:INFO:	Setting the data phase to 25 for uplink 0
14:50:20:setup_element:INFO:	Setting the data phase to 21 for uplink 1
14:50:20:setup_element:INFO:	Setting the data phase to 23 for uplink 2
14:50:20:setup_element:INFO:	Setting the data phase to 20 for uplink 3
14:50:20:setup_element:INFO:	Setting the data phase to 17 for uplink 4
14:50:20:setup_element:INFO:	Setting the data phase to 13 for uplink 5
14:50:20:setup_element:INFO:	Setting the data phase to 10 for uplink 6
14:50:20:setup_element:INFO:	Setting the data phase to 6 for uplink 7
14:50:20:setup_element:INFO:	Setting the data phase to 38 for uplink 8
14:50:20:setup_element:INFO:	Setting the data phase to 2 for uplink 9
14:50:20:setup_element:INFO:	Setting the data phase to 1 for uplink 10
14:50:20:setup_element:INFO:	Setting the data phase to 5 for uplink 11
14:50:20:setup_element:INFO:	Setting the data phase to 4 for uplink 12
14:50:20:setup_element:INFO:	Setting the data phase to 8 for uplink 13
14:50:20:setup_element:INFO:	Setting the data phase to 0 for uplink 14
14:50:20:setup_element:INFO:	Setting the data phase to 4 for uplink 15
14:50:20:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 32
    Window Length: 71
    Eye Windows:
      Uplink  0: _______________________________________________________________________XXXXXX___
      Uplink  1: _______________________________________________________________________XXXXXX___
      Uplink  2: ______________________________________________________________________XXXXXX____
      Uplink  3: ______________________________________________________________________XXXXXX____
      Uplink  4: _____________________________________________________________________XXXXXX_____
      Uplink  5: _____________________________________________________________________XXXXXX_____
      Uplink  6: ____________________________________________________________________XXXXXXX_____
      Uplink  7: ____________________________________________________________________XXXXXXX_____
      Uplink  8: ____________________________________________________________________XXXXXXX_____
      Uplink  9: ____________________________________________________________________XXXXXXX_____
      Uplink 10: _____________________________________________________________________XXXXXX_____
      Uplink 11: _____________________________________________________________________XXXXXX_____
      Uplink 12: _____________________________________________________________________XXXXXXX____
      Uplink 13: _____________________________________________________________________XXXXXXX____
      Uplink 14: ____________________________________________________________________XXXXXX______
      Uplink 15: ____________________________________________________________________XXXXXX______
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 25
      Window Length: 32
      Eye Window: __XXXXXXXX______________________________
    Uplink 1:
      Optimal Phase: 21
      Window Length: 32
      Eye Window: XXXXXX________________________________XX
    Uplink 2:
      Optimal Phase: 23
      Window Length: 34
      Eye Window: _XXXXXX_________________________________
    Uplink 3:
      Optimal Phase: 20
      Window Length: 33
      Eye Window: XXXX_________________________________XXX
    Uplink 4:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXXX
    Uplink 5:
      Optimal Phase: 13
      Window Length: 34
      Eye Window: _______________________________XXXXXX___
    Uplink 6:
      Optimal Phase: 10
      Window Length: 32
      Eye Window: ___________________________XXXXXXXX_____
    Uplink 7:
      Optimal Phase: 6
      Window Length: 34
      Eye Window: ________________________XXXXXX__________
    Uplink 8:
      Optimal Phase: 38
      Window Length: 33
      Eye Window: _______________XXXXXXX__________________
    Uplink 9:
      Optimal Phase: 2
      Window Length: 33
      Eye Window: ___________________XXXXXXX______________
    Uplink 10:
      Optimal Phase: 1
      Window Length: 32
      Eye Window: __________________XXXXXXXX______________
    Uplink 11:
      Optimal Phase: 5
      Window Length: 33
      Eye Window: ______________________XXXXXXX___________
    Uplink 12:
      Optimal Phase: 4
      Window Length: 34
      Eye Window: ______________________XXXXXX____________
    Uplink 13:
      Optimal Phase: 8
      Window Length: 35
      Eye Window: __________________________XXXXX_________
    Uplink 14:
      Optimal Phase: 0
      Window Length: 34
      Eye Window: __________________XXXXXX________________
    Uplink 15:
      Optimal Phase: 4
      Window Length: 33
      Eye Window: _____________________XXXXXXX____________
]
14:50:20:setup_element:INFO:	Beginning SMX ASICs map scan
14:50:20:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:50:20:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:50:20:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
14:50:20:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
14:50:20:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:50:20:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
14:50:20:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
14:50:20:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:50:20:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:50:20:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
14:50:20:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
14:50:21:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:50:21:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:50:21:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
14:50:21:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
14:50:21:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:50:21:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:50:21:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
14:50:21:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
14:50:21:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:50:21:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:50:23:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 32
    Window Length: 71
    Eye Windows:
      Uplink  0: _______________________________________________________________________XXXXXX___
      Uplink  1: _______________________________________________________________________XXXXXX___
      Uplink  2: ______________________________________________________________________XXXXXX____
      Uplink  3: ______________________________________________________________________XXXXXX____
      Uplink  4: _____________________________________________________________________XXXXXX_____
      Uplink  5: _____________________________________________________________________XXXXXX_____
      Uplink  6: ____________________________________________________________________XXXXXXX_____
      Uplink  7: ____________________________________________________________________XXXXXXX_____
      Uplink  8: ____________________________________________________________________XXXXXXX_____
      Uplink  9: ____________________________________________________________________XXXXXXX_____
      Uplink 10: _____________________________________________________________________XXXXXX_____
      Uplink 11: _____________________________________________________________________XXXXXX_____
      Uplink 12: _____________________________________________________________________XXXXXXX____
      Uplink 13: _____________________________________________________________________XXXXXXX____
      Uplink 14: ____________________________________________________________________XXXXXX______
      Uplink 15: ____________________________________________________________________XXXXXX______
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 25
      Window Length: 32
      Eye Window: __XXXXXXXX______________________________
    Uplink 1:
      Optimal Phase: 21
      Window Length: 32
      Eye Window: XXXXXX________________________________XX
    Uplink 2:
      Optimal Phase: 23
      Window Length: 34
      Eye Window: _XXXXXX_________________________________
    Uplink 3:
      Optimal Phase: 20
      Window Length: 33
      Eye Window: XXXX_________________________________XXX
    Uplink 4:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXXX
    Uplink 5:
      Optimal Phase: 13
      Window Length: 34
      Eye Window: _______________________________XXXXXX___
    Uplink 6:
      Optimal Phase: 10
      Window Length: 32
      Eye Window: ___________________________XXXXXXXX_____
    Uplink 7:
      Optimal Phase: 6
      Window Length: 34
      Eye Window: ________________________XXXXXX__________
    Uplink 8:
      Optimal Phase: 38
      Window Length: 33
      Eye Window: _______________XXXXXXX__________________
    Uplink 9:
      Optimal Phase: 2
      Window Length: 33
      Eye Window: ___________________XXXXXXX______________
    Uplink 10:
      Optimal Phase: 1
      Window Length: 32
      Eye Window: __________________XXXXXXXX______________
    Uplink 11:
      Optimal Phase: 5
      Window Length: 33
      Eye Window: ______________________XXXXXXX___________
    Uplink 12:
      Optimal Phase: 4
      Window Length: 34
      Eye Window: ______________________XXXXXX____________
    Uplink 13:
      Optimal Phase: 8
      Window Length: 35
      Eye Window: __________________________XXXXX_________
    Uplink 14:
      Optimal Phase: 0
      Window Length: 34
      Eye Window: __________________XXXXXX________________
    Uplink 15:
      Optimal Phase: 4
      Window Length: 33
      Eye Window: _____________________XXXXXXX____________

14:50:23:setup_element:INFO:	Performing Elink synchronization
14:50:23:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:50:23:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:50:23:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
14:50:23:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
14:50:23:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
14:50:23:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:50:23:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  1  |  0  |     [1]      |   [(0, 1), (1, 0)] 
   1  |   [0]   |  1  |  0  |     [8]      |   [(0, 8), (1, 9)] 
   2  |   [0]   |  1  |  0  |     [3]      |   [(0, 3), (1, 2)] 
   3  |   [0]   |  1  |  0  |     [10]     |  [(0, 10), (1, 11)]
   4  |   [0]   |  1  |  0  |     [5]      |   [(0, 5), (1, 4)] 
   5  |   [0]   |  1  |  0  |     [12]     |  [(0, 12), (1, 13)]
   6  |   [0]   |  1  |  0  |     [7]      |   [(0, 7), (1, 6)] 
   7  |   [0]   |  1  |  0  |     [14]     |  [(0, 14), (1, 15)]
FEB type: A FEB_A: 1 FEB_B: 0
14:50:24:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:50:24:febtest:INFO:	01-00 | XA-000-08-001-064-043-088-06 |  37.7 | 1201.0
14:50:24:febtest:INFO:	08-01 | XA-000-08-001-064-042-128-03 |  21.9 | 1247.9
14:50:25:febtest:INFO:	03-02 | XA-000-08-001-064-042-224-08 |  34.6 | 1218.6
14:50:25:febtest:INFO:	10-03 | XA-000-08-001-064-043-048-13 |  37.7 | 1189.2
14:50:25:febtest:INFO:	05-04 | XA-000-08-001-064-043-184-07 |  47.3 | 1159.7
14:50:25:febtest:INFO:	12-05 | XA-000-08-001-064-043-008-04 |  44.1 | 1183.3
14:50:25:febtest:INFO:	07-06 | XA-000-08-001-064-043-096-15 |  34.6 | 1212.7
14:50:26:febtest:INFO:	14-07 | XA-000-08-001-064-042-112-05 |  31.4 | 1230.3
14:50:26:ST3_smx:INFO:	Configuring SMX FAST
14:50:28:ST3_smx:INFO:	chip: 1-0 	 37.726682 C 	 1206.851500 mV
14:50:28:ST3_smx:INFO:		Electrons
14:50:28:ST3_smx:INFO:	# loops 0
14:50:30:ST3_smx:INFO:	# loops 1
14:50:32:ST3_smx:INFO:	# loops 2
14:50:34:ST3_smx:INFO:	Total # of broken channels: 0
14:50:34:ST3_smx:INFO:	List of broken channels: []
14:50:34:ST3_smx:INFO:	Total # of broken channels: 0
14:50:34:ST3_smx:INFO:	List of broken channels: []
14:50:35:ST3_smx:INFO:	Configuring SMX FAST
14:50:37:ST3_smx:INFO:	chip: 8-1 	 40.898880 C 	 1189.190035 mV
14:50:37:ST3_smx:INFO:		Electrons
14:50:37:ST3_smx:INFO:	# loops 0
14:50:39:ST3_smx:INFO:	# loops 1
14:50:40:ST3_smx:INFO:	# loops 2
14:50:42:ST3_smx:INFO:	Total # of broken channels: 0
14:50:42:ST3_smx:INFO:	List of broken channels: []
14:50:42:ST3_smx:INFO:	Total # of broken channels: 0
14:50:42:ST3_smx:INFO:	List of broken channels: []
14:50:43:ST3_smx:INFO:	Configuring SMX FAST
14:50:45:ST3_smx:INFO:	chip: 3-2 	 34.556970 C 	 1218.600960 mV
14:50:45:ST3_smx:INFO:		Electrons
14:50:45:ST3_smx:INFO:	# loops 0
14:50:47:ST3_smx:INFO:	# loops 1
14:50:49:ST3_smx:INFO:	# loops 2
14:50:51:ST3_smx:INFO:	Total # of broken channels: 0
14:50:51:ST3_smx:INFO:	List of broken channels: []
14:50:51:ST3_smx:INFO:	Total # of broken channels: 0
14:50:51:ST3_smx:INFO:	List of broken channels: []
14:50:52:ST3_smx:INFO:	Configuring SMX FAST
14:50:54:ST3_smx:INFO:	chip: 10-3 	 40.898880 C 	 1195.082160 mV
14:50:54:ST3_smx:INFO:		Electrons
14:50:54:ST3_smx:INFO:	# loops 0
14:50:55:ST3_smx:INFO:	# loops 1
14:50:57:ST3_smx:INFO:	# loops 2
14:50:59:ST3_smx:INFO:	Total # of broken channels: 0
14:50:59:ST3_smx:INFO:	List of broken channels: []
14:50:59:ST3_smx:INFO:	Total # of broken channels: 0
14:50:59:ST3_smx:INFO:	List of broken channels: []
14:51:00:ST3_smx:INFO:	Configuring SMX FAST
14:51:02:ST3_smx:INFO:	chip: 5-4 	 53.612520 C 	 1147.806000 mV
14:51:02:ST3_smx:INFO:		Electrons
14:51:02:ST3_smx:INFO:	# loops 0
14:51:04:ST3_smx:INFO:	# loops 1
14:51:05:ST3_smx:INFO:	# loops 2
14:51:07:ST3_smx:INFO:	Total # of broken channels: 0
14:51:07:ST3_smx:INFO:	List of broken channels: []
14:51:07:ST3_smx:INFO:	Total # of broken channels: 0
14:51:07:ST3_smx:INFO:	List of broken channels: []
14:51:08:ST3_smx:INFO:	Configuring SMX FAST
14:51:10:ST3_smx:INFO:	chip: 12-5 	 37.726682 C 	 1206.851500 mV
14:51:10:ST3_smx:INFO:		Electrons
14:51:10:ST3_smx:INFO:	# loops 0
14:51:12:ST3_smx:INFO:	# loops 1
14:51:14:ST3_smx:INFO:	# loops 2
14:51:17:ST3_smx:INFO:	Total # of broken channels: 0
14:51:17:ST3_smx:INFO:	List of broken channels: []
14:51:17:ST3_smx:INFO:	Total # of broken channels: 0
14:51:17:ST3_smx:INFO:	List of broken channels: []
14:51:18:ST3_smx:INFO:	Configuring SMX FAST
14:51:20:ST3_smx:INFO:	chip: 7-6 	 40.898880 C 	 1200.969315 mV
14:51:20:ST3_smx:INFO:		Electrons
14:51:20:ST3_smx:INFO:	# loops 0
14:51:22:ST3_smx:INFO:	# loops 1
14:51:24:ST3_smx:INFO:	# loops 2
14:51:26:ST3_smx:INFO:	Total # of broken channels: 0
14:51:26:ST3_smx:INFO:	List of broken channels: []
14:51:26:ST3_smx:INFO:	Total # of broken channels: 0
14:51:26:ST3_smx:INFO:	List of broken channels: []
14:51:27:ST3_smx:INFO:	Configuring SMX FAST
14:51:29:ST3_smx:INFO:	chip: 14-7 	 44.073563 C 	 1195.082160 mV
14:51:29:ST3_smx:INFO:		Electrons
14:51:29:ST3_smx:INFO:	# loops 0
14:51:31:ST3_smx:INFO:	# loops 1
14:51:33:ST3_smx:INFO:	# loops 2
14:51:35:ST3_smx:INFO:	Total # of broken channels: 0
14:51:35:ST3_smx:INFO:	List of broken channels: []
14:51:35:ST3_smx:INFO:	Total # of broken channels: 0
14:51:35:ST3_smx:INFO:	List of broken channels: []
14:51:36:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:51:36:febtest:INFO:	01-00 | XA-000-08-001-064-043-088-06 |  40.9 | 1206.9
14:51:36:febtest:INFO:	08-01 | XA-000-08-001-064-042-128-03 |  44.1 | 1189.2
14:51:36:febtest:INFO:	03-02 | XA-000-08-001-064-042-224-08 |  37.7 | 1218.6
14:51:36:febtest:INFO:	10-03 | XA-000-08-001-064-043-048-13 |  40.9 | 1195.1
14:51:37:febtest:INFO:	05-04 | XA-000-08-001-064-043-184-07 |  53.6 | 1147.8
14:51:37:febtest:INFO:	12-05 | XA-000-08-001-064-043-008-04 |  37.7 | 1206.9
14:51:37:febtest:INFO:	07-06 | XA-000-08-001-064-043-096-15 |  40.9 | 1201.0
14:51:37:febtest:INFO:	14-07 | XA-000-08-001-064-042-112-05 |  47.3 | 1195.1
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_06_25-14_50_08
OPERATOR  : Henrik; 
SITE      : KIT
SETUP     : KIT_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L6UL201035 M6UL2B0010350A2 42 A

FEB_SN : 3036
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID:	07062

MODULE_NAME:	L6UL201035 M6UL2B0010350A2 42 A

MODULE_TYPE:	
MODULE_LADDER:	L6UL201035
MODULE_MODULE:	M6UL2B0010350A2
MODULE_SIZE:	42
MODULE_GRADE:	A
---------------------------------------
VI_before_Init : ['2.450', '1.8060', '1.850', '0.4589', '2.450', '0.0000', '1.850', '0.0002']
VI_after__Init : ['2.450', '1.9790', '1.850', '0.5937', '2.450', '0.0000', '1.850', '0.0001']
VI_at__the_End : ['2.450', '1.9700', '1.850', '0.3231', '2.450', '0.0000', '1.850', '0.0001']