
FEB_3044 28.06.24 14:09:18
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14:09:18:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:09:18:ST3_Shared:INFO: FEB-Microcable 14:09:18:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:09:18:febtest:INFO: Testing FEB with SN 3044 14:09:19:smx_tester:INFO: Scanning setup 14:09:19:elinks:INFO: Disabling clock on downlink 0 14:09:19:elinks:INFO: Disabling clock on downlink 1 14:09:19:elinks:INFO: Disabling clock on downlink 2 14:09:19:elinks:INFO: Disabling clock on downlink 3 14:09:19:elinks:INFO: Disabling clock on downlink 4 14:09:19:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:09:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 14:09:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:09:19:elinks:INFO: Disabling clock on downlink 0 14:09:19:elinks:INFO: Disabling clock on downlink 1 14:09:19:elinks:INFO: Disabling clock on downlink 2 14:09:19:elinks:INFO: Disabling clock on downlink 3 14:09:19:elinks:INFO: Disabling clock on downlink 4 14:09:19:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:09:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 14:09:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 14:09:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 14:09:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 14:09:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 14:09:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 14:09:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 14:09:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 14:09:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 14:09:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:09:20:elinks:INFO: Disabling clock on downlink 0 14:09:20:elinks:INFO: Disabling clock on downlink 1 14:09:20:elinks:INFO: Disabling clock on downlink 2 14:09:20:elinks:INFO: Disabling clock on downlink 3 14:09:20:elinks:INFO: Disabling clock on downlink 4 14:09:20:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:09:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:09:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:09:20:elinks:INFO: Disabling clock on downlink 0 14:09:20:elinks:INFO: Disabling clock on downlink 1 14:09:20:elinks:INFO: Disabling clock on downlink 2 14:09:20:elinks:INFO: Disabling clock on downlink 3 14:09:20:elinks:INFO: Disabling clock on downlink 4 14:09:20:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:09:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 14:09:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:09:20:elinks:INFO: Disabling clock on downlink 0 14:09:20:elinks:INFO: Disabling clock on downlink 1 14:09:20:elinks:INFO: Disabling clock on downlink 2 14:09:20:elinks:INFO: Disabling clock on downlink 3 14:09:20:elinks:INFO: Disabling clock on downlink 4 14:09:20:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:09:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 14:09:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:09:20:setup_element:INFO: Scanning clock phase 14:09:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 14:09:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 14:09:20:setup_element:INFO: Clock phase scan results for group 0, downlink 1 14:09:20:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________________ Clock Delay: 40 14:09:20:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________________ Clock Delay: 40 14:09:20:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 14:09:20:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 14:09:20:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXX______ Clock Delay: 31 14:09:20:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXX______ Clock Delay: 31 14:09:20:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XX________ Clock Delay: 30 14:09:20:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XX________ Clock Delay: 30 14:09:20:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1 14:09:20:setup_element:INFO: Scanning data phases 14:09:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 14:09:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 14:09:25:setup_element:INFO: Data phase scan results for group 0, downlink 1 14:09:25:setup_element:INFO: Eye window for uplink 8 : __________________XXXXXXXXX_____________ Data delay found: 2 14:09:25:setup_element:INFO: Eye window for uplink 9 : ________________________XXXXXXXX________ Data delay found: 7 14:09:25:setup_element:INFO: Eye window for uplink 10: _______________________XXXXXXX__________ Data delay found: 6 14:09:25:setup_element:INFO: Eye window for uplink 11: __________________________XXXXXXXX______ Data delay found: 9 14:09:25:setup_element:INFO: Eye window for uplink 12: _______________________XXXXXX___________ Data delay found: 5 14:09:25:setup_element:INFO: Eye window for uplink 13: ___________________________XXXX_________ Data delay found: 8 14:09:25:setup_element:INFO: Eye window for uplink 14: ______________________XXXXXXXX__________ Data delay found: 5 14:09:25:setup_element:INFO: Eye window for uplink 15: ________________________XXXXXXXX________ Data delay found: 7 14:09:25:setup_element:INFO: Setting the data phase to 2 for uplink 8 14:09:25:setup_element:INFO: Setting the data phase to 7 for uplink 9 14:09:25:setup_element:INFO: Setting the data phase to 6 for uplink 10 14:09:25:setup_element:INFO: Setting the data phase to 9 for uplink 11 14:09:25:setup_element:INFO: Setting the data phase to 5 for uplink 12 14:09:25:setup_element:INFO: Setting the data phase to 8 for uplink 13 14:09:25:setup_element:INFO: Setting the data phase to 5 for uplink 14 14:09:25:setup_element:INFO: Setting the data phase to 7 for uplink 15 14:09:25:setup_element:INFO: Beginning SMX ASICs map scan 14:09:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 14:09:25:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 14:09:25:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 14:09:25:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 14:09:25:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15] 14:09:26:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 14:09:26:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 14:09:26:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 14:09:26:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 14:09:26:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 14:09:26:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 14:09:27:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 14:09:27:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 14:09:28:setup_element:INFO: Performing Elink synchronization 14:09:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 14:09:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 14:09:28:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 14:09:28:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 14:09:28:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 14:09:28:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)] 3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)] 5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)] 7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)] |_________________________________________________________________________| 14:09:29:febtest:INFO: Init all SMX (CSA): 30 14:09:37:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 14:09:38:febtest:INFO: 08-01 | XA-000-08-003-000-005-081-13 | 37.7 | 1165.6 14:09:38:febtest:INFO: 10-03 | XA-000-08-003-000-002-034-09 | 28.2 | 1195.1 14:09:38:febtest:INFO: 12-05 | XA-000-08-003-000-001-210-01 | 28.2 | 1189.2 14:09:38:febtest:INFO: 14-07 | XA-000-08-003-000-001-209-01 | 34.6 | 1177.4 14:09:39:febtest:INFO: Set all CSA to ZERO FEB type: A FEB_A: 1 FEB_B: 0 14:09:41:ST3_smx:INFO: chip: 8-1 37.726682 C 1177.390875 mV 14:09:41:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:09:41:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:09:41:ST3_smx:INFO: Electrons 14:09:41:ST3_smx:INFO: # loops 0 14:09:43:ST3_smx:INFO: # loops 1 14:09:45:ST3_smx:INFO: # loops 2 14:09:48:ST3_smx:INFO: Total # of broken channels: 0 14:09:48:ST3_smx:INFO: List of broken channels: [] 14:09:48:ST3_smx:INFO: Total # of broken channels: 0 14:09:48:ST3_smx:INFO: List of broken channels: [] 14:09:49:ST3_smx:INFO: chip: 10-3 28.225000 C 1200.969315 mV 14:09:49:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:09:49:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:09:49:ST3_smx:INFO: Electrons 14:09:49:ST3_smx:INFO: # loops 0 14:09:52:ST3_smx:INFO: # loops 1 14:09:54:ST3_smx:INFO: # loops 2 14:09:56:ST3_smx:INFO: Total # of broken channels: 0 14:09:56:ST3_smx:INFO: List of broken channels: [] 14:09:56:ST3_smx:INFO: Total # of broken channels: 0 14:09:56:ST3_smx:INFO: List of broken channels: [] 14:09:57:ST3_smx:INFO: chip: 12-5 28.225000 C 1200.969315 mV 14:09:57:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:09:57:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:09:57:ST3_smx:INFO: Electrons 14:09:57:ST3_smx:INFO: # loops 0 14:09:59:ST3_smx:INFO: # loops 1 14:10:01:ST3_smx:INFO: # loops 2 14:10:03:ST3_smx:INFO: Total # of broken channels: 0 14:10:03:ST3_smx:INFO: List of broken channels: [] 14:10:03:ST3_smx:INFO: Total # of broken channels: 0 14:10:03:ST3_smx:INFO: List of broken channels: [] 14:10:05:ST3_smx:INFO: chip: 14-7 34.556970 C 1189.190035 mV 14:10:05:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:10:05:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:10:05:ST3_smx:INFO: Electrons 14:10:05:ST3_smx:INFO: # loops 0 14:10:07:ST3_smx:INFO: # loops 1 14:10:09:ST3_smx:INFO: # loops 2 14:10:11:ST3_smx:INFO: Total # of broken channels: 0 14:10:11:ST3_smx:INFO: List of broken channels: [] 14:10:11:ST3_smx:INFO: Total # of broken channels: 0 14:10:11:ST3_smx:INFO: List of broken channels: [] 14:10:11:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 14:10:12:febtest:INFO: 08-01 | XA-000-08-003-000-005-081-13 | 37.7 | 1195.1 14:10:12:febtest:INFO: 10-03 | XA-000-08-003-000-002-034-09 | 28.2 | 1230.3 14:10:12:febtest:INFO: 12-05 | XA-000-08-003-000-001-210-01 | 31.4 | 1218.6 14:10:12:febtest:INFO: 14-07 | XA-000-08-003-000-001-209-01 | 37.7 | 1206.9 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_06_28-14_09_18 OPERATOR : Henrik; Benjamin; Irakli; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 3044| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['2.450', '0.9427', '1.850', '1.3550', '0.000', '0.0000', '0.000', '0.0000'] VI_after__Init : ['2.450', '1.0350', '1.850', '1.2040', '0.000', '0.0000', '0.000', '0.0000'] VI_at__the_End : ['2.450', '0.9801', '1.850', '0.2633', '0.000', '0.0000', '0.000', '0.0000']