FEB_3046 25.10.24 13:12:47
Info
13:12:47:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:12:47:ST3_Shared:INFO: FEB-Microcable
13:12:47:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:12:47:febtest:INFO: Testing FEB with SN 3046
13:12:49:smx_tester:INFO: Scanning setup
13:12:49:elinks:INFO: Disabling clock on downlink 0
13:12:49:elinks:INFO: Disabling clock on downlink 1
13:12:49:elinks:INFO: Disabling clock on downlink 2
13:12:49:elinks:INFO: Disabling clock on downlink 3
13:12:49:elinks:INFO: Disabling clock on downlink 4
13:12:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:12:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:12:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:12:49:elinks:INFO: Disabling clock on downlink 0
13:12:49:elinks:INFO: Disabling clock on downlink 1
13:12:49:elinks:INFO: Disabling clock on downlink 2
13:12:49:elinks:INFO: Disabling clock on downlink 3
13:12:49:elinks:INFO: Disabling clock on downlink 4
13:12:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:12:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:12:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
13:12:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
13:12:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
13:12:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
13:12:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
13:12:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
13:12:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
13:12:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
13:12:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:12:49:elinks:INFO: Disabling clock on downlink 0
13:12:49:elinks:INFO: Disabling clock on downlink 1
13:12:49:elinks:INFO: Disabling clock on downlink 2
13:12:49:elinks:INFO: Disabling clock on downlink 3
13:12:49:elinks:INFO: Disabling clock on downlink 4
13:12:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:12:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:12:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:12:49:elinks:INFO: Disabling clock on downlink 0
13:12:49:elinks:INFO: Disabling clock on downlink 1
13:12:49:elinks:INFO: Disabling clock on downlink 2
13:12:49:elinks:INFO: Disabling clock on downlink 3
13:12:49:elinks:INFO: Disabling clock on downlink 4
13:12:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:12:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:12:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:12:49:elinks:INFO: Disabling clock on downlink 0
13:12:49:elinks:INFO: Disabling clock on downlink 1
13:12:49:elinks:INFO: Disabling clock on downlink 2
13:12:49:elinks:INFO: Disabling clock on downlink 3
13:12:49:elinks:INFO: Disabling clock on downlink 4
13:12:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:12:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:12:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:12:50:setup_element:INFO: Scanning clock phase
13:12:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:12:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:12:50:setup_element:INFO: Clock phase scan results for group 0, downlink 1
13:12:50:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:12:50:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:12:50:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:12:50:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:12:50:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXX______
Clock Delay: 31
13:12:50:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXX______
Clock Delay: 31
13:12:50:setup_element:INFO: Eye window for uplink 14: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:12:50:setup_element:INFO: Eye window for uplink 15: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:12:50:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
13:12:50:setup_element:INFO: Scanning data phases
13:12:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:12:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:12:55:setup_element:INFO: Data phase scan results for group 0, downlink 1
13:12:55:setup_element:INFO: Eye window for uplink 8 : _________________________XXXXXXX________
Data delay found: 8
13:12:55:setup_element:INFO: Eye window for uplink 9 : ______________________________XXXXXX____
Data delay found: 12
13:12:55:setup_element:INFO: Eye window for uplink 10: ___________________________XXXXXXX______
Data delay found: 10
13:12:55:setup_element:INFO: Eye window for uplink 11: _______________________________XXXXXXX__
Data delay found: 14
13:12:55:setup_element:INFO: Eye window for uplink 12: _______________________XXXXX____________
Data delay found: 5
13:12:55:setup_element:INFO: Eye window for uplink 13: __________________________XXXXX_________
Data delay found: 8
13:12:55:setup_element:INFO: Eye window for uplink 14: __________________________XXXXX_________
Data delay found: 8
13:12:55:setup_element:INFO: Eye window for uplink 15: ____________________________XXXXXX______
Data delay found: 10
13:12:55:setup_element:INFO: Setting the data phase to 8 for uplink 8
13:12:55:setup_element:INFO: Setting the data phase to 12 for uplink 9
13:12:55:setup_element:INFO: Setting the data phase to 10 for uplink 10
13:12:55:setup_element:INFO: Setting the data phase to 14 for uplink 11
13:12:55:setup_element:INFO: Setting the data phase to 5 for uplink 12
13:12:55:setup_element:INFO: Setting the data phase to 8 for uplink 13
13:12:55:setup_element:INFO: Setting the data phase to 8 for uplink 14
13:12:55:setup_element:INFO: Setting the data phase to 10 for uplink 15
13:12:55:setup_element:INFO: Beginning SMX ASICs map scan
13:12:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:12:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:12:55:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:12:55:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:12:55:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
13:12:55:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:12:55:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:12:55:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:12:56:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:12:56:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:12:56:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:12:56:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:12:56:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:12:57:setup_element:INFO: Performing Elink synchronization
13:12:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:12:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:12:58:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:12:58:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:12:58:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
13:12:58:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
13:12:58:febtest:INFO: Init all SMX (CSA): 30
13:13:07:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:13:07:febtest:INFO: 08-01 | XA-000-09-004-006-006-025-04 | 37.7 | 1147.8
13:13:07:febtest:INFO: 10-03 | XA-000-09-004-006-005-025-10 | 44.1 | 1124.0
13:13:07:febtest:INFO: 12-05 | XA-000-09-004-006-006-018-04 | 37.7 | 1159.7
13:13:08:febtest:INFO: 14-07 | XA-000-09-004-006-006-019-04 | 40.9 | 1147.8
13:13:09:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:13:11:ST3_smx:INFO: chip: 8-1 40.898880 C 1159.654860 mV
13:13:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:13:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:13:11:ST3_smx:INFO: Electrons
13:13:11:ST3_smx:INFO: # loops 0
13:13:12:ST3_smx:INFO: # loops 1
13:13:14:ST3_smx:INFO: # loops 2
13:13:15:ST3_smx:INFO: Total # of broken channels: 0
13:13:15:ST3_smx:INFO: List of broken channels: []
13:13:15:ST3_smx:INFO: Total # of broken channels: 0
13:13:15:ST3_smx:INFO: List of broken channels: []
13:13:17:ST3_smx:INFO: chip: 10-3 44.073563 C 1135.937260 mV
13:13:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:13:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:13:17:ST3_smx:INFO: Electrons
13:13:17:ST3_smx:INFO: # loops 0
13:13:19:ST3_smx:INFO: # loops 1
13:13:20:ST3_smx:INFO: # loops 2
13:13:22:ST3_smx:INFO: Total # of broken channels: 0
13:13:22:ST3_smx:INFO: List of broken channels: []
13:13:22:ST3_smx:INFO: Total # of broken channels: 0
13:13:22:ST3_smx:INFO: List of broken channels: []
13:13:23:ST3_smx:INFO: chip: 12-5 37.726682 C 1165.571835 mV
13:13:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:13:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:13:23:ST3_smx:INFO: Electrons
13:13:23:ST3_smx:INFO: # loops 0
13:13:25:ST3_smx:INFO: # loops 1
13:13:26:ST3_smx:INFO: # loops 2
13:13:28:ST3_smx:INFO: Total # of broken channels: 0
13:13:28:ST3_smx:INFO: List of broken channels: []
13:13:28:ST3_smx:INFO: Total # of broken channels: 0
13:13:28:ST3_smx:INFO: List of broken channels: []
13:13:30:ST3_smx:INFO: chip: 14-7 40.898880 C 1159.654860 mV
13:13:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:13:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:13:30:ST3_smx:INFO: Electrons
13:13:30:ST3_smx:INFO: # loops 0
13:13:31:ST3_smx:INFO: # loops 1
13:13:33:ST3_smx:INFO: # loops 2
13:13:35:ST3_smx:INFO: Total # of broken channels: 0
13:13:35:ST3_smx:INFO: List of broken channels: []
13:13:35:ST3_smx:INFO: Total # of broken channels: 0
13:13:35:ST3_smx:INFO: List of broken channels: []
13:13:35:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:13:35:febtest:INFO: 08-01 | XA-000-09-004-006-006-025-04 | 40.9 | 1183.3
13:13:36:febtest:INFO: 10-03 | XA-000-09-004-006-005-025-10 | 44.1 | 1159.7
13:13:36:febtest:INFO: 12-05 | XA-000-09-004-006-006-018-04 | 37.7 | 1189.2
13:13:36:febtest:INFO: 14-07 | XA-000-09-004-006-006-019-04 | 40.9 | 1183.3
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_10_25-13_12_47
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3046| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.451', '0.7277', '1.850', '0.8913', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '0.9963', '1.850', '1.0430', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '0.9955', '1.850', '0.2647', '0.000', '0.0000', '0.000', '0.0000']