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FEB_3046 28.10.24 08:56:33
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08:56:33:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:56:33:ST3_Shared:INFO: FEB-Microcable
08:56:33:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:56:33:febtest:INFO: Testing FEB with SN 3046
08:56:34:smx_tester:INFO: Scanning setup
08:56:34:elinks:INFO: Disabling clock on downlink 0
08:56:34:elinks:INFO: Disabling clock on downlink 1
08:56:34:elinks:INFO: Disabling clock on downlink 2
08:56:34:elinks:INFO: Disabling clock on downlink 3
08:56:34:elinks:INFO: Disabling clock on downlink 4
08:56:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:56:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:56:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:56:34:elinks:INFO: Disabling clock on downlink 0
08:56:34:elinks:INFO: Disabling clock on downlink 1
08:56:34:elinks:INFO: Disabling clock on downlink 2
08:56:34:elinks:INFO: Disabling clock on downlink 3
08:56:34:elinks:INFO: Disabling clock on downlink 4
08:56:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:56:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:56:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
08:56:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
08:56:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
08:56:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
08:56:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
08:56:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
08:56:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
08:56:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
08:56:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
08:56:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
08:56:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
08:56:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
08:56:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
08:56:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
08:56:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
08:56:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
08:56:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:56:35:elinks:INFO: Disabling clock on downlink 0
08:56:35:elinks:INFO: Disabling clock on downlink 1
08:56:35:elinks:INFO: Disabling clock on downlink 2
08:56:35:elinks:INFO: Disabling clock on downlink 3
08:56:35:elinks:INFO: Disabling clock on downlink 4
08:56:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:56:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:56:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:56:35:elinks:INFO: Disabling clock on downlink 0
08:56:35:elinks:INFO: Disabling clock on downlink 1
08:56:35:elinks:INFO: Disabling clock on downlink 2
08:56:35:elinks:INFO: Disabling clock on downlink 3
08:56:35:elinks:INFO: Disabling clock on downlink 4
08:56:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:56:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:56:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:56:35:elinks:INFO: Disabling clock on downlink 0
08:56:35:elinks:INFO: Disabling clock on downlink 1
08:56:35:elinks:INFO: Disabling clock on downlink 2
08:56:35:elinks:INFO: Disabling clock on downlink 3
08:56:35:elinks:INFO: Disabling clock on downlink 4
08:56:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:56:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:56:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:56:35:setup_element:INFO: Scanning clock phase
08:56:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:56:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:56:35:setup_element:INFO: Clock phase scan results for group 0, downlink 1
08:56:35:setup_element:INFO: Eye window for uplink 0 : _________________________________________________________________________XXXXX__
Clock Delay: 35
08:56:35:setup_element:INFO: Eye window for uplink 1 : _________________________________________________________________________XXXXX__
Clock Delay: 35
08:56:35:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
08:56:35:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
08:56:35:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
08:56:35:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
08:56:35:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________________XXXXX_____
Clock Delay: 32
08:56:35:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________________XXXXX_____
Clock Delay: 32
08:56:35:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
08:56:35:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
08:56:35:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________________XXXXXX___
Clock Delay: 33
08:56:35:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________________XXXXXX___
Clock Delay: 33
08:56:35:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXX______
Clock Delay: 31
08:56:35:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXX______
Clock Delay: 31
08:56:35:setup_element:INFO: Eye window for uplink 14: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
08:56:35:setup_element:INFO: Eye window for uplink 15: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
08:56:35:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
08:56:35:setup_element:INFO: Scanning data phases
08:56:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:56:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:56:40:setup_element:INFO: Data phase scan results for group 0, downlink 1
08:56:40:setup_element:INFO: Eye window for uplink 0 : ________XXXXXXX_________________________
Data delay found: 31
08:56:40:setup_element:INFO: Eye window for uplink 1 : ____XXXXXXX_____________________________
Data delay found: 27
08:56:40:setup_element:INFO: Eye window for uplink 2 : ____XXXXXXX_____________________________
Data delay found: 27
08:56:40:setup_element:INFO: Eye window for uplink 3 : __XXXXXX________________________________
Data delay found: 24
08:56:40:setup_element:INFO: Eye window for uplink 4 : XXXXXX_________________________________X
Data delay found: 22
08:56:41:setup_element:INFO: Eye window for uplink 5 : XX_________________________________XXXXX
Data delay found: 18
08:56:41:setup_element:INFO: Eye window for uplink 6 : ________________________________XXXXXX__
Data delay found: 14
08:56:41:setup_element:INFO: Eye window for uplink 7 : ___________________________XXXXXXXX_____
Data delay found: 10
08:56:41:setup_element:INFO: Eye window for uplink 8 : _______________________XXXXXX___________
Data delay found: 5
08:56:41:setup_element:INFO: Eye window for uplink 9 : ___________________________XXXXXX_______
Data delay found: 9
08:56:41:setup_element:INFO: Eye window for uplink 10: ________________________XXXXXXX_________
Data delay found: 7
08:56:41:setup_element:INFO: Eye window for uplink 11: _____________________________XXXXX______
Data delay found: 11
08:56:41:setup_element:INFO: Eye window for uplink 12: ___________________XXXXXX_______________
Data delay found: 1
08:56:41:setup_element:INFO: Eye window for uplink 13: ________________________XXXX____________
Data delay found: 5
08:56:41:setup_element:INFO: Eye window for uplink 14: _____________________XXXXXXXX___________
Data delay found: 4
08:56:41:setup_element:INFO: Eye window for uplink 15: ________________________XXXXXXX_________
Data delay found: 7
08:56:41:setup_element:INFO: Setting the data phase to 31 for uplink 0
08:56:41:setup_element:INFO: Setting the data phase to 27 for uplink 1
08:56:41:setup_element:INFO: Setting the data phase to 27 for uplink 2
08:56:41:setup_element:INFO: Setting the data phase to 24 for uplink 3
08:56:41:setup_element:INFO: Setting the data phase to 22 for uplink 4
08:56:41:setup_element:INFO: Setting the data phase to 18 for uplink 5
08:56:41:setup_element:INFO: Setting the data phase to 14 for uplink 6
08:56:41:setup_element:INFO: Setting the data phase to 10 for uplink 7
08:56:41:setup_element:INFO: Setting the data phase to 5 for uplink 8
08:56:41:setup_element:INFO: Setting the data phase to 9 for uplink 9
08:56:41:setup_element:INFO: Setting the data phase to 7 for uplink 10
08:56:41:setup_element:INFO: Setting the data phase to 11 for uplink 11
08:56:41:setup_element:INFO: Setting the data phase to 1 for uplink 12
08:56:41:setup_element:INFO: Setting the data phase to 5 for uplink 13
08:56:41:setup_element:INFO: Setting the data phase to 4 for uplink 14
08:56:41:setup_element:INFO: Setting the data phase to 7 for uplink 15
08:56:41:setup_element:INFO: Beginning SMX ASICs map scan
08:56:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:56:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:56:41:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:56:41:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:56:41:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:56:41:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
08:56:41:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
08:56:41:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:56:41:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:56:41:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
08:56:41:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
08:56:41:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:56:41:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:56:41:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
08:56:41:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
08:56:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:56:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:56:42:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
08:56:42:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
08:56:42:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:56:42:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:56:43:setup_element:INFO: Performing Elink synchronization
08:56:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:56:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:56:43:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:56:43:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:56:43:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
08:56:43:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
08:56:44:febtest:INFO: Init all SMX (CSA): 30
08:56:58:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:56:58:febtest:INFO: 01-00 | XA-000-09-004-006-006-022-04 | 40.9 | 1159.7
08:56:58:febtest:INFO: 08-01 | XA-000-09-004-006-006-025-04 | 40.9 | 1159.7
08:56:58:febtest:INFO: 03-02 | XA-000-09-004-006-006-023-04 | 44.1 | 1135.9
08:56:58:febtest:INFO: 10-03 | XA-000-09-004-006-005-025-10 | 47.3 | 1130.0
08:56:59:febtest:INFO: 05-04 | XA-000-09-004-006-005-024-10 | 44.1 | 1135.9
08:56:59:febtest:INFO: 12-05 | XA-000-09-004-006-006-018-04 | 40.9 | 1153.7
08:56:59:febtest:INFO: 07-06 | XA-000-09-004-006-006-024-04 | 37.7 | 1165.6
08:56:59:febtest:INFO: 14-07 | XA-000-09-004-006-006-019-04 | 44.1 | 1153.7
08:57:00:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
08:57:02:ST3_smx:INFO: chip: 1-0 40.898880 C 1171.483840 mV
08:57:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:02:ST3_smx:INFO: Electrons
08:57:02:ST3_smx:INFO: # loops 0
08:57:04:ST3_smx:INFO: # loops 1
08:57:05:ST3_smx:INFO: # loops 2
08:57:07:ST3_smx:INFO: Total # of broken channels: 0
08:57:07:ST3_smx:INFO: List of broken channels: []
08:57:07:ST3_smx:INFO: Total # of broken channels: 0
08:57:07:ST3_smx:INFO: List of broken channels: []
08:57:08:ST3_smx:INFO: chip: 8-1 40.898880 C 1177.390875 mV
08:57:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:08:ST3_smx:INFO: Electrons
08:57:08:ST3_smx:INFO: # loops 0
08:57:10:ST3_smx:INFO: # loops 1
08:57:11:ST3_smx:INFO: # loops 2
08:57:13:ST3_smx:INFO: Total # of broken channels: 0
08:57:13:ST3_smx:INFO: List of broken channels: []
08:57:13:ST3_smx:INFO: Total # of broken channels: 0
08:57:13:ST3_smx:INFO: List of broken channels: []
08:57:15:ST3_smx:INFO: chip: 3-2 47.250730 C 1147.806000 mV
08:57:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:15:ST3_smx:INFO: Electrons
08:57:15:ST3_smx:INFO: # loops 0
08:57:16:ST3_smx:INFO: # loops 1
08:57:18:ST3_smx:INFO: # loops 2
08:57:19:ST3_smx:INFO: Total # of broken channels: 0
08:57:19:ST3_smx:INFO: List of broken channels: []
08:57:19:ST3_smx:INFO: Total # of broken channels: 0
08:57:19:ST3_smx:INFO: List of broken channels: []
08:57:21:ST3_smx:INFO: chip: 10-3 47.250730 C 1141.874115 mV
08:57:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:21:ST3_smx:INFO: Electrons
08:57:21:ST3_smx:INFO: # loops 0
08:57:23:ST3_smx:INFO: # loops 1
08:57:24:ST3_smx:INFO: # loops 2
08:57:26:ST3_smx:INFO: Total # of broken channels: 0
08:57:26:ST3_smx:INFO: List of broken channels: []
08:57:26:ST3_smx:INFO: Total # of broken channels: 0
08:57:26:ST3_smx:INFO: List of broken channels: []
08:57:27:ST3_smx:INFO: chip: 5-4 44.073563 C 1147.806000 mV
08:57:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:27:ST3_smx:INFO: Electrons
08:57:27:ST3_smx:INFO: # loops 0
08:57:29:ST3_smx:INFO: # loops 1
08:57:30:ST3_smx:INFO: # loops 2
08:57:32:ST3_smx:INFO: Total # of broken channels: 0
08:57:32:ST3_smx:INFO: List of broken channels: []
08:57:32:ST3_smx:INFO: Total # of broken channels: 0
08:57:32:ST3_smx:INFO: List of broken channels: []
08:57:34:ST3_smx:INFO: chip: 12-5 40.898880 C 1171.483840 mV
08:57:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:34:ST3_smx:INFO: Electrons
08:57:34:ST3_smx:INFO: # loops 0
08:57:35:ST3_smx:INFO: # loops 1
08:57:37:ST3_smx:INFO: # loops 2
08:57:38:ST3_smx:INFO: Total # of broken channels: 0
08:57:38:ST3_smx:INFO: List of broken channels: []
08:57:38:ST3_smx:INFO: Total # of broken channels: 0
08:57:38:ST3_smx:INFO: List of broken channels: []
08:57:40:ST3_smx:INFO: chip: 7-6 40.898880 C 1177.390875 mV
08:57:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:40:ST3_smx:INFO: Electrons
08:57:40:ST3_smx:INFO: # loops 0
08:57:42:ST3_smx:INFO: # loops 1
08:57:43:ST3_smx:INFO: # loops 2
08:57:45:ST3_smx:INFO: Total # of broken channels: 0
08:57:45:ST3_smx:INFO: List of broken channels: []
08:57:45:ST3_smx:INFO: Total # of broken channels: 0
08:57:45:ST3_smx:INFO: List of broken channels: []
08:57:46:ST3_smx:INFO: chip: 14-7 44.073563 C 1165.571835 mV
08:57:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:46:ST3_smx:INFO: Electrons
08:57:46:ST3_smx:INFO: # loops 0
08:57:48:ST3_smx:INFO: # loops 1
08:57:49:ST3_smx:INFO: # loops 2
08:57:51:ST3_smx:INFO: Total # of broken channels: 0
08:57:51:ST3_smx:INFO: List of broken channels: []
08:57:51:ST3_smx:INFO: Total # of broken channels: 0
08:57:51:ST3_smx:INFO: List of broken channels: []
08:57:51:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:57:51:febtest:INFO: 01-00 | XA-000-09-004-006-006-022-04 | 40.9 | 1195.1
08:57:52:febtest:INFO: 08-01 | XA-000-09-004-006-006-025-04 | 44.1 | 1195.1
08:57:52:febtest:INFO: 03-02 | XA-000-09-004-006-006-023-04 | 47.3 | 1171.5
08:57:52:febtest:INFO: 10-03 | XA-000-09-004-006-005-025-10 | 50.4 | 1165.6
08:57:52:febtest:INFO: 05-04 | XA-000-09-004-006-005-024-10 | 47.3 | 1165.6
08:57:52:febtest:INFO: 12-05 | XA-000-09-004-006-006-018-04 | 40.9 | 1189.2
08:57:53:febtest:INFO: 07-06 | XA-000-09-004-006-006-024-04 | 40.9 | 1189.2
08:57:53:febtest:INFO: 14-07 | XA-000-09-004-006-006-019-04 | 44.1 | 1189.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_10_28-08_56_33
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3046| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.3890', '1.852', '2.0170', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9910', '1.850', '2.3170', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9760', '1.850', '0.5230', '0.000', '0.0000', '0.000', '0.0000']