FEB_3048 11.07.24 10:09:31
Info
10:09:31:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:09:31:ST3_Shared:INFO: FEB-Microcable
10:09:31:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:09:31:febtest:INFO: Testing FEB with SN 3048
10:09:33:smx_tester:INFO: Scanning setup
10:09:33:elinks:INFO: Disabling clock on downlink 0
10:09:33:elinks:INFO: Disabling clock on downlink 1
10:09:33:elinks:INFO: Disabling clock on downlink 2
10:09:33:elinks:INFO: Disabling clock on downlink 3
10:09:33:elinks:INFO: Disabling clock on downlink 4
10:09:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:09:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:09:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:09:33:elinks:INFO: Disabling clock on downlink 0
10:09:33:elinks:INFO: Disabling clock on downlink 1
10:09:33:elinks:INFO: Disabling clock on downlink 2
10:09:33:elinks:INFO: Disabling clock on downlink 3
10:09:33:elinks:INFO: Disabling clock on downlink 4
10:09:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:09:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:09:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
10:09:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
10:09:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
10:09:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
10:09:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
10:09:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
10:09:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
10:09:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
10:09:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:09:33:elinks:INFO: Disabling clock on downlink 0
10:09:33:elinks:INFO: Disabling clock on downlink 1
10:09:33:elinks:INFO: Disabling clock on downlink 2
10:09:33:elinks:INFO: Disabling clock on downlink 3
10:09:33:elinks:INFO: Disabling clock on downlink 4
10:09:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:09:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:09:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:09:33:elinks:INFO: Disabling clock on downlink 0
10:09:33:elinks:INFO: Disabling clock on downlink 1
10:09:33:elinks:INFO: Disabling clock on downlink 2
10:09:33:elinks:INFO: Disabling clock on downlink 3
10:09:33:elinks:INFO: Disabling clock on downlink 4
10:09:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:09:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:09:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:09:33:elinks:INFO: Disabling clock on downlink 0
10:09:33:elinks:INFO: Disabling clock on downlink 1
10:09:33:elinks:INFO: Disabling clock on downlink 2
10:09:33:elinks:INFO: Disabling clock on downlink 3
10:09:33:elinks:INFO: Disabling clock on downlink 4
10:09:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:09:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:09:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:09:33:setup_element:INFO: Scanning clock phase
10:09:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:09:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:09:34:setup_element:INFO: Clock phase scan results for group 0, downlink 1
10:09:34:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________________
Clock Delay: 40
10:09:34:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________________
Clock Delay: 40
10:09:34:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXX_____
Clock Delay: 32
10:09:34:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXX_____
Clock Delay: 32
10:09:34:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
10:09:34:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
10:09:34:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________XXXXX___
Clock Delay: 34
10:09:34:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________XXXXX___
Clock Delay: 34
10:09:34:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1
10:09:34:setup_element:INFO: Scanning data phases
10:09:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:09:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:09:39:setup_element:INFO: Data phase scan results for group 0, downlink 1
10:09:39:setup_element:INFO: Eye window for uplink 8 : ____________________XXXXXXXXXXXXXXXXXXXX
Data delay found: 9
10:09:39:setup_element:INFO: Eye window for uplink 9 : ______________________XXXXXXXXXXXXXXXXXX
Data delay found: 10
10:09:39:setup_element:INFO: Eye window for uplink 10: ______________________XXXXXXX___________
Data delay found: 5
10:09:39:setup_element:INFO: Eye window for uplink 11: __________________________XXXXXX________
Data delay found: 8
10:09:39:setup_element:INFO: Eye window for uplink 12: _______________________XXXXX____________
Data delay found: 5
10:09:39:setup_element:INFO: Eye window for uplink 13: __________________________XXXXX_________
Data delay found: 8
10:09:39:setup_element:INFO: Eye window for uplink 14: _______________________XXXXXXXXXX_______
Data delay found: 7
10:09:39:setup_element:INFO: Eye window for uplink 15: _________________________XXXXXXXXXXX____
Data delay found: 10
10:09:39:setup_element:INFO: Setting the data phase to 9 for uplink 8
10:09:39:setup_element:INFO: Setting the data phase to 10 for uplink 9
10:09:39:setup_element:INFO: Setting the data phase to 5 for uplink 10
10:09:39:setup_element:INFO: Setting the data phase to 8 for uplink 11
10:09:39:setup_element:INFO: Setting the data phase to 5 for uplink 12
10:09:39:setup_element:INFO: Setting the data phase to 8 for uplink 13
10:09:39:setup_element:INFO: Setting the data phase to 7 for uplink 14
10:09:39:setup_element:INFO: Setting the data phase to 10 for uplink 15
10:09:39:setup_element:INFO: Beginning SMX ASICs map scan
10:09:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:09:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:09:39:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:09:39:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:09:39:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
10:09:39:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:09:39:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:09:39:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:09:39:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:09:40:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:09:40:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:09:40:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:09:40:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:09:41:setup_element:INFO: Performing Elink synchronization
10:09:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:09:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:09:41:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:09:41:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:09:41:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
10:09:42:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
10:09:42:febtest:INFO: Init all SMX (CSA): 30
10:09:51:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:09:51:febtest:INFO: 08-01 | XA-000-08-003-000-002-193-08 | 44.1 | 1147.8
10:09:51:febtest:INFO: 10-03 | XA-000-08-003-000-002-192-08 | 47.3 | 1141.9
10:09:51:febtest:INFO: 12-05 | XA-000-08-003-000-002-191-04 | 44.1 | 1147.8
10:09:51:febtest:INFO: 14-07 | XA-000-08-003-000-002-190-04 | 34.6 | 1171.5
10:09:52:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
10:09:54:ST3_smx:INFO: chip: 8-1 44.073563 C 1153.732915 mV
10:09:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:09:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:09:54:ST3_smx:INFO: Electrons
10:09:54:ST3_smx:INFO: # loops 0
10:09:56:ST3_smx:INFO: # loops 1
10:09:58:ST3_smx:INFO: # loops 2
10:10:00:ST3_smx:INFO: Total # of broken channels: 0
10:10:00:ST3_smx:INFO: List of broken channels: []
10:10:00:ST3_smx:INFO: Total # of broken channels: 0
10:10:00:ST3_smx:INFO: List of broken channels: []
10:10:02:ST3_smx:INFO: chip: 10-3 47.250730 C 1153.732915 mV
10:10:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:10:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:10:02:ST3_smx:INFO: Electrons
10:10:02:ST3_smx:INFO: # loops 0
10:10:04:ST3_smx:INFO: # loops 1
10:10:06:ST3_smx:INFO: # loops 2
10:10:08:ST3_smx:INFO: Total # of broken channels: 0
10:10:08:ST3_smx:INFO: List of broken channels: []
10:10:08:ST3_smx:INFO: Total # of broken channels: 0
10:10:08:ST3_smx:INFO: List of broken channels: []
10:10:09:ST3_smx:INFO: chip: 12-5 44.073563 C 1159.654860 mV
10:10:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:10:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:10:09:ST3_smx:INFO: Electrons
10:10:09:ST3_smx:INFO: # loops 0
10:10:11:ST3_smx:INFO: # loops 1
10:10:13:ST3_smx:INFO: # loops 2
10:10:15:ST3_smx:INFO: Total # of broken channels: 0
10:10:15:ST3_smx:INFO: List of broken channels: []
10:10:15:ST3_smx:INFO: Total # of broken channels: 0
10:10:15:ST3_smx:INFO: List of broken channels: []
10:10:17:ST3_smx:INFO: chip: 14-7 34.556970 C 1177.390875 mV
10:10:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:10:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:10:17:ST3_smx:INFO: Electrons
10:10:17:ST3_smx:INFO: # loops 0
10:10:19:ST3_smx:INFO: # loops 1
10:10:21:ST3_smx:INFO: # loops 2
10:10:24:ST3_smx:INFO: Total # of broken channels: 0
10:10:24:ST3_smx:INFO: List of broken channels: []
10:10:24:ST3_smx:INFO: Total # of broken channels: 0
10:10:24:ST3_smx:INFO: List of broken channels: []
10:10:24:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:10:24:febtest:INFO: 08-01 | XA-000-08-003-000-002-193-08 | 47.3 | 1177.4
10:10:24:febtest:INFO: 10-03 | XA-000-08-003-000-002-192-08 | 47.3 | 1171.5
10:10:25:febtest:INFO: 12-05 | XA-000-08-003-000-002-191-04 | 44.1 | 1177.4
10:10:25:febtest:INFO: 14-07 | XA-000-08-003-000-002-190-04 | 37.7 | 1195.1
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_07_11-10_09_31
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3048| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.451', '0.7839', '1.850', '1.2680', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.0080', '1.850', '1.0640', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '0.9962', '1.850', '0.2644', '0.000', '0.0000', '0.000', '0.0000']