09:47:47:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:47:47:ST3_Shared:INFO:	                       FEB-Microcable                       
09:47:47:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:47:47:febtest:INFO:	Testing FEB with SN 3049
09:47:49:smx_tester:INFO:	Scanning setup
09:47:49:elinks:INFO:	Disabling clock on downlink 0
09:47:49:elinks:INFO:	Disabling clock on downlink 1
09:47:49:elinks:INFO:	Disabling clock on downlink 2
09:47:49:elinks:INFO:	Disabling clock on downlink 3
09:47:49:elinks:INFO:	Disabling clock on downlink 4
09:47:49:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:47:49:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:47:49:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:47:49:elinks:INFO:	Disabling clock on downlink 0
09:47:49:elinks:INFO:	Disabling clock on downlink 1
09:47:49:elinks:INFO:	Disabling clock on downlink 2
09:47:49:elinks:INFO:	Disabling clock on downlink 3
09:47:49:elinks:INFO:	Disabling clock on downlink 4
09:47:49:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:47:49:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:47:49:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
09:47:49:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
09:47:49:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
09:47:49:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
09:47:49:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
09:47:49:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
09:47:49:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
09:47:49:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
09:47:49:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:47:49:elinks:INFO:	Disabling clock on downlink 0
09:47:49:elinks:INFO:	Disabling clock on downlink 1
09:47:49:elinks:INFO:	Disabling clock on downlink 2
09:47:49:elinks:INFO:	Disabling clock on downlink 3
09:47:49:elinks:INFO:	Disabling clock on downlink 4
09:47:49:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:47:49:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:47:49:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:47:49:elinks:INFO:	Disabling clock on downlink 0
09:47:49:elinks:INFO:	Disabling clock on downlink 1
09:47:49:elinks:INFO:	Disabling clock on downlink 2
09:47:49:elinks:INFO:	Disabling clock on downlink 3
09:47:49:elinks:INFO:	Disabling clock on downlink 4
09:47:49:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:47:49:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:47:49:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:47:49:elinks:INFO:	Disabling clock on downlink 0
09:47:49:elinks:INFO:	Disabling clock on downlink 1
09:47:49:elinks:INFO:	Disabling clock on downlink 2
09:47:49:elinks:INFO:	Disabling clock on downlink 3
09:47:49:elinks:INFO:	Disabling clock on downlink 4
09:47:49:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:47:49:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:47:49:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:47:49:setup_element:INFO:	Scanning clock phase
09:47:49:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:47:49:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:47:50:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
09:47:50:setup_element:INFO:	Eye window for uplink 8 : ____________________________________________________________________XXXXXX______
Clock Delay: 30
09:47:50:setup_element:INFO:	Eye window for uplink 9 : ____________________________________________________________________XXXXXX______
Clock Delay: 30
09:47:50:setup_element:INFO:	Eye window for uplink 10: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
09:47:50:setup_element:INFO:	Eye window for uplink 11: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
09:47:50:setup_element:INFO:	Eye window for uplink 12: ______________________________________________________________________XXXXXX____
Clock Delay: 32
09:47:50:setup_element:INFO:	Eye window for uplink 13: ______________________________________________________________________XXXXXX____
Clock Delay: 32
09:47:50:setup_element:INFO:	Eye window for uplink 14: _____________________________________________________________________XXXXX______
Clock Delay: 31
09:47:50:setup_element:INFO:	Eye window for uplink 15: _____________________________________________________________________XXXXX______
Clock Delay: 31
09:47:50:setup_element:INFO:	Setting the clock phase to 31 for group 0, downlink 1
09:47:50:setup_element:INFO:	Scanning data phases
09:47:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:47:50:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:47:55:setup_element:INFO:	Data phase scan results for group 0, downlink 1
09:47:55:setup_element:INFO:	Eye window for uplink 8 : ___________________XXXXXXX______________
Data delay found: 2
09:47:55:setup_element:INFO:	Eye window for uplink 9 : ________________________XXXXXXX_________
Data delay found: 7
09:47:55:setup_element:INFO:	Eye window for uplink 10: _________________________XXXXXX_________
Data delay found: 7
09:47:55:setup_element:INFO:	Eye window for uplink 11: ____________________________XXXXXX______
Data delay found: 10
09:47:55:setup_element:INFO:	Eye window for uplink 12: _________________________XXXXXXX________
Data delay found: 8
09:47:55:setup_element:INFO:	Eye window for uplink 13: ____________________________XXXXXXX_____
Data delay found: 11
09:47:55:setup_element:INFO:	Eye window for uplink 14: ______________________XXXXXXX___________
Data delay found: 5
09:47:55:setup_element:INFO:	Eye window for uplink 15: ________________________XXXXXXXXX_______
Data delay found: 8
09:47:55:setup_element:INFO:	Setting the data phase to 2 for uplink 8
09:47:55:setup_element:INFO:	Setting the data phase to 7 for uplink 9
09:47:55:setup_element:INFO:	Setting the data phase to 7 for uplink 10
09:47:55:setup_element:INFO:	Setting the data phase to 10 for uplink 11
09:47:55:setup_element:INFO:	Setting the data phase to 8 for uplink 12
09:47:55:setup_element:INFO:	Setting the data phase to 11 for uplink 13
09:47:55:setup_element:INFO:	Setting the data phase to 5 for uplink 14
09:47:55:setup_element:INFO:	Setting the data phase to 8 for uplink 15
09:47:55:setup_element:INFO:	Beginning SMX ASICs map scan
09:47:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:47:55:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:47:55:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:47:55:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
09:47:55:uplink:INFO:	Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
09:47:55:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:47:55:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:47:55:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:47:55:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:47:56:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:47:56:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:47:56:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:47:56:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:47:57:setup_element:INFO:	Performing Elink synchronization
09:47:57:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:47:57:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:47:58:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:47:58:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
09:47:58:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
09:47:58:uplink:INFO:	Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
09:47:58:febtest:INFO:	Init all SMX (CSA): 30
09:48:07:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:48:08:febtest:INFO:	08-01 | XA-000-09-004-006-007-012-14 |  25.1 | 1201.0
09:48:08:febtest:INFO:	10-03 | XA-000-09-004-006-008-007-10 |  44.1 | 1135.9
09:48:08:febtest:INFO:	12-05 | XA-000-09-004-006-009-007-07 |  37.7 | 1159.7
09:48:08:febtest:INFO:	14-07 | XA-000-09-004-006-007-009-14 |  47.3 | 1124.0
09:48:09:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
09:48:11:ST3_smx:INFO:	chip: 8-1 	 25.062742 C 	 1212.728715 mV
09:48:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:48:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:48:11:ST3_smx:INFO:		Electrons
09:48:11:ST3_smx:INFO:	# loops 0
09:48:13:ST3_smx:INFO:	# loops 1
09:48:15:ST3_smx:INFO:	# loops 2
09:48:17:ST3_smx:INFO:	Total # of broken channels: 0
09:48:17:ST3_smx:INFO:	List of broken channels: []
09:48:17:ST3_smx:INFO:	Total # of broken channels: 0
09:48:17:ST3_smx:INFO:	List of broken channels: []
09:48:19:ST3_smx:INFO:	chip: 10-3 	 40.898880 C 	 1141.874115 mV
09:48:19:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:48:19:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:48:19:ST3_smx:INFO:		Electrons
09:48:19:ST3_smx:INFO:	# loops 0
09:48:21:ST3_smx:INFO:	# loops 1
09:48:23:ST3_smx:INFO:	# loops 2
09:48:25:ST3_smx:INFO:	Total # of broken channels: 0
09:48:25:ST3_smx:INFO:	List of broken channels: []
09:48:25:ST3_smx:INFO:	Total # of broken channels: 0
09:48:25:ST3_smx:INFO:	List of broken channels: []
09:48:26:ST3_smx:INFO:	chip: 12-5 	 37.726682 C 	 1165.571835 mV
09:48:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:48:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:48:26:ST3_smx:INFO:		Electrons
09:48:26:ST3_smx:INFO:	# loops 0
09:48:28:ST3_smx:INFO:	# loops 1
09:48:30:ST3_smx:INFO:	# loops 2
09:48:32:ST3_smx:INFO:	Total # of broken channels: 0
09:48:32:ST3_smx:INFO:	List of broken channels: []
09:48:32:ST3_smx:INFO:	Total # of broken channels: 0
09:48:32:ST3_smx:INFO:	List of broken channels: []
09:48:34:ST3_smx:INFO:	chip: 14-7 	 47.250730 C 	 1129.995435 mV
09:48:34:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:48:34:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:48:34:ST3_smx:INFO:		Electrons
09:48:34:ST3_smx:INFO:	# loops 0
09:48:36:ST3_smx:INFO:	# loops 1
09:48:37:ST3_smx:INFO:	# loops 2
09:48:39:ST3_smx:INFO:	Total # of broken channels: 0
09:48:39:ST3_smx:INFO:	List of broken channels: []
09:48:39:ST3_smx:INFO:	Total # of broken channels: 0
09:48:39:ST3_smx:INFO:	List of broken channels: []
09:48:40:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:48:40:febtest:INFO:	08-01 | XA-000-09-004-006-007-012-14 |  25.1 | 1236.2
09:48:40:febtest:INFO:	10-03 | XA-000-09-004-006-008-007-10 |  40.9 | 1165.6
09:48:40:febtest:INFO:	12-05 | XA-000-09-004-006-009-007-07 |  37.7 | 1189.2
09:48:40:febtest:INFO:	14-07 | XA-000-09-004-006-007-009-14 |  47.3 | 1153.7
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_10_25-09_47_47
OPERATOR  : Benjamin; 
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3049| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '0.8245', '1.851', '1.5160', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.0270', '1.850', '1.0630', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '0.9968', '1.850', '0.2653', '0.000', '0.0000', '0.000', '0.0000']