
FEB_3052 17.07.24 09:52:33
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09:52:33:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:52:33:ST3_Shared:INFO: FEB-Microcable 09:52:33:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:52:33:febtest:INFO: Testing FEB with SN 3052 09:52:35:smx_tester:INFO: Scanning setup 09:52:35:elinks:INFO: Disabling clock on downlink 0 09:52:35:elinks:INFO: Disabling clock on downlink 1 09:52:35:elinks:INFO: Disabling clock on downlink 2 09:52:35:elinks:INFO: Disabling clock on downlink 3 09:52:35:elinks:INFO: Disabling clock on downlink 4 09:52:35:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:52:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:52:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:52:35:elinks:INFO: Disabling clock on downlink 0 09:52:35:elinks:INFO: Disabling clock on downlink 1 09:52:35:elinks:INFO: Disabling clock on downlink 2 09:52:35:elinks:INFO: Disabling clock on downlink 3 09:52:35:elinks:INFO: Disabling clock on downlink 4 09:52:35:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:52:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:52:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 09:52:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 09:52:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 09:52:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 09:52:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 09:52:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 09:52:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 09:52:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 09:52:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:52:35:elinks:INFO: Disabling clock on downlink 0 09:52:35:elinks:INFO: Disabling clock on downlink 1 09:52:35:elinks:INFO: Disabling clock on downlink 2 09:52:35:elinks:INFO: Disabling clock on downlink 3 09:52:35:elinks:INFO: Disabling clock on downlink 4 09:52:35:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:52:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:52:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:52:35:elinks:INFO: Disabling clock on downlink 0 09:52:35:elinks:INFO: Disabling clock on downlink 1 09:52:35:elinks:INFO: Disabling clock on downlink 2 09:52:35:elinks:INFO: Disabling clock on downlink 3 09:52:35:elinks:INFO: Disabling clock on downlink 4 09:52:35:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:52:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 09:52:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:52:35:elinks:INFO: Disabling clock on downlink 0 09:52:35:elinks:INFO: Disabling clock on downlink 1 09:52:35:elinks:INFO: Disabling clock on downlink 2 09:52:35:elinks:INFO: Disabling clock on downlink 3 09:52:35:elinks:INFO: Disabling clock on downlink 4 09:52:35:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:52:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 09:52:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:52:35:setup_element:INFO: Scanning clock phase 09:52:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:52:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:52:36:setup_element:INFO: Clock phase scan results for group 0, downlink 1 09:52:36:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXX_____ Clock Delay: 31 09:52:36:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXX_____ Clock Delay: 31 09:52:36:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXX_____ Clock Delay: 31 09:52:36:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXX_____ Clock Delay: 31 09:52:36:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXX_____ Clock Delay: 31 09:52:36:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXX_____ Clock Delay: 31 09:52:36:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXX_____ Clock Delay: 32 09:52:36:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXX_____ Clock Delay: 32 09:52:36:setup_element:INFO: Setting the clock phase to 31 for group 0, downlink 1 09:52:36:setup_element:INFO: Scanning data phases 09:52:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:52:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:52:41:setup_element:INFO: Data phase scan results for group 0, downlink 1 09:52:41:setup_element:INFO: Eye window for uplink 8 : _____________________XXXXXXX____________ Data delay found: 4 09:52:41:setup_element:INFO: Eye window for uplink 9 : __________________________XXXXXX________ Data delay found: 8 09:52:41:setup_element:INFO: Eye window for uplink 10: ____________________XXXXXXXXXXXXXXXXXXXX Data delay found: 9 09:52:41:setup_element:INFO: Eye window for uplink 11: ____________________XXXXXXXXXXXXXXXXXXXX Data delay found: 9 09:52:41:setup_element:INFO: Eye window for uplink 12: ________________________XXXXXX__________ Data delay found: 6 09:52:41:setup_element:INFO: Eye window for uplink 13: ___________________________XXXXXX_______ Data delay found: 9 09:52:41:setup_element:INFO: Eye window for uplink 14: _______________________XXXXXXXX_________ Data delay found: 6 09:52:41:setup_element:INFO: Eye window for uplink 15: __________________________XXXXXXXX______ Data delay found: 9 09:52:41:setup_element:INFO: Setting the data phase to 4 for uplink 8 09:52:41:setup_element:INFO: Setting the data phase to 8 for uplink 9 09:52:41:setup_element:INFO: Setting the data phase to 9 for uplink 10 09:52:41:setup_element:INFO: Setting the data phase to 9 for uplink 11 09:52:41:setup_element:INFO: Setting the data phase to 6 for uplink 12 09:52:41:setup_element:INFO: Setting the data phase to 9 for uplink 13 09:52:41:setup_element:INFO: Setting the data phase to 6 for uplink 14 09:52:41:setup_element:INFO: Setting the data phase to 9 for uplink 15 09:52:41:setup_element:INFO: Beginning SMX ASICs map scan 09:52:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:52:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:52:41:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 09:52:41:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 09:52:41:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15] 09:52:41:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 09:52:41:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 09:52:42:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 09:52:42:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 09:52:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 09:52:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 09:52:42:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 09:52:42:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 09:52:44:setup_element:INFO: Performing Elink synchronization 09:52:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:52:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:52:44:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 09:52:44:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 09:52:44:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 09:52:44:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)] 3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)] 5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)] 7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)] |_________________________________________________________________________| 09:52:44:febtest:INFO: Init all SMX (CSA): 30 09:52:53:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:52:54:febtest:INFO: 08-01 | XA-000-08-003-000-002-083-05 | 31.4 | 1177.4 09:52:54:febtest:INFO: 10-03 | XA-000-08-003-000-002-087-05 | 31.4 | 1189.2 09:52:54:febtest:INFO: 12-05 | XA-000-08-003-000-002-091-05 | 47.3 | 1130.0 09:52:54:febtest:INFO: 14-07 | XA-000-08-003-000-002-084-05 | 40.9 | 1147.8 09:52:55:febtest:INFO: Set all CSA to ZERO FEB type: A FEB_A: 1 FEB_B: 0 09:52:57:ST3_smx:INFO: chip: 8-1 34.556970 C 1189.190035 mV 09:52:57:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:52:57:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:52:57:ST3_smx:INFO: Electrons 09:52:57:ST3_smx:INFO: # loops 0 09:53:00:ST3_smx:INFO: # loops 1 09:53:02:ST3_smx:INFO: # loops 2 09:53:04:ST3_smx:INFO: Total # of broken channels: 0 09:53:04:ST3_smx:INFO: List of broken channels: [] 09:53:04:ST3_smx:INFO: Total # of broken channels: 0 09:53:04:ST3_smx:INFO: List of broken channels: [] 09:53:06:ST3_smx:INFO: chip: 10-3 31.389742 C 1200.969315 mV 09:53:06:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:53:06:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:53:06:ST3_smx:INFO: Electrons 09:53:06:ST3_smx:INFO: # loops 0 09:53:08:ST3_smx:INFO: # loops 1 09:53:10:ST3_smx:INFO: # loops 2 09:53:13:ST3_smx:INFO: Total # of broken channels: 0 09:53:13:ST3_smx:INFO: List of broken channels: [] 09:53:13:ST3_smx:INFO: Total # of broken channels: 0 09:53:13:ST3_smx:INFO: List of broken channels: [] 09:53:14:ST3_smx:INFO: chip: 12-5 47.250730 C 1141.874115 mV 09:53:14:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:53:14:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:53:14:ST3_smx:INFO: Electrons 09:53:14:ST3_smx:INFO: # loops 0 09:53:16:ST3_smx:INFO: # loops 1 09:53:18:ST3_smx:INFO: # loops 2 09:53:20:ST3_smx:INFO: Total # of broken channels: 0 09:53:20:ST3_smx:INFO: List of broken channels: [] 09:53:20:ST3_smx:INFO: Total # of broken channels: 0 09:53:20:ST3_smx:INFO: List of broken channels: [] 09:53:22:ST3_smx:INFO: chip: 14-7 40.898880 C 1159.654860 mV 09:53:22:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:53:22:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:53:22:ST3_smx:INFO: Electrons 09:53:22:ST3_smx:INFO: # loops 0 09:53:23:ST3_smx:INFO: # loops 1 09:53:25:ST3_smx:INFO: # loops 2 09:53:27:ST3_smx:INFO: Total # of broken channels: 0 09:53:27:ST3_smx:INFO: List of broken channels: [] 09:53:27:ST3_smx:INFO: Total # of broken channels: 0 09:53:27:ST3_smx:INFO: List of broken channels: [] 09:53:27:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:53:28:febtest:INFO: 08-01 | XA-000-08-003-000-002-083-05 | 34.6 | 1206.9 09:53:28:febtest:INFO: 10-03 | XA-000-08-003-000-002-087-05 | 31.4 | 1224.5 09:53:28:febtest:INFO: 12-05 | XA-000-08-003-000-002-091-05 | 47.3 | 1165.6 09:53:28:febtest:INFO: 14-07 | XA-000-08-003-000-002-084-05 | 44.1 | 1177.4 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_07_17-09_52_33 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 3052| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['2.450', '0.8067', '1.851', '0.7669', '0.000', '0.0000', '0.000', '0.0000'] VI_after__Init : ['2.450', '1.0210', '1.850', '1.1330', '0.000', '0.0000', '0.000', '0.0000'] VI_at__the_End : ['2.450', '0.9953', '1.850', '0.2661', '0.000', '0.0000', '0.000', '0.0000']