FEB_3053 16.07.24 09:50:54
Info
09:50:54:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:50:54:ST3_Shared:INFO: FEB-Microcable
09:50:54:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:50:54:febtest:INFO: Testing FEB with SN 3053
09:50:55:smx_tester:INFO: Scanning setup
09:50:55:elinks:INFO: Disabling clock on downlink 0
09:50:55:elinks:INFO: Disabling clock on downlink 1
09:50:55:elinks:INFO: Disabling clock on downlink 2
09:50:55:elinks:INFO: Disabling clock on downlink 3
09:50:55:elinks:INFO: Disabling clock on downlink 4
09:50:55:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:50:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:50:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:50:55:elinks:INFO: Disabling clock on downlink 0
09:50:55:elinks:INFO: Disabling clock on downlink 1
09:50:55:elinks:INFO: Disabling clock on downlink 2
09:50:55:elinks:INFO: Disabling clock on downlink 3
09:50:55:elinks:INFO: Disabling clock on downlink 4
09:50:55:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:50:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:50:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
09:50:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
09:50:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
09:50:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
09:50:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
09:50:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
09:50:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
09:50:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
09:50:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:50:56:elinks:INFO: Disabling clock on downlink 0
09:50:56:elinks:INFO: Disabling clock on downlink 1
09:50:56:elinks:INFO: Disabling clock on downlink 2
09:50:56:elinks:INFO: Disabling clock on downlink 3
09:50:56:elinks:INFO: Disabling clock on downlink 4
09:50:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:50:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:50:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:50:56:elinks:INFO: Disabling clock on downlink 0
09:50:56:elinks:INFO: Disabling clock on downlink 1
09:50:56:elinks:INFO: Disabling clock on downlink 2
09:50:56:elinks:INFO: Disabling clock on downlink 3
09:50:56:elinks:INFO: Disabling clock on downlink 4
09:50:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:50:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:50:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:50:56:elinks:INFO: Disabling clock on downlink 0
09:50:56:elinks:INFO: Disabling clock on downlink 1
09:50:56:elinks:INFO: Disabling clock on downlink 2
09:50:56:elinks:INFO: Disabling clock on downlink 3
09:50:56:elinks:INFO: Disabling clock on downlink 4
09:50:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:50:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:50:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:50:56:setup_element:INFO: Scanning clock phase
09:50:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:50:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:50:56:setup_element:INFO: Clock phase scan results for group 0, downlink 1
09:50:56:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
09:50:56:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
09:50:56:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXXX____
Clock Delay: 32
09:50:56:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXXX____
Clock Delay: 32
09:50:56:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXX____
Clock Delay: 32
09:50:56:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXX____
Clock Delay: 32
09:50:56:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXX____
Clock Delay: 32
09:50:56:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXX____
Clock Delay: 32
09:50:56:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
09:50:56:setup_element:INFO: Scanning data phases
09:50:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:50:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:51:01:setup_element:INFO: Data phase scan results for group 0, downlink 1
09:51:01:setup_element:INFO: Eye window for uplink 8 : _____________________XXXXXXXX___________
Data delay found: 4
09:51:01:setup_element:INFO: Eye window for uplink 9 : __________________________XXXXXXXX______
Data delay found: 9
09:51:01:setup_element:INFO: Eye window for uplink 10: ______________________XXXXXXX___________
Data delay found: 5
09:51:01:setup_element:INFO: Eye window for uplink 11: __________________________XXXXXX________
Data delay found: 8
09:51:01:setup_element:INFO: Eye window for uplink 12: _______________________XXXXXXX__________
Data delay found: 6
09:51:01:setup_element:INFO: Eye window for uplink 13: ___________________________XXXXXX_______
Data delay found: 9
09:51:01:setup_element:INFO: Eye window for uplink 14: _______________________XXXXXXXX_________
Data delay found: 6
09:51:01:setup_element:INFO: Eye window for uplink 15: __________________________XXXXXXX_______
Data delay found: 9
09:51:01:setup_element:INFO: Setting the data phase to 4 for uplink 8
09:51:01:setup_element:INFO: Setting the data phase to 9 for uplink 9
09:51:01:setup_element:INFO: Setting the data phase to 5 for uplink 10
09:51:01:setup_element:INFO: Setting the data phase to 8 for uplink 11
09:51:01:setup_element:INFO: Setting the data phase to 6 for uplink 12
09:51:01:setup_element:INFO: Setting the data phase to 9 for uplink 13
09:51:01:setup_element:INFO: Setting the data phase to 6 for uplink 14
09:51:01:setup_element:INFO: Setting the data phase to 9 for uplink 15
09:51:01:setup_element:INFO: Beginning SMX ASICs map scan
09:51:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:51:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:51:01:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:51:01:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:51:01:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
09:51:02:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:51:02:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:51:02:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:51:02:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:51:02:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:51:02:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:51:03:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:51:03:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:51:04:setup_element:INFO: Performing Elink synchronization
09:51:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:51:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:51:04:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:51:04:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:51:04:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
09:51:04:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
09:51:04:febtest:INFO: Init all SMX (CSA): 30
09:51:12:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:51:12:febtest:INFO: 08-01 | XA-000-08-003-000-002-067-02 | 31.4 | 1177.4
09:51:12:febtest:INFO: 10-03 | XA-000-08-003-000-002-061-14 | 40.9 | 1147.8
09:51:12:febtest:INFO: 12-05 | XA-000-08-003-000-002-064-02 | 21.9 | 1206.9
09:51:12:febtest:INFO: 14-07 | XA-000-08-003-000-002-069-02 | 25.1 | 1206.9
09:51:13:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
09:51:15:ST3_smx:INFO: chip: 8-1 31.389742 C 1189.190035 mV
09:51:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:51:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:51:15:ST3_smx:INFO: Electrons
09:51:15:ST3_smx:INFO: # loops 0
09:51:17:ST3_smx:INFO: # loops 1
09:51:18:ST3_smx:INFO: # loops 2
09:51:20:ST3_smx:INFO: Total # of broken channels: 0
09:51:20:ST3_smx:INFO: List of broken channels: []
09:51:20:ST3_smx:INFO: Total # of broken channels: 0
09:51:20:ST3_smx:INFO: List of broken channels: []
09:51:22:ST3_smx:INFO: chip: 10-3 40.898880 C 1159.654860 mV
09:51:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:51:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:51:22:ST3_smx:INFO: Electrons
09:51:22:ST3_smx:INFO: # loops 0
09:51:23:ST3_smx:INFO: # loops 1
09:51:25:ST3_smx:INFO: # loops 2
09:51:26:ST3_smx:INFO: Total # of broken channels: 0
09:51:26:ST3_smx:INFO: List of broken channels: []
09:51:26:ST3_smx:INFO: Total # of broken channels: 0
09:51:26:ST3_smx:INFO: List of broken channels: []
09:51:28:ST3_smx:INFO: chip: 12-5 25.062742 C 1218.600960 mV
09:51:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:51:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:51:28:ST3_smx:INFO: Electrons
09:51:28:ST3_smx:INFO: # loops 0
09:51:30:ST3_smx:INFO: # loops 1
09:51:32:ST3_smx:INFO: # loops 2
09:51:34:ST3_smx:INFO: Total # of broken channels: 0
09:51:34:ST3_smx:INFO: List of broken channels: []
09:51:34:ST3_smx:INFO: Total # of broken channels: 0
09:51:34:ST3_smx:INFO: List of broken channels: []
09:51:36:ST3_smx:INFO: chip: 14-7 25.062742 C 1218.600960 mV
09:51:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:51:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:51:36:ST3_smx:INFO: Electrons
09:51:36:ST3_smx:INFO: # loops 0
09:51:38:ST3_smx:INFO: # loops 1
09:51:39:ST3_smx:INFO: # loops 2
09:51:41:ST3_smx:INFO: Total # of broken channels: 0
09:51:41:ST3_smx:INFO: List of broken channels: []
09:51:41:ST3_smx:INFO: Total # of broken channels: 0
09:51:41:ST3_smx:INFO: List of broken channels: []
09:51:41:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:51:41:febtest:INFO: 08-01 | XA-000-08-003-000-002-067-02 | 31.4 | 1206.9
09:51:42:febtest:INFO: 10-03 | XA-000-08-003-000-002-061-14 | 40.9 | 1177.4
09:51:42:febtest:INFO: 12-05 | XA-000-08-003-000-002-064-02 | 25.1 | 1242.0
09:51:42:febtest:INFO: 14-07 | XA-000-08-003-000-002-069-02 | 28.2 | 1236.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_07_16-09_50_54
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3053| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '0.6306', '1.851', '1.0310', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '0.9532', '1.850', '1.0250', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '0.9673', '1.850', '0.2570', '0.000', '0.0000', '0.000', '0.0000']