Go Back
FEB_3053 16.07.24 12:58:49
Info
12:58:49:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:58:49:ST3_Shared:INFO: FEB-Microcable
12:58:49:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:58:49:febtest:INFO: Testing FEB with SN 3053
12:58:51:smx_tester:INFO: Scanning setup
12:58:51:elinks:INFO: Disabling clock on downlink 0
12:58:51:elinks:INFO: Disabling clock on downlink 1
12:58:51:elinks:INFO: Disabling clock on downlink 2
12:58:51:elinks:INFO: Disabling clock on downlink 3
12:58:51:elinks:INFO: Disabling clock on downlink 4
12:58:51:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:58:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:58:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:58:51:elinks:INFO: Disabling clock on downlink 0
12:58:51:elinks:INFO: Disabling clock on downlink 1
12:58:51:elinks:INFO: Disabling clock on downlink 2
12:58:51:elinks:INFO: Disabling clock on downlink 3
12:58:51:elinks:INFO: Disabling clock on downlink 4
12:58:51:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:58:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:58:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
12:58:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
12:58:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
12:58:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
12:58:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
12:58:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
12:58:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
12:58:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
12:58:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
12:58:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
12:58:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
12:58:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
12:58:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
12:58:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
12:58:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
12:58:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
12:58:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:58:51:elinks:INFO: Disabling clock on downlink 0
12:58:51:elinks:INFO: Disabling clock on downlink 1
12:58:51:elinks:INFO: Disabling clock on downlink 2
12:58:51:elinks:INFO: Disabling clock on downlink 3
12:58:51:elinks:INFO: Disabling clock on downlink 4
12:58:51:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:58:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:58:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:58:51:elinks:INFO: Disabling clock on downlink 0
12:58:51:elinks:INFO: Disabling clock on downlink 1
12:58:51:elinks:INFO: Disabling clock on downlink 2
12:58:51:elinks:INFO: Disabling clock on downlink 3
12:58:51:elinks:INFO: Disabling clock on downlink 4
12:58:51:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:58:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
12:58:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:58:51:elinks:INFO: Disabling clock on downlink 0
12:58:51:elinks:INFO: Disabling clock on downlink 1
12:58:51:elinks:INFO: Disabling clock on downlink 2
12:58:51:elinks:INFO: Disabling clock on downlink 3
12:58:51:elinks:INFO: Disabling clock on downlink 4
12:58:51:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:58:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
12:58:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:58:51:setup_element:INFO: Scanning clock phase
12:58:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:58:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:58:52:setup_element:INFO: Clock phase scan results for group 0, downlink 1
12:58:52:setup_element:INFO: Eye window for uplink 0 : _________________________________________________________________________XXXX___
Clock Delay: 34
12:58:52:setup_element:INFO: Eye window for uplink 1 : _________________________________________________________________________XXXX___
Clock Delay: 34
12:58:52:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
12:58:52:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
12:58:52:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________XXXXX___
Clock Delay: 34
12:58:52:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________XXXXX___
Clock Delay: 34
12:58:52:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
12:58:52:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
12:58:52:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
12:58:52:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
12:58:52:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXXX____
Clock Delay: 32
12:58:52:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXXX____
Clock Delay: 32
12:58:52:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXX____
Clock Delay: 32
12:58:52:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXX____
Clock Delay: 32
12:58:52:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXX____
Clock Delay: 32
12:58:52:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXX____
Clock Delay: 32
12:58:52:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
12:58:52:setup_element:INFO: Scanning data phases
12:58:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:58:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:58:57:setup_element:INFO: Data phase scan results for group 0, downlink 1
12:58:57:setup_element:INFO: Eye window for uplink 0 : ____XXXXXXX_____________________________
Data delay found: 27
12:58:57:setup_element:INFO: Eye window for uplink 1 : _XXXXXX________________________________X
Data delay found: 22
12:58:57:setup_element:INFO: Eye window for uplink 2 : ___XXXXX________________________________
Data delay found: 25
12:58:57:setup_element:INFO: Eye window for uplink 3 : XXXXX_________________________________XX
Data delay found: 21
12:58:57:setup_element:INFO: Eye window for uplink 4 : XXXXXX______________________________XXXX
Data delay found: 20
12:58:57:setup_element:INFO: Eye window for uplink 5 : _________________________________XXXXXXX
Data delay found: 16
12:58:57:setup_element:INFO: Eye window for uplink 6 : ______________________________XXXXXXX___
Data delay found: 13
12:58:57:setup_element:INFO: Eye window for uplink 7 : __________________________XXXXXXX_______
Data delay found: 9
12:58:57:setup_element:INFO: Eye window for uplink 8 : __________________XXXXXXXX______________
Data delay found: 1
12:58:57:setup_element:INFO: Eye window for uplink 9 : ________________________XXXXXXX_________
Data delay found: 7
12:58:57:setup_element:INFO: Eye window for uplink 10: ___________________XXXXXXX______________
Data delay found: 2
12:58:57:setup_element:INFO: Eye window for uplink 11: ________________________XXXXXX__________
Data delay found: 6
12:58:57:setup_element:INFO: Eye window for uplink 12: _____________________XXXXXX_____________
Data delay found: 3
12:58:57:setup_element:INFO: Eye window for uplink 13: _________________________XXXX___________
Data delay found: 6
12:58:57:setup_element:INFO: Eye window for uplink 14: _____________________XXXXXXX____________
Data delay found: 4
12:58:57:setup_element:INFO: Eye window for uplink 15: _______________________XXXXXXXX_________
Data delay found: 6
12:58:57:setup_element:INFO: Setting the data phase to 27 for uplink 0
12:58:57:setup_element:INFO: Setting the data phase to 22 for uplink 1
12:58:57:setup_element:INFO: Setting the data phase to 25 for uplink 2
12:58:57:setup_element:INFO: Setting the data phase to 21 for uplink 3
12:58:57:setup_element:INFO: Setting the data phase to 20 for uplink 4
12:58:57:setup_element:INFO: Setting the data phase to 16 for uplink 5
12:58:57:setup_element:INFO: Setting the data phase to 13 for uplink 6
12:58:57:setup_element:INFO: Setting the data phase to 9 for uplink 7
12:58:57:setup_element:INFO: Setting the data phase to 1 for uplink 8
12:58:57:setup_element:INFO: Setting the data phase to 7 for uplink 9
12:58:57:setup_element:INFO: Setting the data phase to 2 for uplink 10
12:58:57:setup_element:INFO: Setting the data phase to 6 for uplink 11
12:58:57:setup_element:INFO: Setting the data phase to 3 for uplink 12
12:58:57:setup_element:INFO: Setting the data phase to 6 for uplink 13
12:58:57:setup_element:INFO: Setting the data phase to 4 for uplink 14
12:58:57:setup_element:INFO: Setting the data phase to 6 for uplink 15
12:58:57:setup_element:INFO: Beginning SMX ASICs map scan
12:58:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:58:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:58:57:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
12:58:57:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
12:58:57:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
12:58:57:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
12:58:57:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
12:58:57:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
12:58:57:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
12:58:57:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
12:58:57:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
12:58:58:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
12:58:58:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
12:58:58:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
12:58:58:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
12:58:58:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
12:58:58:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
12:58:58:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
12:58:58:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
12:58:58:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
12:58:58:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
12:59:00:setup_element:INFO: Performing Elink synchronization
12:59:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:59:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:59:00:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
12:59:00:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
12:59:00:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
12:59:00:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
12:59:00:febtest:INFO: Init all SMX (CSA): 30
12:59:14:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:59:15:febtest:INFO: 01-00 | XA-000-08-003-000-002-063-14 | 31.4 | 1177.4
12:59:15:febtest:INFO: 08-01 | XA-000-08-003-000-002-067-02 | 34.6 | 1177.4
12:59:15:febtest:INFO: 03-02 | XA-000-08-003-000-002-066-02 | 18.7 | 1224.5
12:59:15:febtest:INFO: 10-03 | XA-000-08-003-000-002-061-14 | 44.1 | 1147.8
12:59:15:febtest:INFO: 05-04 | XA-000-08-003-000-002-060-14 | 31.4 | 1171.5
12:59:16:febtest:INFO: 12-05 | XA-000-08-003-000-002-064-02 | 25.1 | 1206.9
12:59:16:febtest:INFO: 07-06 | -000-08-003-000-002-064-02 | 40.9 | 1147.8
12:59:16:febtest:INFO: 14-07 | XA-000-08-003-000-002-069-02 | 25.1 | 1206.9
12:59:17:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
12:59:19:ST3_smx:INFO: chip: 1-0 34.556970 C 1195.082160 mV
12:59:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:59:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:59:19:ST3_smx:INFO: Electrons
12:59:19:ST3_smx:INFO: # loops 0
12:59:21:ST3_smx:INFO: # loops 1
12:59:22:ST3_smx:INFO: # loops 2
12:59:24:ST3_smx:INFO: Total # of broken channels: 0
12:59:24:ST3_smx:INFO: List of broken channels: []
12:59:24:ST3_smx:INFO: Total # of broken channels: 0
12:59:24:ST3_smx:INFO: List of broken channels: []
12:59:26:ST3_smx:INFO: chip: 8-1 37.726682 C 1189.190035 mV
12:59:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:59:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:59:26:ST3_smx:INFO: Electrons
12:59:26:ST3_smx:INFO: # loops 0
12:59:27:ST3_smx:INFO: # loops 1
12:59:29:ST3_smx:INFO: # loops 2
12:59:30:ST3_smx:INFO: Total # of broken channels: 0
12:59:30:ST3_smx:INFO: List of broken channels: []
12:59:30:ST3_smx:INFO: Total # of broken channels: 0
12:59:30:ST3_smx:INFO: List of broken channels: []
12:59:32:ST3_smx:INFO: chip: 3-2 21.902970 C 1236.187875 mV
12:59:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:59:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:59:32:ST3_smx:INFO: Electrons
12:59:32:ST3_smx:INFO: # loops 0
12:59:33:ST3_smx:INFO: # loops 1
12:59:35:ST3_smx:INFO: # loops 2
12:59:37:ST3_smx:INFO: Total # of broken channels: 0
12:59:37:ST3_smx:INFO: List of broken channels: []
12:59:37:ST3_smx:INFO: Total # of broken channels: 0
12:59:37:ST3_smx:INFO: List of broken channels: []
12:59:38:ST3_smx:INFO: chip: 10-3 44.073563 C 1159.654860 mV
12:59:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:59:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:59:38:ST3_smx:INFO: Electrons
12:59:38:ST3_smx:INFO: # loops 0
12:59:40:ST3_smx:INFO: # loops 1
12:59:41:ST3_smx:INFO: # loops 2
12:59:43:ST3_smx:INFO: Total # of broken channels: 0
12:59:43:ST3_smx:INFO: List of broken channels: []
12:59:43:ST3_smx:INFO: Total # of broken channels: 0
12:59:43:ST3_smx:INFO: List of broken channels: []
12:59:44:ST3_smx:INFO: chip: 5-4 34.556970 C 1183.292940 mV
12:59:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:59:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:59:44:ST3_smx:INFO: Electrons
12:59:45:ST3_smx:INFO: # loops 0
12:59:46:ST3_smx:INFO: # loops 1
12:59:48:ST3_smx:INFO: # loops 2
12:59:49:ST3_smx:INFO: Total # of broken channels: 0
12:59:49:ST3_smx:INFO: List of broken channels: []
12:59:49:ST3_smx:INFO: Total # of broken channels: 0
12:59:49:ST3_smx:INFO: List of broken channels: []
12:59:51:ST3_smx:INFO: chip: 12-5 28.225000 C 1218.600960 mV
12:59:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:59:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:59:51:ST3_smx:INFO: Electrons
12:59:51:ST3_smx:INFO: # loops 0
12:59:52:ST3_smx:INFO: # loops 1
12:59:54:ST3_smx:INFO: # loops 2
12:59:55:ST3_smx:INFO: Total # of broken channels: 0
12:59:55:ST3_smx:INFO: List of broken channels: []
12:59:55:ST3_smx:INFO: Total # of broken channels: 0
12:59:55:ST3_smx:INFO: List of broken channels: []
12:59:57:ST3_smx:INFO: chip: 7-6 44.073563 C 1153.732915 mV
12:59:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:59:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:59:57:ST3_smx:INFO: Electrons
12:59:57:ST3_smx:INFO: # loops 0
12:59:59:ST3_smx:INFO: # loops 1
13:00:00:ST3_smx:INFO: # loops 2
13:00:02:ST3_smx:INFO: Total # of broken channels: 0
13:00:02:ST3_smx:INFO: List of broken channels: []
13:00:02:ST3_smx:INFO: Total # of broken channels: 0
13:00:02:ST3_smx:INFO: List of broken channels: []
13:00:03:ST3_smx:INFO: chip: 14-7 28.225000 C 1218.600960 mV
13:00:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:00:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:00:03:ST3_smx:INFO: Electrons
13:00:03:ST3_smx:INFO: # loops 0
13:00:05:ST3_smx:INFO: # loops 1
13:00:07:ST3_smx:INFO: # loops 2
13:00:08:ST3_smx:INFO: Total # of broken channels: 0
13:00:08:ST3_smx:INFO: List of broken channels: []
13:00:08:ST3_smx:INFO: Total # of broken channels: 0
13:00:08:ST3_smx:INFO: List of broken channels: []
13:00:08:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:00:09:febtest:INFO: 01-00 | XA-000-08-003-000-002-063-14 | 34.6 | 1212.7
13:00:09:febtest:INFO: 08-01 | XA-000-08-003-000-002-067-02 | 37.7 | 1206.9
13:00:09:febtest:INFO: 03-02 | XA-000-08-003-000-002-066-02 | 21.9 | 1259.6
13:00:09:febtest:INFO: 10-03 | XA-000-08-003-000-002-061-14 | 47.3 | 1183.3
13:00:09:febtest:INFO: 05-04 | XA-000-08-003-000-002-060-14 | 37.7 | 1201.0
13:00:10:febtest:INFO: 12-05 | XA-000-08-003-000-002-064-02 | 28.2 | 1242.0
13:00:10:febtest:INFO: 07-06 | -000-08-003-000-002-064-02 | 47.3 | 1177.4
13:00:10:febtest:INFO: 14-07 | XA-000-08-003-000-002-069-02 | 28.2 | 1242.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_07_16-12_58_49
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3053| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.7250', '1.850', '2.2160', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9280', '1.850', '2.3710', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9270', '1.850', '0.5098', '0.000', '0.0000', '0.000', '0.0000']