Go Back
FEB_3055 22.07.24 12:45:41
TextEdit.txt
12:45:41:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:45:41:ST3_Shared:INFO: FEB-Microcable
12:45:41:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:45:41:febtest:INFO: Testing FEB with SN 3055
12:45:43:smx_tester:INFO: Scanning setup
12:45:43:elinks:INFO: Disabling clock on downlink 0
12:45:43:elinks:INFO: Disabling clock on downlink 1
12:45:43:elinks:INFO: Disabling clock on downlink 2
12:45:43:elinks:INFO: Disabling clock on downlink 3
12:45:43:elinks:INFO: Disabling clock on downlink 4
12:45:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:45:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:45:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:45:43:elinks:INFO: Disabling clock on downlink 0
12:45:43:elinks:INFO: Disabling clock on downlink 1
12:45:43:elinks:INFO: Disabling clock on downlink 2
12:45:43:elinks:INFO: Disabling clock on downlink 3
12:45:43:elinks:INFO: Disabling clock on downlink 4
12:45:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:45:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:45:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
12:45:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
12:45:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
12:45:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
12:45:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
12:45:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
12:45:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
12:45:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
12:45:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:45:43:elinks:INFO: Disabling clock on downlink 0
12:45:43:elinks:INFO: Disabling clock on downlink 1
12:45:43:elinks:INFO: Disabling clock on downlink 2
12:45:43:elinks:INFO: Disabling clock on downlink 3
12:45:43:elinks:INFO: Disabling clock on downlink 4
12:45:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:45:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:45:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:45:43:elinks:INFO: Disabling clock on downlink 0
12:45:43:elinks:INFO: Disabling clock on downlink 1
12:45:43:elinks:INFO: Disabling clock on downlink 2
12:45:43:elinks:INFO: Disabling clock on downlink 3
12:45:43:elinks:INFO: Disabling clock on downlink 4
12:45:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:45:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
12:45:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:45:43:elinks:INFO: Disabling clock on downlink 0
12:45:43:elinks:INFO: Disabling clock on downlink 1
12:45:43:elinks:INFO: Disabling clock on downlink 2
12:45:43:elinks:INFO: Disabling clock on downlink 3
12:45:43:elinks:INFO: Disabling clock on downlink 4
12:45:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:45:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
12:45:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:45:44:setup_element:INFO: Scanning clock phase
12:45:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:45:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:45:44:setup_element:INFO: Clock phase scan results for group 0, downlink 1
12:45:44:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
12:45:44:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
12:45:44:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________________XXXXXX___
Clock Delay: 33
12:45:44:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________________XXXXXX___
Clock Delay: 33
12:45:44:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXX______
Clock Delay: 31
12:45:44:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXX______
Clock Delay: 31
12:45:44:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXX_____
Clock Delay: 32
12:45:44:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXX_____
Clock Delay: 32
12:45:44:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1
12:45:44:setup_element:INFO: Scanning data phases
12:45:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:45:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:45:49:setup_element:INFO: Data phase scan results for group 0, downlink 1
12:45:49:setup_element:INFO: Eye window for uplink 8 : ____________________XXXXXXX_____________
Data delay found: 3
12:45:49:setup_element:INFO: Eye window for uplink 9 : _________________________XXXXXXX________
Data delay found: 8
12:45:49:setup_element:INFO: Eye window for uplink 10: _________________________XXXXXX_________
Data delay found: 7
12:45:49:setup_element:INFO: Eye window for uplink 11: ____________________________XXXXXX______
Data delay found: 10
12:45:49:setup_element:INFO: Eye window for uplink 12: _______________________XXXXX____________
Data delay found: 5
12:45:49:setup_element:INFO: Eye window for uplink 13: __________________________XXXXX_________
Data delay found: 8
12:45:49:setup_element:INFO: Eye window for uplink 14: _______________________XXXXXX___________
Data delay found: 5
12:45:49:setup_element:INFO: Eye window for uplink 15: _________________________XXXXXXX________
Data delay found: 8
12:45:49:setup_element:INFO: Setting the data phase to 3 for uplink 8
12:45:49:setup_element:INFO: Setting the data phase to 8 for uplink 9
12:45:49:setup_element:INFO: Setting the data phase to 7 for uplink 10
12:45:49:setup_element:INFO: Setting the data phase to 10 for uplink 11
12:45:49:setup_element:INFO: Setting the data phase to 5 for uplink 12
12:45:49:setup_element:INFO: Setting the data phase to 8 for uplink 13
12:45:49:setup_element:INFO: Setting the data phase to 5 for uplink 14
12:45:49:setup_element:INFO: Setting the data phase to 8 for uplink 15
12:45:49:setup_element:INFO: Beginning SMX ASICs map scan
12:45:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:45:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:45:49:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
12:45:49:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
12:45:49:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
12:45:49:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
12:45:49:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
12:45:50:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
12:45:50:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
12:45:50:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
12:45:50:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
12:45:50:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
12:45:50:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
12:45:52:setup_element:INFO: Performing Elink synchronization
12:45:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:45:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:45:52:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
12:45:52:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
12:45:52:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
12:45:52:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
12:45:52:febtest:INFO: Init all SMX (CSA): 30
12:46:00:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:46:00:febtest:INFO: 08-01 | XA-000-08-003-000-005-118-03 | 28.2 | 1183.3
12:46:00:febtest:INFO: 10-03 | XA-000-08-003-000-005-119-03 | 37.7 | 1153.7
12:46:00:febtest:INFO: 12-05 | XA-000-08-003-000-005-121-03 | 34.6 | 1159.7
12:46:01:febtest:INFO: 14-07 | XA-000-08-003-000-005-122-03 | 25.1 | 1201.0
12:46:02:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
12:46:04:ST3_smx:INFO: chip: 8-1 28.225000 C 1195.082160 mV
12:46:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:46:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:46:04:ST3_smx:INFO: Electrons
12:46:04:ST3_smx:INFO: # loops 0
12:46:05:ST3_smx:INFO: # loops 1
12:46:07:ST3_smx:INFO: # loops 2
12:46:08:ST3_smx:INFO: Total # of broken channels: 0
12:46:08:ST3_smx:INFO: List of broken channels: []
12:46:08:ST3_smx:INFO: Total # of broken channels: 0
12:46:08:ST3_smx:INFO: List of broken channels: []
12:46:10:ST3_smx:INFO: chip: 10-3 37.726682 C 1165.571835 mV
12:46:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:46:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:46:10:ST3_smx:INFO: Electrons
12:46:10:ST3_smx:INFO: # loops 0
12:46:12:ST3_smx:INFO: # loops 1
12:46:14:ST3_smx:INFO: # loops 2
12:46:15:ST3_smx:INFO: Total # of broken channels: 0
12:46:15:ST3_smx:INFO: List of broken channels: []
12:46:15:ST3_smx:INFO: Total # of broken channels: 0
12:46:15:ST3_smx:INFO: List of broken channels: []
12:46:17:ST3_smx:INFO: chip: 12-5 37.726682 C 1171.483840 mV
12:46:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:46:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:46:17:ST3_smx:INFO: Electrons
12:46:17:ST3_smx:INFO: # loops 0
12:46:19:ST3_smx:INFO: # loops 1
12:46:21:ST3_smx:INFO: # loops 2
12:46:22:ST3_smx:INFO: Total # of broken channels: 0
12:46:22:ST3_smx:INFO: List of broken channels: []
12:46:22:ST3_smx:INFO: Total # of broken channels: 0
12:46:22:ST3_smx:INFO: List of broken channels: []
12:46:24:ST3_smx:INFO: chip: 14-7 25.062742 C 1206.851500 mV
12:46:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:46:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:46:24:ST3_smx:INFO: Electrons
12:46:24:ST3_smx:INFO: # loops 0
12:46:25:ST3_smx:INFO: # loops 1
12:46:27:ST3_smx:INFO: # loops 2
12:46:29:ST3_smx:INFO: Total # of broken channels: 0
12:46:29:ST3_smx:INFO: List of broken channels: []
12:46:29:ST3_smx:INFO: Total # of broken channels: 0
12:46:29:ST3_smx:INFO: List of broken channels: []
12:46:30:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:46:30:febtest:INFO: 08-01 | XA-000-08-003-000-005-118-03 | 28.2 | 1218.6
12:46:30:febtest:INFO: 10-03 | XA-000-08-003-000-005-119-03 | 37.7 | 1183.3
12:46:30:febtest:INFO: 12-05 | XA-000-08-003-000-005-121-03 | 37.7 | 1195.1
12:46:31:febtest:INFO: 14-07 | XA-000-08-003-000-005-122-03 | 28.2 | 1224.5
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_07_22-12_45_41
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3055| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.0160', '1.850', '1.1990', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.0130', '1.850', '1.0770', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '0.9875', '1.850', '0.2665', '0.000', '0.0000', '0.000', '0.0000']