07:47:53:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:47:53:ST3_Shared:INFO:	                       FEB-Microcable                       
07:47:53:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:47:53:febtest:INFO:	Testing FEB with SN 3055
07:47:55:smx_tester:INFO:	Scanning setup
07:47:55:elinks:INFO:	Disabling clock on downlink 0
07:47:55:elinks:INFO:	Disabling clock on downlink 1
07:47:55:elinks:INFO:	Disabling clock on downlink 2
07:47:55:elinks:INFO:	Disabling clock on downlink 3
07:47:55:elinks:INFO:	Disabling clock on downlink 4
07:47:55:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:47:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
07:47:55:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:47:55:elinks:INFO:	Disabling clock on downlink 0
07:47:55:elinks:INFO:	Disabling clock on downlink 1
07:47:55:elinks:INFO:	Disabling clock on downlink 2
07:47:55:elinks:INFO:	Disabling clock on downlink 3
07:47:55:elinks:INFO:	Disabling clock on downlink 4
07:47:55:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:47:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:47:55:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
07:47:55:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
07:47:55:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
07:47:55:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
07:47:55:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
07:47:55:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
07:47:55:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
07:47:55:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
07:47:55:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
07:47:55:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
07:47:55:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
07:47:55:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
07:47:55:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
07:47:55:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
07:47:55:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:47:55:elinks:INFO:	Disabling clock on downlink 0
07:47:55:elinks:INFO:	Disabling clock on downlink 1
07:47:55:elinks:INFO:	Disabling clock on downlink 2
07:47:55:elinks:INFO:	Disabling clock on downlink 3
07:47:55:elinks:INFO:	Disabling clock on downlink 4
07:47:55:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:47:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
07:47:55:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:47:55:elinks:INFO:	Disabling clock on downlink 0
07:47:55:elinks:INFO:	Disabling clock on downlink 1
07:47:55:elinks:INFO:	Disabling clock on downlink 2
07:47:55:elinks:INFO:	Disabling clock on downlink 3
07:47:55:elinks:INFO:	Disabling clock on downlink 4
07:47:55:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:47:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
07:47:55:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:47:55:elinks:INFO:	Disabling clock on downlink 0
07:47:55:elinks:INFO:	Disabling clock on downlink 1
07:47:55:elinks:INFO:	Disabling clock on downlink 2
07:47:55:elinks:INFO:	Disabling clock on downlink 3
07:47:55:elinks:INFO:	Disabling clock on downlink 4
07:47:55:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:47:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
07:47:55:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:47:55:setup_element:INFO:	Scanning clock phase
07:47:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:47:56:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:47:56:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
07:47:56:setup_element:INFO:	Eye window for uplink 0 : _________________________________________________________________________XXXXX__
Clock Delay: 35
07:47:56:setup_element:INFO:	Eye window for uplink 1 : _________________________________________________________________________XXXXX__
Clock Delay: 35
07:47:56:setup_element:INFO:	Eye window for uplink 2 : _____________________________________________________________________XXXXXX_____
Clock Delay: 31
07:47:56:setup_element:INFO:	Eye window for uplink 3 : _____________________________________________________________________XXXXXX_____
Clock Delay: 31
07:47:56:setup_element:INFO:	Eye window for uplink 6 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
07:47:56:setup_element:INFO:	Eye window for uplink 7 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
07:47:56:setup_element:INFO:	Eye window for uplink 8 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
07:47:56:setup_element:INFO:	Eye window for uplink 9 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
07:47:56:setup_element:INFO:	Eye window for uplink 10: _______________________________________________________________________XXXXXX___
Clock Delay: 33
07:47:56:setup_element:INFO:	Eye window for uplink 11: _______________________________________________________________________XXXXXX___
Clock Delay: 33
07:47:56:setup_element:INFO:	Eye window for uplink 12: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
07:47:56:setup_element:INFO:	Eye window for uplink 13: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
07:47:56:setup_element:INFO:	Eye window for uplink 14: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
07:47:56:setup_element:INFO:	Eye window for uplink 15: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
07:47:56:setup_element:INFO:	Setting the clock phase to 32 for group 0, downlink 1
07:47:56:setup_element:INFO:	Scanning data phases
07:47:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:47:56:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:48:01:setup_element:INFO:	Data phase scan results for group 0, downlink 1
07:48:01:setup_element:INFO:	Eye window for uplink 0 : ________XXXXXX__________________________
Data delay found: 30
07:48:01:setup_element:INFO:	Eye window for uplink 1 : ___XXXXXXX______________________________
Data delay found: 26
07:48:01:setup_element:INFO:	Eye window for uplink 2 : _XXXXXX_________________________________
Data delay found: 23
07:48:01:setup_element:INFO:	Eye window for uplink 3 : XXX__________________________________XXX
Data delay found: 19
07:48:01:setup_element:INFO:	Eye window for uplink 6 : _______________________________XXXXXXX__
Data delay found: 14
07:48:01:setup_element:INFO:	Eye window for uplink 7 : ___________________________XXXXXXX______
Data delay found: 10
07:48:01:setup_element:INFO:	Eye window for uplink 8 : __________________XXXXXXX_______________
Data delay found: 1
07:48:01:setup_element:INFO:	Eye window for uplink 9 : _______________________XXXXXX___________
Data delay found: 5
07:48:01:setup_element:INFO:	Eye window for uplink 10: _______________________XXXXXX___________
Data delay found: 5
07:48:01:setup_element:INFO:	Eye window for uplink 11: __________________________XXXXXXX_______
Data delay found: 9
07:48:01:setup_element:INFO:	Eye window for uplink 12: _____________________XXXXXX_____________
Data delay found: 3
07:48:01:setup_element:INFO:	Eye window for uplink 13: ________________________XXXXXX__________
Data delay found: 6
07:48:01:setup_element:INFO:	Eye window for uplink 14: ____________________XXXXXXX_____________
Data delay found: 3
07:48:01:setup_element:INFO:	Eye window for uplink 15: _______________________XXXXXXX__________
Data delay found: 6
07:48:01:setup_element:INFO:	Setting the data phase to 30 for uplink 0
07:48:01:setup_element:INFO:	Setting the data phase to 26 for uplink 1
07:48:01:setup_element:INFO:	Setting the data phase to 23 for uplink 2
07:48:01:setup_element:INFO:	Setting the data phase to 19 for uplink 3
07:48:01:setup_element:INFO:	Setting the data phase to 14 for uplink 6
07:48:01:setup_element:INFO:	Setting the data phase to 10 for uplink 7
07:48:01:setup_element:INFO:	Setting the data phase to 1 for uplink 8
07:48:01:setup_element:INFO:	Setting the data phase to 5 for uplink 9
07:48:01:setup_element:INFO:	Setting the data phase to 5 for uplink 10
07:48:01:setup_element:INFO:	Setting the data phase to 9 for uplink 11
07:48:01:setup_element:INFO:	Setting the data phase to 3 for uplink 12
07:48:01:setup_element:INFO:	Setting the data phase to 6 for uplink 13
07:48:01:setup_element:INFO:	Setting the data phase to 3 for uplink 14
07:48:01:setup_element:INFO:	Setting the data phase to 6 for uplink 15
07:48:01:setup_element:INFO:	Beginning SMX ASICs map scan
07:48:01:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:48:01:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:48:01:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
07:48:01:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
07:48:01:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
07:48:01:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
07:48:01:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
07:48:01:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
07:48:01:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
07:48:01:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
07:48:01:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
07:48:02:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
07:48:02:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
07:48:02:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
07:48:02:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
07:48:02:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
07:48:02:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
07:48:02:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
07:48:02:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
07:48:04:setup_element:INFO:	Performing Elink synchronization
07:48:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:48:04:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:48:04:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
07:48:04:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
07:48:04:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
07:48:04:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
07:48:04:febtest:INFO:	Init all SMX (CSA): 30
07:48:16:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:48:17:febtest:INFO:	01-00 | XA-000-08-003-000-005-114-03 |  31.4 | 1177.4
07:48:17:febtest:INFO:	08-01 | XA-000-08-003-000-005-118-03 |  28.2 | 1183.3
07:48:17:febtest:INFO:	03-02 | XA-000-08-003-000-005-115-03 |  28.2 | 1201.0
07:48:17:febtest:INFO:	10-03 | XA-000-08-003-000-005-119-03 |  37.7 | 1153.7
07:48:18:febtest:INFO:	12-05 | XA-000-08-003-000-005-121-03 |  37.7 | 1159.7
07:48:18:febtest:INFO:	07-06 | XA-000-08-003-000-005-117-03 |   9.3 | 1247.9
07:48:18:febtest:INFO:	14-07 | XA-000-08-003-000-005-122-03 |  25.1 | 1195.1
07:48:19:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
07:48:20:febtest:ERROR:	HW addres 5 != 4
07:48:39:ST3_smx:INFO:	chip: 1-0 	 31.389742 C 	 1189.190035 mV
07:48:39:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:48:39:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:48:39:ST3_smx:INFO:		Electrons
07:48:39:ST3_smx:INFO:	# loops 0
07:48:41:ST3_smx:INFO:	# loops 1
07:48:43:ST3_smx:INFO:	# loops 2
07:48:45:ST3_smx:INFO:	Total # of broken channels: 0
07:48:45:ST3_smx:INFO:	List of broken channels: []
07:48:45:ST3_smx:INFO:	Total # of broken channels: 0
07:48:45:ST3_smx:INFO:	List of broken channels: []
07:48:47:ST3_smx:INFO:	chip: 8-1 	 31.389742 C 	 1195.082160 mV
07:48:47:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:48:47:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:48:47:ST3_smx:INFO:		Electrons
07:48:47:ST3_smx:INFO:	# loops 0
07:48:49:ST3_smx:INFO:	# loops 1
07:48:51:ST3_smx:INFO:	# loops 2
07:48:53:ST3_smx:INFO:	Total # of broken channels: 0
07:48:53:ST3_smx:INFO:	List of broken channels: []
07:48:53:ST3_smx:INFO:	Total # of broken channels: 0
07:48:53:ST3_smx:INFO:	List of broken channels: []
07:48:54:ST3_smx:INFO:	chip: 3-2 	 31.389742 C 	 1212.728715 mV
07:48:54:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:48:54:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:48:54:ST3_smx:INFO:		Electrons
07:48:54:ST3_smx:INFO:	# loops 0
07:48:56:ST3_smx:INFO:	# loops 1
07:48:58:ST3_smx:INFO:	# loops 2
07:49:00:ST3_smx:INFO:	Total # of broken channels: 0
07:49:00:ST3_smx:INFO:	List of broken channels: []
07:49:00:ST3_smx:INFO:	Total # of broken channels: 0
07:49:00:ST3_smx:INFO:	List of broken channels: []
07:49:02:ST3_smx:INFO:	chip: 10-3 	 40.898880 C 	 1159.654860 mV
07:49:02:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:49:02:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:49:02:ST3_smx:INFO:		Electrons
07:49:02:ST3_smx:INFO:	# loops 0
07:49:04:ST3_smx:INFO:	# loops 1
07:49:06:ST3_smx:INFO:	# loops 2
07:49:08:ST3_smx:INFO:	Total # of broken channels: 0
07:49:08:ST3_smx:INFO:	List of broken channels: []
07:49:08:ST3_smx:INFO:	Total # of broken channels: 0
07:49:08:ST3_smx:INFO:	List of broken channels: []
07:49:09:ST3_smx:INFO:	chip: 12-5 	 37.726682 C 	 1171.483840 mV
07:49:09:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:49:09:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:49:09:ST3_smx:INFO:		Electrons
07:49:09:ST3_smx:INFO:	# loops 0
07:49:12:ST3_smx:INFO:	# loops 1
07:49:14:ST3_smx:INFO:	# loops 2
07:49:16:ST3_smx:INFO:	Total # of broken channels: 0
07:49:16:ST3_smx:INFO:	List of broken channels: []
07:49:16:ST3_smx:INFO:	Total # of broken channels: 0
07:49:16:ST3_smx:INFO:	List of broken channels: []
07:49:17:ST3_smx:INFO:	chip: 7-6 	 12.438562 C 	 1253.730060 mV
07:49:17:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:49:17:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:49:17:ST3_smx:INFO:		Electrons
07:49:17:ST3_smx:INFO:	# loops 0
07:49:19:ST3_smx:INFO:	# loops 1
07:49:21:ST3_smx:INFO:	# loops 2
07:49:23:ST3_smx:INFO:	Total # of broken channels: 0
07:49:23:ST3_smx:INFO:	List of broken channels: []
07:49:23:ST3_smx:INFO:	Total # of broken channels: 0
07:49:23:ST3_smx:INFO:	List of broken channels: []
07:49:25:ST3_smx:INFO:	chip: 14-7 	 28.225000 C 	 1206.851500 mV
07:49:25:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:49:25:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:49:25:ST3_smx:INFO:		Electrons
07:49:25:ST3_smx:INFO:	# loops 0
07:49:27:ST3_smx:INFO:	# loops 1
07:49:29:ST3_smx:INFO:	# loops 2
07:49:31:ST3_smx:INFO:	Total # of broken channels: 0
07:49:31:ST3_smx:INFO:	List of broken channels: []
07:49:31:ST3_smx:INFO:	Total # of broken channels: 0
07:49:31:ST3_smx:INFO:	List of broken channels: []
07:49:31:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:49:31:febtest:INFO:	01-00 | XA-000-08-003-000-005-114-03 |  34.6 | 1212.7
07:49:31:febtest:INFO:	08-01 | XA-000-08-003-000-005-118-03 |  31.4 | 1218.6
07:49:31:febtest:INFO:	03-02 | XA-000-08-003-000-005-115-03 |  31.4 | 1236.2
07:49:32:febtest:INFO:	10-03 | XA-000-08-003-000-005-119-03 |  40.9 | 1183.3
07:49:32:febtest:INFO:	12-05 | XA-000-08-003-000-005-121-03 |  40.9 | 1195.1
07:49:32:febtest:INFO:	07-06 | XA-000-08-003-000-005-117-03 |  15.6 | 1271.2
07:49:32:febtest:INFO:	14-07 | XA-000-08-003-000-005-122-03 |  31.4 | 1224.5
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_07_23-07_47_53
OPERATOR  : Benjamin; 
SITE : KIT | SETUP : KIT_TEST_SETUP_1
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| FEB_SN : 3055| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
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VI_before_Init : ['2.450', '1.6080', '1.853', '2.2030', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9560', '1.850', '2.2250', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9180', '1.850', '0.6977', '0.000', '0.0000', '0.000', '0.0000']