
FEB_3055 23.07.24 09:23:04
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09:23:04:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:23:04:ST3_Shared:INFO: FEB-Microcable 09:23:04:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:23:04:febtest:INFO: Testing FEB with SN 3055 09:23:06:smx_tester:INFO: Scanning setup 09:23:06:elinks:INFO: Disabling clock on downlink 0 09:23:06:elinks:INFO: Disabling clock on downlink 1 09:23:06:elinks:INFO: Disabling clock on downlink 2 09:23:06:elinks:INFO: Disabling clock on downlink 3 09:23:06:elinks:INFO: Disabling clock on downlink 4 09:23:06:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:23:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:23:06:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:23:06:elinks:INFO: Disabling clock on downlink 0 09:23:06:elinks:INFO: Disabling clock on downlink 1 09:23:06:elinks:INFO: Disabling clock on downlink 2 09:23:06:elinks:INFO: Disabling clock on downlink 3 09:23:06:elinks:INFO: Disabling clock on downlink 4 09:23:06:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:23:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:23:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0 09:23:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1 09:23:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6 09:23:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7 09:23:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 09:23:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 09:23:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 09:23:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 09:23:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 09:23:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 09:23:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 09:23:06:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 09:23:06:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:23:06:elinks:INFO: Disabling clock on downlink 0 09:23:06:elinks:INFO: Disabling clock on downlink 1 09:23:06:elinks:INFO: Disabling clock on downlink 2 09:23:06:elinks:INFO: Disabling clock on downlink 3 09:23:06:elinks:INFO: Disabling clock on downlink 4 09:23:06:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:23:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:23:06:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:23:06:elinks:INFO: Disabling clock on downlink 0 09:23:06:elinks:INFO: Disabling clock on downlink 1 09:23:06:elinks:INFO: Disabling clock on downlink 2 09:23:06:elinks:INFO: Disabling clock on downlink 3 09:23:06:elinks:INFO: Disabling clock on downlink 4 09:23:06:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:23:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 09:23:06:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:23:06:elinks:INFO: Disabling clock on downlink 0 09:23:06:elinks:INFO: Disabling clock on downlink 1 09:23:06:elinks:INFO: Disabling clock on downlink 2 09:23:06:elinks:INFO: Disabling clock on downlink 3 09:23:06:elinks:INFO: Disabling clock on downlink 4 09:23:06:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:23:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 09:23:06:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:23:06:setup_element:INFO: Scanning clock phase 09:23:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:23:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:23:07:setup_element:INFO: Clock phase scan results for group 0, downlink 1 09:23:07:setup_element:INFO: Eye window for uplink 0 : _________________________________________________________________________XXXXX__ Clock Delay: 35 09:23:07:setup_element:INFO: Eye window for uplink 1 : _________________________________________________________________________XXXXX__ Clock Delay: 35 09:23:07:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________________XXXXXX____ Clock Delay: 32 09:23:07:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________________XXXXXX____ Clock Delay: 32 09:23:07:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXX____ Clock Delay: 32 09:23:07:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXX____ Clock Delay: 32 09:23:07:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________________XXXXXX___ Clock Delay: 33 09:23:07:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________________XXXXXX___ Clock Delay: 33 09:23:07:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXX______ Clock Delay: 31 09:23:07:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXX______ Clock Delay: 31 09:23:07:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXX_____ Clock Delay: 32 09:23:07:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXX_____ Clock Delay: 32 09:23:07:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1 09:23:07:setup_element:INFO: Scanning data phases 09:23:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:23:07:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:23:12:setup_element:INFO: Data phase scan results for group 0, downlink 1 09:23:12:setup_element:INFO: Eye window for uplink 0 : _______XXXXXXXX_________________________ Data delay found: 30 09:23:12:setup_element:INFO: Eye window for uplink 1 : ___XXXXXX_______________________________ Data delay found: 25 09:23:12:setup_element:INFO: Eye window for uplink 6 : _____________________________XXXXXXXX___ Data delay found: 12 09:23:12:setup_element:INFO: Eye window for uplink 7 : __________________________XXXXXXX_______ Data delay found: 9 09:23:12:setup_element:INFO: Eye window for uplink 8 : _________________XXXXXXX________________ Data delay found: 0 09:23:12:setup_element:INFO: Eye window for uplink 9 : _______________________XXXXXX___________ Data delay found: 5 09:23:12:setup_element:INFO: Eye window for uplink 10: ______________________XXXXXX____________ Data delay found: 4 09:23:12:setup_element:INFO: Eye window for uplink 11: _________________________XXXXXXX________ Data delay found: 8 09:23:12:setup_element:INFO: Eye window for uplink 12: ____________________XXXXXX______________ Data delay found: 2 09:23:12:setup_element:INFO: Eye window for uplink 13: _______________________XXXXXX___________ Data delay found: 5 09:23:12:setup_element:INFO: Eye window for uplink 14: ____________________XXXXXXX_____________ Data delay found: 3 09:23:12:setup_element:INFO: Eye window for uplink 15: ______________________XXXXXXXX__________ Data delay found: 5 09:23:12:setup_element:INFO: Setting the data phase to 30 for uplink 0 09:23:12:setup_element:INFO: Setting the data phase to 25 for uplink 1 09:23:12:setup_element:INFO: Setting the data phase to 12 for uplink 6 09:23:12:setup_element:INFO: Setting the data phase to 9 for uplink 7 09:23:12:setup_element:INFO: Setting the data phase to 0 for uplink 8 09:23:12:setup_element:INFO: Setting the data phase to 5 for uplink 9 09:23:12:setup_element:INFO: Setting the data phase to 4 for uplink 10 09:23:12:setup_element:INFO: Setting the data phase to 8 for uplink 11 09:23:12:setup_element:INFO: Setting the data phase to 2 for uplink 12 09:23:12:setup_element:INFO: Setting the data phase to 5 for uplink 13 09:23:12:setup_element:INFO: Setting the data phase to 3 for uplink 14 09:23:12:setup_element:INFO: Setting the data phase to 5 for uplink 15 09:23:12:setup_element:INFO: Beginning SMX ASICs map scan 09:23:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:23:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:23:12:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 09:23:12:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 09:23:12:uplink:INFO: Setting uplinks mask [0, 1, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 09:23:12:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1 09:23:12:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0 09:23:12:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 09:23:12:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 09:23:12:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 09:23:12:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 09:23:13:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 09:23:13:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 09:23:13:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7 09:23:13:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6 09:23:13:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 09:23:13:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 09:23:14:setup_element:INFO: Performing Elink synchronization 09:23:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:23:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:23:14:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 09:23:15:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 09:23:15:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 09:23:15:uplink:INFO: Enabling uplinks [0, 1, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)] 1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)] 3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)] 5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)] 6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)] 7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)] |_________________________________________________________________________| 09:23:15:febtest:INFO: Init all SMX (CSA): 30 09:23:27:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:23:27:febtest:INFO: 01-00 | XA-000-08-003-000-005-114-03 | 28.2 | 1189.2 09:23:27:febtest:INFO: 08-01 | XA-000-08-003-000-005-118-03 | 28.2 | 1183.3 09:23:27:febtest:INFO: 10-03 | XA-000-08-003-000-005-119-03 | 37.7 | 1153.7 09:23:28:febtest:INFO: 12-05 | XA-000-08-003-000-005-121-03 | 34.6 | 1159.7 09:23:28:febtest:INFO: 07-06 | XA-000-08-003-000-005-117-03 | 12.4 | 1253.7 09:23:28:febtest:INFO: 14-07 | XA-000-08-003-000-005-122-03 | 25.1 | 1195.1 09:23:29:febtest:INFO: Set all CSA to ZERO FEB type: A FEB_A: 1 FEB_B: 0 09:23:30:febtest:ERROR: HW addres 3 != 2 09:23:45:ST3_smx:INFO: chip: 1-0 31.389742 C 1189.190035 mV 09:23:45:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:23:45:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:23:45:ST3_smx:INFO: Electrons 09:23:45:ST3_smx:INFO: # loops 0 09:23:47:ST3_smx:INFO: # loops 1 09:23:49:ST3_smx:INFO: # loops 2 09:23:51:ST3_smx:INFO: Total # of broken channels: 0 09:23:51:ST3_smx:INFO: List of broken channels: [] 09:23:51:ST3_smx:INFO: Total # of broken channels: 11 09:23:51:ST3_smx:INFO: List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 25] 09:23:53:ST3_smx:INFO: chip: 8-1 28.225000 C 1195.082160 mV 09:23:53:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:23:53:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:23:53:ST3_smx:INFO: Electrons 09:23:53:ST3_smx:INFO: # loops 0 09:23:54:ST3_smx:INFO: # loops 1 09:23:56:ST3_smx:INFO: # loops 2 09:23:58:ST3_smx:INFO: Total # of broken channels: 0 09:23:58:ST3_smx:INFO: List of broken channels: [] 09:23:58:ST3_smx:INFO: Total # of broken channels: 0 09:23:58:ST3_smx:INFO: List of broken channels: [] 09:23:59:ST3_smx:INFO: chip: 10-3 40.898880 C 1165.571835 mV 09:23:59:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:24:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:24:00:ST3_smx:INFO: Electrons 09:24:00:ST3_smx:INFO: # loops 0 09:24:01:ST3_smx:INFO: # loops 1 09:24:03:ST3_smx:INFO: # loops 2 09:24:04:ST3_smx:INFO: Total # of broken channels: 1 09:24:04:ST3_smx:INFO: List of broken channels: [7] 09:24:04:ST3_smx:INFO: Total # of broken channels: 62 09:24:04:ST3_smx:INFO: List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123] 09:24:06:ST3_smx:INFO: chip: 12-5 37.726682 C 1171.483840 mV 09:24:06:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:24:06:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:24:06:ST3_smx:INFO: Electrons 09:24:06:ST3_smx:INFO: # loops 0 09:24:08:ST3_smx:INFO: # loops 1 09:24:09:ST3_smx:INFO: # loops 2 09:24:11:ST3_smx:INFO: Total # of broken channels: 0 09:24:11:ST3_smx:INFO: List of broken channels: [] 09:24:11:ST3_smx:INFO: Total # of broken channels: 47 09:24:11:ST3_smx:INFO: List of broken channels: [35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 125, 127] 09:24:12:ST3_smx:INFO: chip: 7-6 12.438562 C 1253.730060 mV 09:24:12:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:24:12:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:24:12:ST3_smx:INFO: Electrons 09:24:12:ST3_smx:INFO: # loops 0 09:24:14:ST3_smx:INFO: # loops 1 09:24:16:ST3_smx:INFO: # loops 2 09:24:17:ST3_smx:INFO: Total # of broken channels: 0 09:24:17:ST3_smx:INFO: List of broken channels: [] 09:24:17:ST3_smx:INFO: Total # of broken channels: 57 09:24:17:ST3_smx:INFO: List of broken channels: [6, 13, 19, 27, 29, 35, 37, 40, 41, 42, 44, 45, 46, 48, 50, 52, 54, 55, 56, 58, 59, 60, 62, 63, 64, 66, 68, 70, 71, 72, 74, 76, 78, 79, 80, 81, 82, 84, 86, 88, 90, 92, 94, 96, 98, 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122] 09:24:19:ST3_smx:INFO: chip: 14-7 28.225000 C 1206.851500 mV 09:24:19:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:24:19:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:24:19:ST3_smx:INFO: Electrons 09:24:19:ST3_smx:INFO: # loops 0 09:24:21:ST3_smx:INFO: # loops 1 09:24:22:ST3_smx:INFO: # loops 2 09:24:24:ST3_smx:INFO: Total # of broken channels: 0 09:24:24:ST3_smx:INFO: List of broken channels: [] 09:24:24:ST3_smx:INFO: Total # of broken channels: 0 09:24:24:ST3_smx:INFO: List of broken channels: [] 09:24:24:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:24:25:febtest:INFO: 01-00 | XA-000-08-003-000-005-114-03 | 34.6 | 1212.7 09:24:25:febtest:INFO: 08-01 | XA-000-08-003-000-005-118-03 | 31.4 | 1212.7 09:24:25:febtest:INFO: 10-03 | XA-000-08-003-000-005-119-03 | 40.9 | 1189.2 09:24:25:febtest:INFO: 12-05 | XA-000-08-003-000-005-121-03 | 40.9 | 1189.2 09:24:25:febtest:INFO: 07-06 | XA-000-08-003-000-005-117-03 | 15.6 | 1271.2 09:24:26:febtest:INFO: 14-07 | XA-000-08-003-000-005-122-03 | 28.2 | 1224.5 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_07_23-09_23_04 OPERATOR : Alois Alzheimer SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 3055| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['2.450', '1.6780', '1.850', '1.9860', '0.000', '0.0000', '0.000', '0.0000'] VI_after__Init : ['2.450', '1.7130', '1.849', '2.0180', '0.000', '0.0000', '0.000', '0.0000'] VI_at__the_End : ['2.450', '1.6780', '1.850', '0.6333', '0.000', '0.0000', '0.000', '0.0000']