14:17:26:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:17:26:ST3_Shared:INFO:	                         FEB-Sensor                         
14:17:26:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:17:31:ST3_ModuleSelector:INFO:	L7UL701041 M7UL7B0010410A2 124 D

14:17:31:ST3_ModuleSelector:INFO:	19314

14:17:31:febtest:INFO:	Testing FEB with SN 3056
14:17:33:smx_tester:INFO:	Scanning setup
14:17:33:elinks:INFO:	Disabling clock on downlink 0
14:17:33:elinks:INFO:	Disabling clock on downlink 1
14:17:33:elinks:INFO:	Disabling clock on downlink 2
14:17:33:elinks:INFO:	Disabling clock on downlink 3
14:17:33:elinks:INFO:	Disabling clock on downlink 4
14:17:33:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:17:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
14:17:33:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:17:33:elinks:INFO:	Disabling clock on downlink 0
14:17:33:elinks:INFO:	Disabling clock on downlink 1
14:17:33:elinks:INFO:	Disabling clock on downlink 2
14:17:33:elinks:INFO:	Disabling clock on downlink 3
14:17:33:elinks:INFO:	Disabling clock on downlink 4
14:17:33:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:17:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:17:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
14:17:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
14:17:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
14:17:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
14:17:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
14:17:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
14:17:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
14:17:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
14:17:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
14:17:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
14:17:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
14:17:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
14:17:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
14:17:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
14:17:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
14:17:33:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
14:17:33:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:17:33:elinks:INFO:	Disabling clock on downlink 0
14:17:33:elinks:INFO:	Disabling clock on downlink 1
14:17:33:elinks:INFO:	Disabling clock on downlink 2
14:17:33:elinks:INFO:	Disabling clock on downlink 3
14:17:33:elinks:INFO:	Disabling clock on downlink 4
14:17:33:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:17:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:17:34:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:17:34:elinks:INFO:	Disabling clock on downlink 0
14:17:34:elinks:INFO:	Disabling clock on downlink 1
14:17:34:elinks:INFO:	Disabling clock on downlink 2
14:17:34:elinks:INFO:	Disabling clock on downlink 3
14:17:34:elinks:INFO:	Disabling clock on downlink 4
14:17:34:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:17:34:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
14:17:34:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:17:34:elinks:INFO:	Disabling clock on downlink 0
14:17:34:elinks:INFO:	Disabling clock on downlink 1
14:17:34:elinks:INFO:	Disabling clock on downlink 2
14:17:34:elinks:INFO:	Disabling clock on downlink 3
14:17:34:elinks:INFO:	Disabling clock on downlink 4
14:17:34:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:17:34:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
14:17:34:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:17:34:setup_element:INFO:	Scanning clock phase
14:17:34:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:17:34:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:17:34:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
14:17:34:setup_element:INFO:	Eye window for uplink 0 : ________________________________________________________________________________
Clock Delay: 40
14:17:34:setup_element:INFO:	Eye window for uplink 1 : ________________________________________________________________________________
Clock Delay: 40
14:17:34:setup_element:INFO:	Eye window for uplink 2 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:17:34:setup_element:INFO:	Eye window for uplink 3 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:17:34:setup_element:INFO:	Eye window for uplink 4 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:17:34:setup_element:INFO:	Eye window for uplink 5 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:17:34:setup_element:INFO:	Eye window for uplink 6 : ______________________________________________________________________XXXX______
Clock Delay: 31
14:17:34:setup_element:INFO:	Eye window for uplink 7 : ______________________________________________________________________XXXX______
Clock Delay: 31
14:17:34:setup_element:INFO:	Eye window for uplink 8 : _____________________________________________________________________XXXXXX_____
Clock Delay: 31
14:17:34:setup_element:INFO:	Eye window for uplink 9 : _____________________________________________________________________XXXXXX_____
Clock Delay: 31
14:17:34:setup_element:INFO:	Eye window for uplink 10: ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:17:34:setup_element:INFO:	Eye window for uplink 11: ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:17:34:setup_element:INFO:	Eye window for uplink 12: ______________________________________________________________________XXXXX_____
Clock Delay: 32
14:17:34:setup_element:INFO:	Eye window for uplink 13: ______________________________________________________________________XXXXX_____
Clock Delay: 32
14:17:34:setup_element:INFO:	Eye window for uplink 14: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
14:17:34:setup_element:INFO:	Eye window for uplink 15: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
14:17:34:setup_element:INFO:	Setting the clock phase to 32 for group 0, downlink 1
14:17:34:setup_element:INFO:	Scanning data phases
14:17:34:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:17:34:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:17:39:setup_element:INFO:	Data phase scan results for group 0, downlink 1
14:17:39:setup_element:INFO:	Eye window for uplink 0 : _______XXXXXXX__________XXXXXXXX________
Data delay found: 39
14:17:39:setup_element:INFO:	Eye window for uplink 1 : ___XXXXXX_______________XXXXXXXX________
Data delay found: 16
14:17:39:setup_element:INFO:	Eye window for uplink 2 : _XXXXXXXX_______________________________
Data delay found: 24
14:17:39:setup_element:INFO:	Eye window for uplink 3 : XXXX________________________________XXXX
Data delay found: 19
14:17:39:setup_element:INFO:	Eye window for uplink 4 : XXXXXXX________________________________X
Data delay found: 22
14:17:39:setup_element:INFO:	Eye window for uplink 5 : XXX________________________________XXXXX
Data delay found: 18
14:17:39:setup_element:INFO:	Eye window for uplink 6 : ____________________________XXXXXXXX____
Data delay found: 11
14:17:39:setup_element:INFO:	Eye window for uplink 7 : ________________________XXXXXXX_________
Data delay found: 7
14:17:39:setup_element:INFO:	Eye window for uplink 8 : ________________XXXXXXX_________________
Data delay found: 39
14:17:39:setup_element:INFO:	Eye window for uplink 9 : _____________________XXXXXX_____________
Data delay found: 3
14:17:39:setup_element:INFO:	Eye window for uplink 10: __________________XXXXXXXX______________
Data delay found: 1
14:17:39:setup_element:INFO:	Eye window for uplink 11: ______________________XXXXXXXX__________
Data delay found: 5
14:17:39:setup_element:INFO:	Eye window for uplink 12: __________________XXXXXX________________
Data delay found: 0
14:17:39:setup_element:INFO:	Eye window for uplink 13: ______________________XXXXXX____________
Data delay found: 4
14:17:39:setup_element:INFO:	Eye window for uplink 14: ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 2
14:17:39:setup_element:INFO:	Eye window for uplink 15: ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 2
14:17:39:setup_element:INFO:	Setting the data phase to 39 for uplink 0
14:17:39:setup_element:INFO:	Setting the data phase to 16 for uplink 1
14:17:39:setup_element:INFO:	Setting the data phase to 24 for uplink 2
14:17:39:setup_element:INFO:	Setting the data phase to 19 for uplink 3
14:17:39:setup_element:INFO:	Setting the data phase to 22 for uplink 4
14:17:39:setup_element:INFO:	Setting the data phase to 18 for uplink 5
14:17:39:setup_element:INFO:	Setting the data phase to 11 for uplink 6
14:17:39:setup_element:INFO:	Setting the data phase to 7 for uplink 7
14:17:39:setup_element:INFO:	Setting the data phase to 39 for uplink 8
14:17:39:setup_element:INFO:	Setting the data phase to 3 for uplink 9
14:17:39:setup_element:INFO:	Setting the data phase to 1 for uplink 10
14:17:39:setup_element:INFO:	Setting the data phase to 5 for uplink 11
14:17:39:setup_element:INFO:	Setting the data phase to 0 for uplink 12
14:17:39:setup_element:INFO:	Setting the data phase to 4 for uplink 13
14:17:39:setup_element:INFO:	Setting the data phase to 2 for uplink 14
14:17:39:setup_element:INFO:	Setting the data phase to 2 for uplink 15
14:17:39:setup_element:INFO:	Beginning SMX ASICs map scan
14:17:39:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:17:39:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:17:39:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
14:17:39:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
14:17:39:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:17:39:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
14:17:39:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
14:17:40:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:17:40:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:17:40:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
14:17:40:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
14:17:40:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:17:40:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:17:40:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
14:17:40:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
14:17:40:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:17:40:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:17:40:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
14:17:40:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
14:17:41:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:17:41:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:17:42:setup_element:INFO:	Performing Elink synchronization
14:17:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:17:42:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:17:42:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
14:17:42:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
14:17:42:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
14:17:42:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
14:17:43:febtest:INFO:	Init all SMX (CSA): 30
14:17:56:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:17:56:febtest:INFO:	01-00 | XA-000-08-003-000-005-146-02 |  28.2 | 1189.2
14:17:56:febtest:INFO:	08-01 | XA-000-08-003-000-004-173-06 |  44.1 | 1153.7
14:17:57:febtest:INFO:	03-02 | XA-000-08-003-000-005-147-02 |  34.6 | 1171.5
14:17:57:febtest:INFO:	10-03 | XA-000-08-003-000-004-174-06 |  44.1 | 1159.7
14:17:57:febtest:INFO:	05-04 | XA-000-08-003-000-004-171-06 |  44.1 | 1147.8
14:17:57:febtest:INFO:	12-05 | XA-000-08-003-000-004-175-06 |  53.6 | 1118.1
14:17:57:febtest:INFO:	07-06 | XA-000-08-003-000-004-172-06 |  37.7 | 1165.6
14:17:58:febtest:INFO:	14-07 | XA-000-08-003-000-004-176-01 |  56.8 | 1106.2
14:17:59:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
14:18:01:ST3_smx:INFO:	chip: 1-0 	 28.225000 C 	 1200.969315 mV
14:18:01:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:18:01:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:18:01:ST3_smx:INFO:		Electrons
14:18:01:ST3_smx:INFO:	# loops 0
14:18:02:ST3_smx:INFO:	# loops 1
14:18:04:ST3_smx:INFO:	# loops 2
14:18:06:ST3_smx:INFO:	Total # of broken channels: 0
14:18:06:ST3_smx:INFO:	List of broken channels: []
14:18:06:ST3_smx:INFO:	Total # of broken channels: 0
14:18:06:ST3_smx:INFO:	List of broken channels: []
14:18:07:ST3_smx:INFO:	chip: 8-1 	 47.250730 C 	 1165.571835 mV
14:18:07:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:18:07:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:18:07:ST3_smx:INFO:		Electrons
14:18:07:ST3_smx:INFO:	# loops 0
14:18:09:ST3_smx:INFO:	# loops 1
14:18:10:ST3_smx:INFO:	# loops 2
14:18:12:ST3_smx:INFO:	Total # of broken channels: 0
14:18:12:ST3_smx:INFO:	List of broken channels: []
14:18:12:ST3_smx:INFO:	Total # of broken channels: 0
14:18:12:ST3_smx:INFO:	List of broken channels: []
14:18:13:ST3_smx:INFO:	chip: 3-2 	 34.556970 C 	 1183.292940 mV
14:18:13:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:18:13:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:18:13:ST3_smx:INFO:		Electrons
14:18:13:ST3_smx:INFO:	# loops 0
14:18:15:ST3_smx:INFO:	# loops 1
14:18:17:ST3_smx:INFO:	# loops 2
14:18:18:ST3_smx:INFO:	Total # of broken channels: 0
14:18:18:ST3_smx:INFO:	List of broken channels: []
14:18:18:ST3_smx:INFO:	Total # of broken channels: 0
14:18:18:ST3_smx:INFO:	List of broken channels: []
14:18:20:ST3_smx:INFO:	chip: 10-3 	 44.073563 C 	 1171.483840 mV
14:18:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:18:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:18:20:ST3_smx:INFO:		Electrons
14:18:20:ST3_smx:INFO:	# loops 0
14:18:21:ST3_smx:INFO:	# loops 1
14:18:23:ST3_smx:INFO:	# loops 2
14:18:24:ST3_smx:INFO:	Total # of broken channels: 0
14:18:24:ST3_smx:INFO:	List of broken channels: []
14:18:24:ST3_smx:INFO:	Total # of broken channels: 5
14:18:24:ST3_smx:INFO:	List of broken channels: [8, 10, 12, 14, 16]
14:18:26:ST3_smx:INFO:	chip: 5-4 	 44.073563 C 	 1159.654860 mV
14:18:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:18:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:18:26:ST3_smx:INFO:		Electrons
14:18:26:ST3_smx:INFO:	# loops 0
14:18:28:ST3_smx:INFO:	# loops 1
14:18:29:ST3_smx:INFO:	# loops 2
14:18:31:ST3_smx:INFO:	Total # of broken channels: 0
14:18:31:ST3_smx:INFO:	List of broken channels: []
14:18:31:ST3_smx:INFO:	Total # of broken channels: 0
14:18:31:ST3_smx:INFO:	List of broken channels: []
14:18:32:ST3_smx:INFO:	chip: 12-5 	 53.612520 C 	 1129.995435 mV
14:18:32:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:18:32:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:18:32:ST3_smx:INFO:		Electrons
14:18:32:ST3_smx:INFO:	# loops 0
14:18:34:ST3_smx:INFO:	# loops 1
14:18:36:ST3_smx:INFO:	# loops 2
14:18:38:ST3_smx:INFO:	Total # of broken channels: 0
14:18:38:ST3_smx:INFO:	List of broken channels: []
14:18:38:ST3_smx:INFO:	Total # of broken channels: 1
14:18:38:ST3_smx:INFO:	List of broken channels: [127]
14:18:39:ST3_smx:INFO:	chip: 7-6 	 40.898880 C 	 1177.390875 mV
14:18:39:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:18:39:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:18:39:ST3_smx:INFO:		Electrons
14:18:39:ST3_smx:INFO:	# loops 0
14:18:41:ST3_smx:INFO:	# loops 1
14:18:42:ST3_smx:INFO:	# loops 2
14:18:44:ST3_smx:INFO:	Total # of broken channels: 0
14:18:44:ST3_smx:INFO:	List of broken channels: []
14:18:44:ST3_smx:INFO:	Total # of broken channels: 0
14:18:44:ST3_smx:INFO:	List of broken channels: []
14:18:45:ST3_smx:INFO:	chip: 14-7 	 59.984250 C 	 1112.140140 mV
14:18:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:18:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:18:45:ST3_smx:INFO:		Electrons
14:18:45:ST3_smx:INFO:	# loops 0
14:18:47:ST3_smx:INFO:	# loops 1
14:18:48:ST3_smx:INFO:	# loops 2
14:18:50:ST3_smx:INFO:	Total # of broken channels: 0
14:18:50:ST3_smx:INFO:	List of broken channels: []
14:18:50:ST3_smx:INFO:	Total # of broken channels: 0
14:18:50:ST3_smx:INFO:	List of broken channels: []
14:18:50:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:18:50:febtest:INFO:	01-00 | XA-000-08-003-000-005-146-02 |  34.6 | 1218.6
14:18:51:febtest:INFO:	08-01 | XA-000-08-003-000-004-173-06 |  50.4 | 1183.3
14:18:51:febtest:INFO:	03-02 | XA-000-08-003-000-005-147-02 |  37.7 | 1206.9
14:18:51:febtest:INFO:	10-03 | XA-000-08-003-000-004-174-06 |  47.3 | 1195.1
14:18:51:febtest:INFO:	05-04 | XA-000-08-003-000-004-171-06 |  47.3 | 1177.4
14:18:51:febtest:INFO:	12-05 | XA-000-08-003-000-004-175-06 |  56.8 | 1147.8
14:18:52:febtest:INFO:	07-06 | XA-000-08-003-000-004-172-06 |  40.9 | 1195.1
14:18:52:febtest:INFO:	14-07 | XA-000-08-003-000-004-176-01 |  60.0 | 1135.9
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_07_26-14_17_26
OPERATOR  : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3056| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
SENSOR_ID:	19314

MODULE_NAME:	L7UL701041 M7UL7B0010410A2 124 D

MODULE_TYPE:	
MODULE_LADDER:	
MODULE_MODULE:	
MODULE_SIZE:	0
MODULE_GRADE:	
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5640', '1.850', '2.7540', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0620', '1.850', '2.3740', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9840', '1.850', '0.5302', '0.000', '0.0000', '0.000', '0.0000']