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FEB_3058 31.07.24 07:48:45
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07:48:45:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:48:45:ST3_Shared:INFO: FEB-Microcable
07:48:45:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:48:45:febtest:INFO: Testing FEB with SN 3058
07:48:46:smx_tester:INFO: Scanning setup
07:48:46:elinks:INFO: Disabling clock on downlink 0
07:48:46:elinks:INFO: Disabling clock on downlink 1
07:48:46:elinks:INFO: Disabling clock on downlink 2
07:48:46:elinks:INFO: Disabling clock on downlink 3
07:48:46:elinks:INFO: Disabling clock on downlink 4
07:48:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:48:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:48:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:48:46:elinks:INFO: Disabling clock on downlink 0
07:48:46:elinks:INFO: Disabling clock on downlink 1
07:48:46:elinks:INFO: Disabling clock on downlink 2
07:48:46:elinks:INFO: Disabling clock on downlink 3
07:48:46:elinks:INFO: Disabling clock on downlink 4
07:48:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:48:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:48:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
07:48:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
07:48:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
07:48:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
07:48:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
07:48:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
07:48:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
07:48:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
07:48:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
07:48:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
07:48:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
07:48:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
07:48:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
07:48:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
07:48:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
07:48:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
07:48:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:48:47:elinks:INFO: Disabling clock on downlink 0
07:48:47:elinks:INFO: Disabling clock on downlink 1
07:48:47:elinks:INFO: Disabling clock on downlink 2
07:48:47:elinks:INFO: Disabling clock on downlink 3
07:48:47:elinks:INFO: Disabling clock on downlink 4
07:48:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:48:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:48:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:48:47:elinks:INFO: Disabling clock on downlink 0
07:48:47:elinks:INFO: Disabling clock on downlink 1
07:48:47:elinks:INFO: Disabling clock on downlink 2
07:48:47:elinks:INFO: Disabling clock on downlink 3
07:48:47:elinks:INFO: Disabling clock on downlink 4
07:48:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:48:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
07:48:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:48:47:elinks:INFO: Disabling clock on downlink 0
07:48:47:elinks:INFO: Disabling clock on downlink 1
07:48:47:elinks:INFO: Disabling clock on downlink 2
07:48:47:elinks:INFO: Disabling clock on downlink 3
07:48:47:elinks:INFO: Disabling clock on downlink 4
07:48:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:48:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
07:48:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:48:47:setup_element:INFO: Scanning clock phase
07:48:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:48:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:48:47:setup_element:INFO: Clock phase scan results for group 0, downlink 1
07:48:47:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:48:47:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:48:47:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXX____
Clock Delay: 33
07:48:47:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXX____
Clock Delay: 33
07:48:47:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________XXXXX___
Clock Delay: 34
07:48:47:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________XXXXX___
Clock Delay: 34
07:48:47:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
07:48:47:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
07:48:47:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:48:47:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:48:47:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
07:48:47:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
07:48:47:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXX____
Clock Delay: 32
07:48:47:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXX____
Clock Delay: 32
07:48:47:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:48:47:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:48:47:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
07:48:47:setup_element:INFO: Scanning data phases
07:48:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:48:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:48:52:setup_element:INFO: Data phase scan results for group 0, downlink 1
07:48:52:setup_element:INFO: Eye window for uplink 0 : ______XXXXXXX___________________________
Data delay found: 29
07:48:52:setup_element:INFO: Eye window for uplink 1 : __XXXXXX________________________________
Data delay found: 24
07:48:52:setup_element:INFO: Eye window for uplink 2 : XXXXXXXX________________________________
Data delay found: 23
07:48:52:setup_element:INFO: Eye window for uplink 3 : XXXX________________________________XXXX
Data delay found: 19
07:48:52:setup_element:INFO: Eye window for uplink 4 : _XXXXXXX________________________________
Data delay found: 24
07:48:52:setup_element:INFO: Eye window for uplink 5 : XXXX_________________________________XXX
Data delay found: 20
07:48:52:setup_element:INFO: Eye window for uplink 6 : XX________________________________XXXXXX
Data delay found: 17
07:48:52:setup_element:INFO: Eye window for uplink 7 : ______________________________XXXXXXX___
Data delay found: 13
07:48:52:setup_element:INFO: Eye window for uplink 8 : _____________________XXXXXXX____________
Data delay found: 4
07:48:52:setup_element:INFO: Eye window for uplink 9 : __________________________XXXXXXX_______
Data delay found: 9
07:48:52:setup_element:INFO: Eye window for uplink 10: ______________________XXXXXXX___________
Data delay found: 5
07:48:52:setup_element:INFO: Eye window for uplink 11: __________________________XXXXXXX_______
Data delay found: 9
07:48:52:setup_element:INFO: Eye window for uplink 12: _______________________XXXX_____________
Data delay found: 4
07:48:52:setup_element:INFO: Eye window for uplink 13: __________________________XXXXX_________
Data delay found: 8
07:48:52:setup_element:INFO: Eye window for uplink 14: _________________________XXXXXX_________
Data delay found: 7
07:48:52:setup_element:INFO: Eye window for uplink 15: __________________________XXXXXXXX______
Data delay found: 9
07:48:52:setup_element:INFO: Setting the data phase to 29 for uplink 0
07:48:52:setup_element:INFO: Setting the data phase to 24 for uplink 1
07:48:52:setup_element:INFO: Setting the data phase to 23 for uplink 2
07:48:52:setup_element:INFO: Setting the data phase to 19 for uplink 3
07:48:52:setup_element:INFO: Setting the data phase to 24 for uplink 4
07:48:52:setup_element:INFO: Setting the data phase to 20 for uplink 5
07:48:52:setup_element:INFO: Setting the data phase to 17 for uplink 6
07:48:52:setup_element:INFO: Setting the data phase to 13 for uplink 7
07:48:52:setup_element:INFO: Setting the data phase to 4 for uplink 8
07:48:52:setup_element:INFO: Setting the data phase to 9 for uplink 9
07:48:52:setup_element:INFO: Setting the data phase to 5 for uplink 10
07:48:52:setup_element:INFO: Setting the data phase to 9 for uplink 11
07:48:52:setup_element:INFO: Setting the data phase to 4 for uplink 12
07:48:52:setup_element:INFO: Setting the data phase to 8 for uplink 13
07:48:52:setup_element:INFO: Setting the data phase to 7 for uplink 14
07:48:52:setup_element:INFO: Setting the data phase to 9 for uplink 15
07:48:52:setup_element:INFO: Beginning SMX ASICs map scan
07:48:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:48:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:48:53:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
07:48:53:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
07:48:53:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
07:48:53:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
07:48:53:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
07:48:53:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
07:48:53:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
07:48:53:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
07:48:53:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
07:48:53:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
07:48:53:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
07:48:53:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
07:48:53:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
07:48:53:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
07:48:53:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
07:48:54:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
07:48:54:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
07:48:54:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
07:48:54:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
07:48:55:setup_element:INFO: Performing Elink synchronization
07:48:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:48:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:48:55:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
07:48:55:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
07:48:55:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
07:48:55:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
07:48:56:febtest:INFO: Init all SMX (CSA): 30
07:49:09:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:49:09:febtest:INFO: 01-00 | XA-000-08-003-000-005-075-10 | 40.9 | 1135.9
07:49:09:febtest:INFO: 08-01 | XA-000-08-003-000-005-052-06 | 40.9 | 1141.9
07:49:10:febtest:INFO: 03-02 | XA-000-08-003-000-005-076-10 | 37.7 | 1147.8
07:49:10:febtest:INFO: 10-03 | XA-000-08-003-000-005-053-06 | 47.3 | 1118.1
07:49:10:febtest:INFO: 05-04 | XA-000-08-003-000-005-050-06 | 25.1 | 1195.1
07:49:10:febtest:INFO: 12-05 | XA-000-08-003-000-005-054-06 | 18.7 | 1212.7
07:49:10:febtest:INFO: 07-06 | XA-000-08-003-000-005-051-06 | 34.6 | 1159.7
07:49:11:febtest:INFO: 14-07 | XA-000-08-003-000-005-055-06 | 37.7 | 1153.7
07:49:12:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
07:49:14:ST3_smx:INFO: chip: 1-0 40.898880 C 1147.806000 mV
07:49:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:49:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:49:14:ST3_smx:INFO: Electrons
07:49:14:ST3_smx:INFO: # loops 0
07:49:15:ST3_smx:INFO: # loops 1
07:49:17:ST3_smx:INFO: # loops 2
07:49:19:ST3_smx:INFO: Total # of broken channels: 0
07:49:19:ST3_smx:INFO: List of broken channels: []
07:49:19:ST3_smx:INFO: Total # of broken channels: 0
07:49:19:ST3_smx:INFO: List of broken channels: []
07:49:21:ST3_smx:INFO: chip: 8-1 40.898880 C 1153.732915 mV
07:49:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:49:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:49:21:ST3_smx:INFO: Electrons
07:49:21:ST3_smx:INFO: # loops 0
07:49:22:ST3_smx:INFO: # loops 1
07:49:24:ST3_smx:INFO: # loops 2
07:49:25:ST3_smx:INFO: Total # of broken channels: 0
07:49:25:ST3_smx:INFO: List of broken channels: []
07:49:25:ST3_smx:INFO: Total # of broken channels: 0
07:49:25:ST3_smx:INFO: List of broken channels: []
07:49:27:ST3_smx:INFO: chip: 3-2 37.726682 C 1159.654860 mV
07:49:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:49:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:49:27:ST3_smx:INFO: Electrons
07:49:27:ST3_smx:INFO: # loops 0
07:49:28:ST3_smx:INFO: # loops 1
07:49:30:ST3_smx:INFO: # loops 2
07:49:31:ST3_smx:INFO: Total # of broken channels: 0
07:49:31:ST3_smx:INFO: List of broken channels: []
07:49:31:ST3_smx:INFO: Total # of broken channels: 0
07:49:31:ST3_smx:INFO: List of broken channels: []
07:49:33:ST3_smx:INFO: chip: 10-3 47.250730 C 1129.995435 mV
07:49:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:49:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:49:33:ST3_smx:INFO: Electrons
07:49:33:ST3_smx:INFO: # loops 0
07:49:35:ST3_smx:INFO: # loops 1
07:49:36:ST3_smx:INFO: # loops 2
07:49:38:ST3_smx:INFO: Total # of broken channels: 0
07:49:38:ST3_smx:INFO: List of broken channels: []
07:49:38:ST3_smx:INFO: Total # of broken channels: 0
07:49:38:ST3_smx:INFO: List of broken channels: []
07:49:39:ST3_smx:INFO: chip: 5-4 25.062742 C 1206.851500 mV
07:49:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:49:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:49:39:ST3_smx:INFO: Electrons
07:49:39:ST3_smx:INFO: # loops 0
07:49:41:ST3_smx:INFO: # loops 1
07:49:42:ST3_smx:INFO: # loops 2
07:49:44:ST3_smx:INFO: Total # of broken channels: 0
07:49:44:ST3_smx:INFO: List of broken channels: []
07:49:44:ST3_smx:INFO: Total # of broken channels: 0
07:49:44:ST3_smx:INFO: List of broken channels: []
07:49:45:ST3_smx:INFO: chip: 12-5 21.902970 C 1230.330540 mV
07:49:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:49:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:49:45:ST3_smx:INFO: Electrons
07:49:45:ST3_smx:INFO: # loops 0
07:49:47:ST3_smx:INFO: # loops 1
07:49:48:ST3_smx:INFO: # loops 2
07:49:50:ST3_smx:INFO: Total # of broken channels: 0
07:49:50:ST3_smx:INFO: List of broken channels: []
07:49:50:ST3_smx:INFO: Total # of broken channels: 0
07:49:50:ST3_smx:INFO: List of broken channels: []
07:49:51:ST3_smx:INFO: chip: 7-6 37.726682 C 1165.571835 mV
07:49:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:49:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:49:51:ST3_smx:INFO: Electrons
07:49:52:ST3_smx:INFO: # loops 0
07:49:53:ST3_smx:INFO: # loops 1
07:49:55:ST3_smx:INFO: # loops 2
07:49:56:ST3_smx:INFO: Total # of broken channels: 0
07:49:56:ST3_smx:INFO: List of broken channels: []
07:49:56:ST3_smx:INFO: Total # of broken channels: 0
07:49:56:ST3_smx:INFO: List of broken channels: []
07:49:58:ST3_smx:INFO: chip: 14-7 40.898880 C 1165.571835 mV
07:49:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:49:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:49:58:ST3_smx:INFO: Electrons
07:49:58:ST3_smx:INFO: # loops 0
07:49:59:ST3_smx:INFO: # loops 1
07:50:01:ST3_smx:INFO: # loops 2
07:50:03:ST3_smx:INFO: Total # of broken channels: 0
07:50:03:ST3_smx:INFO: List of broken channels: []
07:50:03:ST3_smx:INFO: Total # of broken channels: 0
07:50:03:ST3_smx:INFO: List of broken channels: []
07:50:03:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:50:03:febtest:INFO: 01-00 | XA-000-08-003-000-005-075-10 | 44.1 | 1165.6
07:50:04:febtest:INFO: 08-01 | XA-000-08-003-000-005-052-06 | 44.1 | 1177.4
07:50:04:febtest:INFO: 03-02 | XA-000-08-003-000-005-076-10 | 40.9 | 1183.3
07:50:04:febtest:INFO: 10-03 | XA-000-08-003-000-005-053-06 | 50.4 | 1153.7
07:50:04:febtest:INFO: 05-04 | XA-000-08-003-000-005-050-06 | 28.2 | 1230.3
07:50:04:febtest:INFO: 12-05 | XA-000-08-003-000-005-054-06 | 21.9 | 1253.7
07:50:05:febtest:INFO: 07-06 | XA-000-08-003-000-005-051-06 | 37.7 | 1189.2
07:50:05:febtest:INFO: 14-07 | XA-000-08-003-000-005-055-06 | 40.9 | 1183.3
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_07_31-07_48_45
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
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| FEB_SN : 3058| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.4900', '1.852', '2.6230', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0320', '1.850', '2.4150', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9720', '1.850', '0.5253', '0.000', '0.0000', '0.000', '0.0000']