Go Back
FEB_3061 02.08.24 09:56:33
Info
09:56:33:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:56:33:ST3_Shared:INFO: FEB-Microcable
09:56:33:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:56:33:febtest:INFO: Testing FEB with SN 3061
09:56:34:smx_tester:INFO: Scanning setup
09:56:34:elinks:INFO: Disabling clock on downlink 0
09:56:34:elinks:INFO: Disabling clock on downlink 1
09:56:34:elinks:INFO: Disabling clock on downlink 2
09:56:34:elinks:INFO: Disabling clock on downlink 3
09:56:34:elinks:INFO: Disabling clock on downlink 4
09:56:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:56:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:56:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:56:34:elinks:INFO: Disabling clock on downlink 0
09:56:34:elinks:INFO: Disabling clock on downlink 1
09:56:34:elinks:INFO: Disabling clock on downlink 2
09:56:34:elinks:INFO: Disabling clock on downlink 3
09:56:34:elinks:INFO: Disabling clock on downlink 4
09:56:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:56:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:56:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
09:56:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
09:56:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
09:56:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
09:56:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
09:56:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
09:56:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
09:56:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
09:56:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
09:56:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
09:56:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
09:56:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
09:56:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
09:56:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
09:56:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
09:56:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
09:56:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:56:35:elinks:INFO: Disabling clock on downlink 0
09:56:35:elinks:INFO: Disabling clock on downlink 1
09:56:35:elinks:INFO: Disabling clock on downlink 2
09:56:35:elinks:INFO: Disabling clock on downlink 3
09:56:35:elinks:INFO: Disabling clock on downlink 4
09:56:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:56:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:56:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:56:35:elinks:INFO: Disabling clock on downlink 0
09:56:35:elinks:INFO: Disabling clock on downlink 1
09:56:35:elinks:INFO: Disabling clock on downlink 2
09:56:35:elinks:INFO: Disabling clock on downlink 3
09:56:35:elinks:INFO: Disabling clock on downlink 4
09:56:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:56:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:56:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:56:35:elinks:INFO: Disabling clock on downlink 0
09:56:35:elinks:INFO: Disabling clock on downlink 1
09:56:35:elinks:INFO: Disabling clock on downlink 2
09:56:35:elinks:INFO: Disabling clock on downlink 3
09:56:35:elinks:INFO: Disabling clock on downlink 4
09:56:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:56:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:56:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:56:35:setup_element:INFO: Scanning clock phase
09:56:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:56:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:56:35:setup_element:INFO: Clock phase scan results for group 0, downlink 1
09:56:35:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
09:56:35:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
09:56:35:setup_element:INFO: Eye window for uplink 2 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
09:56:35:setup_element:INFO: Eye window for uplink 3 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
09:56:35:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXX_____
Clock Delay: 32
09:56:35:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXX_____
Clock Delay: 32
09:56:35:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________XXXX____
Clock Delay: 33
09:56:35:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________XXXX____
Clock Delay: 33
09:56:35:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXX_____
Clock Delay: 31
09:56:35:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXX_____
Clock Delay: 31
09:56:35:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
09:56:35:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
09:56:35:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:56:35:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:56:35:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXX____
Clock Delay: 33
09:56:35:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXX____
Clock Delay: 33
09:56:35:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1
09:56:35:setup_element:INFO: Scanning data phases
09:56:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:56:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:56:40:setup_element:INFO: Data phase scan results for group 0, downlink 1
09:56:40:setup_element:INFO: Eye window for uplink 0 : _____XXXXXX_____________________________
Data delay found: 27
09:56:40:setup_element:INFO: Eye window for uplink 1 : XXXXXX_X________________________________
Data delay found: 23
09:56:40:setup_element:INFO: Eye window for uplink 2 : __XXXXXX________________________________
Data delay found: 24
09:56:40:setup_element:INFO: Eye window for uplink 3 : XXXX_________________________________XXX
Data delay found: 20
09:56:40:setup_element:INFO: Eye window for uplink 4 : XXXXX_________________________________XX
Data delay found: 21
09:56:40:setup_element:INFO: Eye window for uplink 5 : X_________________________________XXXXXX
Data delay found: 17
09:56:40:setup_element:INFO: Eye window for uplink 6 : ____________________________XXXXXXXXXX__
Data delay found: 12
09:56:40:setup_element:INFO: Eye window for uplink 7 : ________________________XXXXXXXXXX______
Data delay found: 8
09:56:40:setup_element:INFO: Eye window for uplink 8 : _________________XXXXXXX________________
Data delay found: 0
09:56:40:setup_element:INFO: Eye window for uplink 9 : _______________________XXXXXX___________
Data delay found: 5
09:56:41:setup_element:INFO: Eye window for uplink 10: ___________________XXXXXX_______________
Data delay found: 1
09:56:41:setup_element:INFO: Eye window for uplink 11: _______________________XXXXXX___________
Data delay found: 5
09:56:41:setup_element:INFO: Eye window for uplink 12: _________________________XXXXXX_________
Data delay found: 7
09:56:41:setup_element:INFO: Eye window for uplink 13: ____________________________XXXXX_______
Data delay found: 10
09:56:41:setup_element:INFO: Eye window for uplink 14: _______________________XXXXXXX__________
Data delay found: 6
09:56:41:setup_element:INFO: Eye window for uplink 15: _________________________XXXXXXXX_______
Data delay found: 8
09:56:41:setup_element:INFO: Setting the data phase to 27 for uplink 0
09:56:41:setup_element:INFO: Setting the data phase to 23 for uplink 1
09:56:41:setup_element:INFO: Setting the data phase to 24 for uplink 2
09:56:41:setup_element:INFO: Setting the data phase to 20 for uplink 3
09:56:41:setup_element:INFO: Setting the data phase to 21 for uplink 4
09:56:41:setup_element:INFO: Setting the data phase to 17 for uplink 5
09:56:41:setup_element:INFO: Setting the data phase to 12 for uplink 6
09:56:41:setup_element:INFO: Setting the data phase to 8 for uplink 7
09:56:41:setup_element:INFO: Setting the data phase to 0 for uplink 8
09:56:41:setup_element:INFO: Setting the data phase to 5 for uplink 9
09:56:41:setup_element:INFO: Setting the data phase to 1 for uplink 10
09:56:41:setup_element:INFO: Setting the data phase to 5 for uplink 11
09:56:41:setup_element:INFO: Setting the data phase to 7 for uplink 12
09:56:41:setup_element:INFO: Setting the data phase to 10 for uplink 13
09:56:41:setup_element:INFO: Setting the data phase to 6 for uplink 14
09:56:41:setup_element:INFO: Setting the data phase to 8 for uplink 15
09:56:41:setup_element:INFO: Beginning SMX ASICs map scan
09:56:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:56:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:56:41:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:56:41:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:56:41:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:56:41:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:56:41:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:56:41:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:56:41:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:56:41:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:56:41:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:56:41:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:56:41:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:56:41:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:56:41:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:56:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:56:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:56:42:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:56:42:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:56:42:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:56:42:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:56:43:setup_element:INFO: Performing Elink synchronization
09:56:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:56:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:56:43:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:56:43:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:56:43:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
09:56:43:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
09:56:44:febtest:INFO: Init all SMX (CSA): 30
09:56:59:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:56:59:febtest:INFO: 01-00 | XA-000-08-003-000-004-157-15 | 25.1 | 1195.1
09:56:59:febtest:INFO: 08-01 | XA-000-08-003-000-004-161-06 | 37.7 | 1171.5
09:57:00:febtest:INFO: 03-02 | XA-000-08-003-000-004-158-15 | 37.7 | 1171.5
09:57:00:febtest:INFO: 10-03 | XA-000-08-003-000-004-162-06 | 37.7 | 1171.5
09:57:00:febtest:INFO: 05-04 | XA-000-08-003-000-004-159-15 | 34.6 | 1183.3
09:57:00:febtest:INFO: 12-05 | XA-000-08-003-000-006-051-08 | 25.1 | 1201.0
09:57:00:febtest:INFO: 07-06 | XA-000-08-003-000-004-160-06 | 47.3 | 1135.9
09:57:01:febtest:INFO: 14-07 | XA-000-08-003-000-005-056-06 | 37.7 | 1177.4
09:57:02:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
09:57:04:ST3_smx:INFO: chip: 1-0 28.225000 C 1206.851500 mV
09:57:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:57:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:57:04:ST3_smx:INFO: Electrons
09:57:04:ST3_smx:INFO: # loops 0
09:57:05:ST3_smx:INFO: # loops 1
09:57:07:ST3_smx:INFO: # loops 2
09:57:09:ST3_smx:INFO: Total # of broken channels: 0
09:57:09:ST3_smx:INFO: List of broken channels: []
09:57:09:ST3_smx:INFO: Total # of broken channels: 0
09:57:09:ST3_smx:INFO: List of broken channels: []
09:57:11:ST3_smx:INFO: chip: 8-1 37.726682 C 1183.292940 mV
09:57:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:57:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:57:11:ST3_smx:INFO: Electrons
09:57:11:ST3_smx:INFO: # loops 0
09:57:13:ST3_smx:INFO: # loops 1
09:57:14:ST3_smx:INFO: # loops 2
09:57:16:ST3_smx:INFO: Total # of broken channels: 0
09:57:16:ST3_smx:INFO: List of broken channels: []
09:57:16:ST3_smx:INFO: Total # of broken channels: 0
09:57:16:ST3_smx:INFO: List of broken channels: []
09:57:18:ST3_smx:INFO: chip: 3-2 37.726682 C 1183.292940 mV
09:57:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:57:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:57:18:ST3_smx:INFO: Electrons
09:57:18:ST3_smx:INFO: # loops 0
09:57:19:ST3_smx:INFO: # loops 1
09:57:21:ST3_smx:INFO: # loops 2
09:57:22:ST3_smx:INFO: Total # of broken channels: 0
09:57:22:ST3_smx:INFO: List of broken channels: []
09:57:22:ST3_smx:INFO: Total # of broken channels: 0
09:57:22:ST3_smx:INFO: List of broken channels: []
09:57:24:ST3_smx:INFO: chip: 10-3 37.726682 C 1183.292940 mV
09:57:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:57:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:57:24:ST3_smx:INFO: Electrons
09:57:24:ST3_smx:INFO: # loops 0
09:57:26:ST3_smx:INFO: # loops 1
09:57:28:ST3_smx:INFO: # loops 2
09:57:29:ST3_smx:INFO: Total # of broken channels: 0
09:57:29:ST3_smx:INFO: List of broken channels: []
09:57:29:ST3_smx:INFO: Total # of broken channels: 0
09:57:29:ST3_smx:INFO: List of broken channels: []
09:57:31:ST3_smx:INFO: chip: 5-4 34.556970 C 1195.082160 mV
09:57:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:57:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:57:31:ST3_smx:INFO: Electrons
09:57:31:ST3_smx:INFO: # loops 0
09:57:33:ST3_smx:INFO: # loops 1
09:57:34:ST3_smx:INFO: # loops 2
09:57:36:ST3_smx:INFO: Total # of broken channels: 0
09:57:36:ST3_smx:INFO: List of broken channels: []
09:57:36:ST3_smx:INFO: Total # of broken channels: 0
09:57:36:ST3_smx:INFO: List of broken channels: []
09:57:37:ST3_smx:INFO: chip: 12-5 28.225000 C 1218.600960 mV
09:57:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:57:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:57:37:ST3_smx:INFO: Electrons
09:57:37:ST3_smx:INFO: # loops 0
09:57:39:ST3_smx:INFO: # loops 1
09:57:41:ST3_smx:INFO: # loops 2
09:57:42:ST3_smx:INFO: Total # of broken channels: 0
09:57:42:ST3_smx:INFO: List of broken channels: []
09:57:42:ST3_smx:INFO: Total # of broken channels: 0
09:57:42:ST3_smx:INFO: List of broken channels: []
09:57:44:ST3_smx:INFO: chip: 7-6 50.430383 C 1147.806000 mV
09:57:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:57:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:57:44:ST3_smx:INFO: Electrons
09:57:44:ST3_smx:INFO: # loops 0
09:57:46:ST3_smx:INFO: # loops 1
09:57:47:ST3_smx:INFO: # loops 2
09:57:49:ST3_smx:INFO: Total # of broken channels: 0
09:57:49:ST3_smx:INFO: List of broken channels: []
09:57:49:ST3_smx:INFO: Total # of broken channels: 0
09:57:49:ST3_smx:INFO: List of broken channels: []
09:57:50:ST3_smx:INFO: chip: 14-7 40.898880 C 1189.190035 mV
09:57:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:57:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:57:50:ST3_smx:INFO: Electrons
09:57:50:ST3_smx:INFO: # loops 0
09:57:52:ST3_smx:INFO: # loops 1
09:57:54:ST3_smx:INFO: # loops 2
09:57:55:ST3_smx:INFO: Total # of broken channels: 0
09:57:55:ST3_smx:INFO: List of broken channels: []
09:57:55:ST3_smx:INFO: Total # of broken channels: 0
09:57:55:ST3_smx:INFO: List of broken channels: []
09:57:55:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:57:56:febtest:INFO: 01-00 | XA-000-08-003-000-004-157-15 | 28.2 | 1224.5
09:57:56:febtest:INFO: 08-01 | XA-000-08-003-000-004-161-06 | 40.9 | 1201.0
09:57:56:febtest:INFO: 03-02 | XA-000-08-003-000-004-158-15 | 40.9 | 1206.9
09:57:56:febtest:INFO: 10-03 | XA-000-08-003-000-004-162-06 | 37.7 | 1201.0
09:57:56:febtest:INFO: 05-04 | XA-000-08-003-000-004-159-15 | 37.7 | 1212.7
09:57:57:febtest:INFO: 12-05 | XA-000-08-003-000-006-051-08 | 31.4 | 1242.0
09:57:57:febtest:INFO: 07-06 | XA-000-08-003-000-004-160-06 | 50.4 | 1165.6
09:57:57:febtest:INFO: 14-07 | XA-000-08-003-000-005-056-06 | 44.1 | 1206.9
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_08_02-09_56_33
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3061| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.7040', '1.851', '2.1210', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0250', '1.850', '2.3800', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9770', '1.850', '0.5243', '0.000', '0.0000', '0.000', '0.0000']