
FEB_3063 25.10.24 09:50:29
TextEdit.txt
09:50:29:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:50:29:ST3_Shared:INFO: FEB-Microcable 09:50:29:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:50:29:febtest:INFO: Testing FEB with SN 3063 09:50:30:smx_tester:INFO: Scanning setup 09:50:30:elinks:INFO: Disabling clock on downlink 0 09:50:30:elinks:INFO: Disabling clock on downlink 1 09:50:30:elinks:INFO: Disabling clock on downlink 2 09:50:30:elinks:INFO: Disabling clock on downlink 3 09:50:30:elinks:INFO: Disabling clock on downlink 4 09:50:30:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:50:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:50:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:50:30:elinks:INFO: Disabling clock on downlink 0 09:50:30:elinks:INFO: Disabling clock on downlink 1 09:50:30:elinks:INFO: Disabling clock on downlink 2 09:50:30:elinks:INFO: Disabling clock on downlink 3 09:50:30:elinks:INFO: Disabling clock on downlink 4 09:50:30:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:50:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:50:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0 09:50:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1 09:50:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2 09:50:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3 09:50:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4 09:50:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5 09:50:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6 09:50:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7 09:50:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 09:50:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 09:50:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 09:50:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 09:50:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 09:50:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 09:50:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 09:50:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 09:50:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:50:31:elinks:INFO: Disabling clock on downlink 0 09:50:31:elinks:INFO: Disabling clock on downlink 1 09:50:31:elinks:INFO: Disabling clock on downlink 2 09:50:31:elinks:INFO: Disabling clock on downlink 3 09:50:31:elinks:INFO: Disabling clock on downlink 4 09:50:31:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:50:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:50:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:50:31:elinks:INFO: Disabling clock on downlink 0 09:50:31:elinks:INFO: Disabling clock on downlink 1 09:50:31:elinks:INFO: Disabling clock on downlink 2 09:50:31:elinks:INFO: Disabling clock on downlink 3 09:50:31:elinks:INFO: Disabling clock on downlink 4 09:50:31:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:50:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 09:50:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:50:31:elinks:INFO: Disabling clock on downlink 0 09:50:31:elinks:INFO: Disabling clock on downlink 1 09:50:31:elinks:INFO: Disabling clock on downlink 2 09:50:31:elinks:INFO: Disabling clock on downlink 3 09:50:31:elinks:INFO: Disabling clock on downlink 4 09:50:31:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:50:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 09:50:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:50:31:setup_element:INFO: Scanning clock phase 09:50:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:50:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:50:31:setup_element:INFO: Clock phase scan results for group 0, downlink 1 09:50:31:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXX__ Clock Delay: 34 09:50:31:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXX__ Clock Delay: 34 09:50:31:setup_element:INFO: Eye window for uplink 2 : ______________________________________________________________________XXXXX_____ Clock Delay: 32 09:50:31:setup_element:INFO: Eye window for uplink 3 : ______________________________________________________________________XXXXX_____ Clock Delay: 32 09:50:31:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXX_____ Clock Delay: 32 09:50:31:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXX_____ Clock Delay: 32 09:50:31:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXX___ Clock Delay: 33 09:50:31:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXX___ Clock Delay: 33 09:50:31:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________XXXXXX______ Clock Delay: 30 09:50:31:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________XXXXXX______ Clock Delay: 30 09:50:31:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 09:50:31:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 09:50:31:setup_element:INFO: Eye window for uplink 12: _______________________________________________________________________XXXXX____ Clock Delay: 33 09:50:31:setup_element:INFO: Eye window for uplink 13: _______________________________________________________________________XXXXX____ Clock Delay: 33 09:50:31:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXX____ Clock Delay: 32 09:50:31:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXX____ Clock Delay: 32 09:50:31:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1 09:50:31:setup_element:INFO: Scanning data phases 09:50:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:50:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:50:37:setup_element:INFO: Data phase scan results for group 0, downlink 1 09:50:37:setup_element:INFO: Eye window for uplink 0 : _______XXXXXXX__________________________ Data delay found: 30 09:50:37:setup_element:INFO: Eye window for uplink 1 : ___XXXXXXX______________________________ Data delay found: 26 09:50:37:setup_element:INFO: Eye window for uplink 2 : XXXXXXX_________________________________ Data delay found: 23 09:50:37:setup_element:INFO: Eye window for uplink 3 : XXX________________________________XXXXX Data delay found: 18 09:50:37:setup_element:INFO: Eye window for uplink 4 : XXXXXX_XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Data delay found: 26 09:50:37:setup_element:INFO: Eye window for uplink 5 : XX_____XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Data delay found: 4 09:50:37:setup_element:INFO: Eye window for uplink 6 : ______________________________XXXXXXXXXX Data delay found: 14 09:50:37:setup_element:INFO: Eye window for uplink 7 : __________________________XXXXXXXXXX____ Data delay found: 10 09:50:37:setup_element:INFO: Eye window for uplink 8 : _________________XXXXXXX________________ Data delay found: 0 09:50:37:setup_element:INFO: Eye window for uplink 9 : _______________________XXXXX____________ Data delay found: 5 09:50:37:setup_element:INFO: Eye window for uplink 10: __________________XXXXXXXXX_____________ Data delay found: 2 09:50:37:setup_element:INFO: Eye window for uplink 11: _______________________XXXXXXX__________ Data delay found: 6 09:50:37:setup_element:INFO: Eye window for uplink 12: _______________________XXXXXX___________ Data delay found: 5 09:50:37:setup_element:INFO: Eye window for uplink 13: __________________________XXXXXXX_______ Data delay found: 9 09:50:37:setup_element:INFO: Eye window for uplink 14: ______________________XXXXXXXXXX________ Data delay found: 6 09:50:37:setup_element:INFO: Eye window for uplink 15: ______________________XXXXXXXXXXXX______ Data delay found: 7 09:50:37:setup_element:INFO: Setting the data phase to 30 for uplink 0 09:50:37:setup_element:INFO: Setting the data phase to 26 for uplink 1 09:50:37:setup_element:INFO: Setting the data phase to 23 for uplink 2 09:50:37:setup_element:INFO: Setting the data phase to 18 for uplink 3 09:50:37:setup_element:INFO: Setting the data phase to 26 for uplink 4 09:50:37:setup_element:INFO: Setting the data phase to 4 for uplink 5 09:50:37:setup_element:INFO: Setting the data phase to 14 for uplink 6 09:50:37:setup_element:INFO: Setting the data phase to 10 for uplink 7 09:50:37:setup_element:INFO: Setting the data phase to 0 for uplink 8 09:50:37:setup_element:INFO: Setting the data phase to 5 for uplink 9 09:50:37:setup_element:INFO: Setting the data phase to 2 for uplink 10 09:50:37:setup_element:INFO: Setting the data phase to 6 for uplink 11 09:50:37:setup_element:INFO: Setting the data phase to 5 for uplink 12 09:50:37:setup_element:INFO: Setting the data phase to 9 for uplink 13 09:50:37:setup_element:INFO: Setting the data phase to 6 for uplink 14 09:50:37:setup_element:INFO: Setting the data phase to 7 for uplink 15 09:50:37:setup_element:INFO: Beginning SMX ASICs map scan 09:50:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:50:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:50:37:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 09:50:37:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 09:50:37:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 09:50:37:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1 09:50:37:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0 09:50:37:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 09:50:37:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 09:50:37:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3 09:50:37:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2 09:50:37:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 09:50:37:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 09:50:37:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5 09:50:38:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4 09:50:38:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 09:50:38:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 09:50:38:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7 09:50:38:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6 09:50:38:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 09:50:38:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 09:50:39:setup_element:INFO: Performing Elink synchronization 09:50:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:50:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:50:39:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 09:50:39:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 09:50:39:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 09:50:39:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)] 1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)] 2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)] 3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)] 4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)] 5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)] 6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)] 7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)] |_________________________________________________________________________| 09:50:40:febtest:INFO: Init all SMX (CSA): 30 09:50:59:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:50:59:febtest:INFO: 01-00 | XA-000-09-004-006-008-004-10 | 47.3 | 1124.0 09:51:00:febtest:INFO: 08-01 | XA-000-09-004-006-006-009-03 | 47.3 | 1130.0 09:51:00:febtest:INFO: 03-02 | XA-000-09-004-006-006-012-03 | 37.7 | 1159.7 09:51:00:febtest:INFO: 10-03 | XA-000-09-004-006-006-006-03 | 37.7 | 1159.7 09:51:00:febtest:INFO: 05-04 | XA-000-09-004-006-006-011-03 | 37.7 | 1153.7 09:51:01:febtest:INFO: 12-05 | XA-000-09-004-006-006-007-03 | 34.6 | 1165.6 09:51:01:febtest:INFO: 07-06 | XA-000-09-004-006-006-010-03 | 34.6 | 1177.4 09:51:01:febtest:INFO: 14-07 | XA-000-09-004-006-006-004-03 | 34.6 | 1165.6 09:51:02:febtest:INFO: Set all CSA to ZERO FEB type: A FEB_A: 1 FEB_B: 0 09:51:04:ST3_smx:INFO: chip: 1-0 47.250730 C 1135.937260 mV 09:51:04:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:51:04:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:51:04:ST3_smx:INFO: Electrons 09:51:04:ST3_smx:INFO: # loops 0 09:51:06:ST3_smx:INFO: # loops 1 09:51:08:ST3_smx:INFO: # loops 2 09:51:10:ST3_smx:INFO: Total # of broken channels: 0 09:51:10:ST3_smx:INFO: List of broken channels: [] 09:51:10:ST3_smx:INFO: Total # of broken channels: 0 09:51:10:ST3_smx:INFO: List of broken channels: [] 09:51:12:ST3_smx:INFO: chip: 8-1 47.250730 C 1141.874115 mV 09:51:12:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:51:12:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:51:12:ST3_smx:INFO: Electrons 09:51:12:ST3_smx:INFO: # loops 0 09:51:14:ST3_smx:INFO: # loops 1 09:51:16:ST3_smx:INFO: # loops 2 09:51:18:ST3_smx:INFO: Total # of broken channels: 0 09:51:18:ST3_smx:INFO: List of broken channels: [] 09:51:18:ST3_smx:INFO: Total # of broken channels: 0 09:51:18:ST3_smx:INFO: List of broken channels: [] 09:51:20:ST3_smx:INFO: chip: 3-2 37.726682 C 1171.483840 mV 09:51:20:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:51:20:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:51:20:ST3_smx:INFO: Electrons 09:51:20:ST3_smx:INFO: # loops 0 09:51:22:ST3_smx:INFO: # loops 1 09:51:24:ST3_smx:INFO: # loops 2 09:51:26:ST3_smx:INFO: Total # of broken channels: 0 09:51:26:ST3_smx:INFO: List of broken channels: [] 09:51:26:ST3_smx:INFO: Total # of broken channels: 0 09:51:26:ST3_smx:INFO: List of broken channels: [] 09:51:28:ST3_smx:INFO: chip: 10-3 37.726682 C 1171.483840 mV 09:51:28:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:51:28:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:51:28:ST3_smx:INFO: Electrons 09:51:28:ST3_smx:INFO: # loops 0 09:51:30:ST3_smx:INFO: # loops 1 09:51:32:ST3_smx:INFO: # loops 2 09:51:34:ST3_smx:INFO: Total # of broken channels: 0 09:51:34:ST3_smx:INFO: List of broken channels: [] 09:51:34:ST3_smx:INFO: Total # of broken channels: 0 09:51:34:ST3_smx:INFO: List of broken channels: [] 09:51:35:ST3_smx:INFO: chip: 5-4 40.898880 C 1165.571835 mV 09:51:35:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:51:35:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:51:35:ST3_smx:INFO: Electrons 09:51:35:ST3_smx:INFO: # loops 0 09:51:37:ST3_smx:INFO: # loops 1 09:51:39:ST3_smx:INFO: # loops 2 09:51:40:ST3_smx:INFO: Total # of broken channels: 0 09:51:40:ST3_smx:INFO: List of broken channels: [] 09:51:40:ST3_smx:INFO: Total # of broken channels: 0 09:51:40:ST3_smx:INFO: List of broken channels: [] 09:51:42:ST3_smx:INFO: chip: 12-5 37.726682 C 1177.390875 mV 09:51:42:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:51:42:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:51:42:ST3_smx:INFO: Electrons 09:51:42:ST3_smx:INFO: # loops 0 09:51:43:ST3_smx:INFO: # loops 1 09:51:45:ST3_smx:INFO: # loops 2 09:51:47:ST3_smx:INFO: Total # of broken channels: 0 09:51:47:ST3_smx:INFO: List of broken channels: [] 09:51:47:ST3_smx:INFO: Total # of broken channels: 0 09:51:47:ST3_smx:INFO: List of broken channels: [] 09:51:48:ST3_smx:INFO: chip: 7-6 34.556970 C 1183.292940 mV 09:51:48:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:51:48:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:51:48:ST3_smx:INFO: Electrons 09:51:48:ST3_smx:INFO: # loops 0 09:51:50:ST3_smx:INFO: # loops 1 09:51:52:ST3_smx:INFO: # loops 2 09:51:53:ST3_smx:INFO: Total # of broken channels: 0 09:51:53:ST3_smx:INFO: List of broken channels: [] 09:51:53:ST3_smx:INFO: Total # of broken channels: 0 09:51:53:ST3_smx:INFO: List of broken channels: [] 09:51:55:ST3_smx:INFO: chip: 14-7 34.556970 C 1177.390875 mV 09:51:55:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:51:55:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:51:55:ST3_smx:INFO: Electrons 09:51:55:ST3_smx:INFO: # loops 0 09:51:57:ST3_smx:INFO: # loops 1 09:51:58:ST3_smx:INFO: # loops 2 09:52:00:ST3_smx:INFO: Total # of broken channels: 0 09:52:00:ST3_smx:INFO: List of broken channels: [] 09:52:00:ST3_smx:INFO: Total # of broken channels: 0 09:52:00:ST3_smx:INFO: List of broken channels: [] 09:52:00:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:52:00:febtest:INFO: 01-00 | XA-000-09-004-006-008-004-10 | 47.3 | 1153.7 09:52:01:febtest:INFO: 08-01 | XA-000-09-004-006-006-009-03 | 47.3 | 1159.7 09:52:01:febtest:INFO: 03-02 | XA-000-09-004-006-006-012-03 | 40.9 | 1195.1 09:52:01:febtest:INFO: 10-03 | XA-000-09-004-006-006-006-03 | 37.7 | 1195.1 09:52:01:febtest:INFO: 05-04 | XA-000-09-004-006-006-011-03 | 40.9 | 1183.3 09:52:01:febtest:INFO: 12-05 | XA-000-09-004-006-006-007-03 | 37.7 | 1201.0 09:52:02:febtest:INFO: 07-06 | XA-000-09-004-006-006-010-03 | 37.7 | 1206.9 09:52:02:febtest:INFO: 14-07 | XA-000-09-004-006-006-004-03 | 37.7 | 1195.1 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_10_25-09_50_29 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 3063| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['2.450', '1.9470', '1.851', '2.1760', '0.000', '0.0000', '0.000', '0.0000'] VI_after__Init : ['2.450', '2.0260', '1.850', '2.3530', '0.000', '0.0000', '0.000', '0.0000'] VI_at__the_End : ['2.450', '1.9940', '1.850', '0.5292', '0.000', '0.0000', '0.000', '0.0000']