
FEB_3064 08.08.24 11:14:48
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11:14:48:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 11:14:48:ST3_Shared:INFO: FEB-Microcable 11:14:48:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 11:14:48:febtest:INFO: Testing FEB with SN 4064 11:14:50:smx_tester:INFO: Scanning setup 11:14:50:elinks:INFO: Disabling clock on downlink 0 11:14:50:elinks:INFO: Disabling clock on downlink 1 11:14:50:elinks:INFO: Disabling clock on downlink 2 11:14:50:elinks:INFO: Disabling clock on downlink 3 11:14:50:elinks:INFO: Disabling clock on downlink 4 11:14:50:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:14:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 11:14:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:14:50:elinks:INFO: Disabling clock on downlink 0 11:14:50:elinks:INFO: Disabling clock on downlink 1 11:14:50:elinks:INFO: Disabling clock on downlink 2 11:14:50:elinks:INFO: Disabling clock on downlink 3 11:14:50:elinks:INFO: Disabling clock on downlink 4 11:14:50:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:14:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:14:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:14:50:elinks:INFO: Disabling clock on downlink 0 11:14:50:elinks:INFO: Disabling clock on downlink 1 11:14:50:elinks:INFO: Disabling clock on downlink 2 11:14:50:elinks:INFO: Disabling clock on downlink 3 11:14:50:elinks:INFO: Disabling clock on downlink 4 11:14:50:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:14:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:14:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 11:14:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 11:14:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 11:14:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 11:14:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 11:14:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 11:14:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 11:14:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 11:14:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:14:50:elinks:INFO: Disabling clock on downlink 0 11:14:50:elinks:INFO: Disabling clock on downlink 1 11:14:50:elinks:INFO: Disabling clock on downlink 2 11:14:50:elinks:INFO: Disabling clock on downlink 3 11:14:50:elinks:INFO: Disabling clock on downlink 4 11:14:50:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:14:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 11:14:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:14:50:elinks:INFO: Disabling clock on downlink 0 11:14:50:elinks:INFO: Disabling clock on downlink 1 11:14:50:elinks:INFO: Disabling clock on downlink 2 11:14:50:elinks:INFO: Disabling clock on downlink 3 11:14:50:elinks:INFO: Disabling clock on downlink 4 11:14:50:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:14:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 11:14:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:14:50:setup_element:INFO: Scanning clock phase 11:14:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:14:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 11:14:51:setup_element:INFO: Clock phase scan results for group 0, downlink 2 11:14:51:setup_element:INFO: Eye window for uplink 24: _________________________________________________________________XXXXXX_________ Clock Delay: 27 11:14:51:setup_element:INFO: Eye window for uplink 25: _________________________________________________________________XXXXXX_________ Clock Delay: 27 11:14:51:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________XXXXXXX_________ Clock Delay: 27 11:14:51:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________XXXXXXX_________ Clock Delay: 27 11:14:51:setup_element:INFO: Eye window for uplink 28: __________________________________________________________________XXX___________ Clock Delay: 27 11:14:51:setup_element:INFO: Eye window for uplink 29: __________________________________________________________________XXX___________ Clock Delay: 27 11:14:51:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________XXXXXX____________ Clock Delay: 24 11:14:51:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________XXXXXX____________ Clock Delay: 24 11:14:51:setup_element:INFO: Setting the clock phase to 26 for group 0, downlink 2 11:14:51:setup_element:INFO: Scanning data phases 11:14:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:14:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 11:14:56:setup_element:INFO: Data phase scan results for group 0, downlink 2 11:14:56:setup_element:INFO: Eye window for uplink 24: _____XXXXXXXX___________________________ Data delay found: 28 11:14:56:setup_element:INFO: Eye window for uplink 25: ________XXXXXXXX________________________ Data delay found: 31 11:14:56:setup_element:INFO: Eye window for uplink 26: ______XXXXXXXX__________________________ Data delay found: 29 11:14:56:setup_element:INFO: Eye window for uplink 27: __________XXXXXXXX______________________ Data delay found: 33 11:14:56:setup_element:INFO: Eye window for uplink 28: _________XXXXXXXXX______________________ Data delay found: 33 11:14:56:setup_element:INFO: Eye window for uplink 29: ___________XXXXXXXXXX___________________ Data delay found: 35 11:14:56:setup_element:INFO: Eye window for uplink 30: ____________XXXXXX______________________ Data delay found: 34 11:14:56:setup_element:INFO: Eye window for uplink 31: ____________XXXXXX______________________ Data delay found: 34 11:14:56:setup_element:INFO: Setting the data phase to 28 for uplink 24 11:14:56:setup_element:INFO: Setting the data phase to 31 for uplink 25 11:14:56:setup_element:INFO: Setting the data phase to 29 for uplink 26 11:14:56:setup_element:INFO: Setting the data phase to 33 for uplink 27 11:14:56:setup_element:INFO: Setting the data phase to 33 for uplink 28 11:14:56:setup_element:INFO: Setting the data phase to 35 for uplink 29 11:14:56:setup_element:INFO: Setting the data phase to 34 for uplink 30 11:14:56:setup_element:INFO: Setting the data phase to 34 for uplink 31 11:14:56:setup_element:INFO: Beginning SMX ASICs map scan 11:14:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:14:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 11:14:56:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 11:14:56:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 11:14:56:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31] 11:14:56:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 11:14:56:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 11:14:56:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 11:14:56:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 11:14:57:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 11:14:57:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 11:14:57:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 11:14:57:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 11:14:58:setup_element:INFO: Performing Elink synchronization 11:14:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:14:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 11:14:58:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 11:14:58:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 11:14:58:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 11:14:58:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 11:14:59:febtest:INFO: Init all SMX (CSA): 30 11:15:07:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 11:15:07:febtest:INFO: 30-01 | XA-000-08-003-000-003-253-12 | 28.2 | 1177.4 11:15:07:febtest:INFO: 28-03 | XA-000-08-003-000-003-254-12 | 34.6 | 1153.7 11:15:08:febtest:INFO: 26-05 | XA-000-08-003-000-003-227-11 | 34.6 | 1165.6 11:15:08:febtest:INFO: 24-07 | XA-000-08-003-000-004-002-02 | 37.7 | 1159.7 11:15:09:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 11:15:11:ST3_smx:INFO: chip: 30-1 28.225000 C 1189.190035 mV 11:15:11:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:15:11:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:15:11:ST3_smx:INFO: Electrons 11:15:11:ST3_smx:INFO: # loops 0 11:15:13:ST3_smx:INFO: # loops 1 11:15:14:ST3_smx:INFO: # loops 2 11:15:16:ST3_smx:INFO: Total # of broken channels: 0 11:15:16:ST3_smx:INFO: List of broken channels: [] 11:15:16:ST3_smx:INFO: Total # of broken channels: 0 11:15:16:ST3_smx:INFO: List of broken channels: [] 11:15:18:ST3_smx:INFO: chip: 28-3 34.556970 C 1165.571835 mV 11:15:18:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:15:18:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:15:18:ST3_smx:INFO: Electrons 11:15:18:ST3_smx:INFO: # loops 0 11:15:20:ST3_smx:INFO: # loops 1 11:15:22:ST3_smx:INFO: # loops 2 11:15:24:ST3_smx:INFO: Total # of broken channels: 0 11:15:24:ST3_smx:INFO: List of broken channels: [] 11:15:24:ST3_smx:INFO: Total # of broken channels: 0 11:15:24:ST3_smx:INFO: List of broken channels: [] 11:15:25:ST3_smx:INFO: chip: 26-5 34.556970 C 1171.483840 mV 11:15:25:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:15:25:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:15:25:ST3_smx:INFO: Electrons 11:15:25:ST3_smx:INFO: # loops 0 11:15:27:ST3_smx:INFO: # loops 1 11:15:29:ST3_smx:INFO: # loops 2 11:15:31:ST3_smx:INFO: Total # of broken channels: 0 11:15:31:ST3_smx:INFO: List of broken channels: [] 11:15:31:ST3_smx:INFO: Total # of broken channels: 0 11:15:31:ST3_smx:INFO: List of broken channels: [] 11:15:32:ST3_smx:INFO: chip: 24-7 37.726682 C 1165.571835 mV 11:15:32:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:15:32:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:15:32:ST3_smx:INFO: Electrons 11:15:32:ST3_smx:INFO: # loops 0 11:15:34:ST3_smx:INFO: # loops 1 11:15:36:ST3_smx:INFO: # loops 2 11:15:38:ST3_smx:INFO: Total # of broken channels: 0 11:15:38:ST3_smx:INFO: List of broken channels: [] 11:15:38:ST3_smx:INFO: Total # of broken channels: 0 11:15:38:ST3_smx:INFO: List of broken channels: [] 11:15:38:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 11:15:38:febtest:INFO: 30-01 | XA-000-08-003-000-003-253-12 | 28.2 | 1218.6 11:15:38:febtest:INFO: 28-03 | XA-000-08-003-000-003-254-12 | 37.7 | 1189.2 11:15:38:febtest:INFO: 26-05 | XA-000-08-003-000-003-227-11 | 37.7 | 1195.1 11:15:39:febtest:INFO: 24-07 | XA-000-08-003-000-004-002-02 | 37.7 | 1189.2 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_08_08-11_14_48 OPERATOR : Alois Alzheimer SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 4064| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.8394', '1.850', '1.1310'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0500', '1.850', '1.1870'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0050', '1.850', '0.2681'] 11:16:48:febtest:INFO: FEB type: 8.2 11:16:48:febtest:INFO: FEB SN: 3064