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FEB_3064 08.08.24 15:43:05
Info
15:43:05:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:43:05:ST3_Shared:INFO: FEB-Microcable
15:43:05:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:43:05:febtest:INFO: Testing FEB with SN 3064
15:43:07:smx_tester:INFO: Scanning setup
15:43:07:elinks:INFO: Disabling clock on downlink 0
15:43:07:elinks:INFO: Disabling clock on downlink 1
15:43:07:elinks:INFO: Disabling clock on downlink 2
15:43:07:elinks:INFO: Disabling clock on downlink 3
15:43:07:elinks:INFO: Disabling clock on downlink 4
15:43:07:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:43:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
15:43:07:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:43:07:elinks:INFO: Disabling clock on downlink 0
15:43:07:elinks:INFO: Disabling clock on downlink 1
15:43:07:elinks:INFO: Disabling clock on downlink 2
15:43:07:elinks:INFO: Disabling clock on downlink 3
15:43:07:elinks:INFO: Disabling clock on downlink 4
15:43:07:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:43:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:43:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
15:43:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
15:43:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
15:43:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
15:43:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
15:43:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
15:43:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
15:43:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
15:43:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
15:43:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
15:43:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
15:43:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
15:43:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
15:43:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
15:43:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
15:43:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
15:43:07:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:43:07:elinks:INFO: Disabling clock on downlink 0
15:43:07:elinks:INFO: Disabling clock on downlink 1
15:43:07:elinks:INFO: Disabling clock on downlink 2
15:43:07:elinks:INFO: Disabling clock on downlink 3
15:43:07:elinks:INFO: Disabling clock on downlink 4
15:43:07:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:43:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:43:07:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:43:07:elinks:INFO: Disabling clock on downlink 0
15:43:07:elinks:INFO: Disabling clock on downlink 1
15:43:07:elinks:INFO: Disabling clock on downlink 2
15:43:07:elinks:INFO: Disabling clock on downlink 3
15:43:07:elinks:INFO: Disabling clock on downlink 4
15:43:07:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:43:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
15:43:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:43:08:elinks:INFO: Disabling clock on downlink 0
15:43:08:elinks:INFO: Disabling clock on downlink 1
15:43:08:elinks:INFO: Disabling clock on downlink 2
15:43:08:elinks:INFO: Disabling clock on downlink 3
15:43:08:elinks:INFO: Disabling clock on downlink 4
15:43:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:43:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
15:43:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:43:08:setup_element:INFO: Scanning clock phase
15:43:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:43:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:43:08:setup_element:INFO: Clock phase scan results for group 0, downlink 1
15:43:08:setup_element:INFO: Eye window for uplink 0 : __________________________________________________________________________XXXXX_
Clock Delay: 36
15:43:08:setup_element:INFO: Eye window for uplink 1 : __________________________________________________________________________XXXXX_
Clock Delay: 36
15:43:08:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
15:43:08:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
15:43:08:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________XXXXX___
Clock Delay: 34
15:43:08:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________XXXXX___
Clock Delay: 34
15:43:08:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXX____
Clock Delay: 33
15:43:08:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXX____
Clock Delay: 33
15:43:08:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
15:43:08:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
15:43:08:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
15:43:08:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
15:43:08:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXX____
Clock Delay: 32
15:43:08:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXX____
Clock Delay: 32
15:43:08:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________________
Clock Delay: 40
15:43:08:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________________
Clock Delay: 40
15:43:08:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
15:43:08:setup_element:INFO: Scanning data phases
15:43:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:43:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:43:13:setup_element:INFO: Data phase scan results for group 0, downlink 1
15:43:13:setup_element:INFO: Eye window for uplink 0 : ____XXXXXXXXXX__________________________
Data delay found: 28
15:43:13:setup_element:INFO: Eye window for uplink 1 : XXXXXXXXXX_____________________________X
Data delay found: 24
15:43:13:setup_element:INFO: Eye window for uplink 2 : ___XXXXXXX______________________________
Data delay found: 26
15:43:13:setup_element:INFO: Eye window for uplink 3 : XXXX_X_________________________________X
Data delay found: 22
15:43:13:setup_element:INFO: Eye window for uplink 4 : XXXXX________________________________XXX
Data delay found: 20
15:43:13:setup_element:INFO: Eye window for uplink 5 : X_________________________________XXXXXX
Data delay found: 17
15:43:13:setup_element:INFO: Eye window for uplink 6 : _____________________________XXXXXXXX___
Data delay found: 12
15:43:13:setup_element:INFO: Eye window for uplink 7 : _________________________XXXXXXXX_______
Data delay found: 8
15:43:13:setup_element:INFO: Eye window for uplink 8 : ___________________XXXXXXX______________
Data delay found: 2
15:43:13:setup_element:INFO: Eye window for uplink 9 : _________________________XXXXX__________
Data delay found: 7
15:43:13:setup_element:INFO: Eye window for uplink 10: _____________________XXXXXX_____________
Data delay found: 3
15:43:13:setup_element:INFO: Eye window for uplink 11: _________________________XXXXXX_________
Data delay found: 7
15:43:13:setup_element:INFO: Eye window for uplink 12: ______________________XXXXX_____________
Data delay found: 4
15:43:13:setup_element:INFO: Eye window for uplink 13: _________________________XXXXXX_________
Data delay found: 7
15:43:13:setup_element:INFO: Eye window for uplink 14: ____________________XXXXXXXX____________
Data delay found: 3
15:43:13:setup_element:INFO: Eye window for uplink 15: ______________________XXXXXXXXX_________
Data delay found: 6
15:43:13:setup_element:INFO: Setting the data phase to 28 for uplink 0
15:43:13:setup_element:INFO: Setting the data phase to 24 for uplink 1
15:43:13:setup_element:INFO: Setting the data phase to 26 for uplink 2
15:43:13:setup_element:INFO: Setting the data phase to 22 for uplink 3
15:43:13:setup_element:INFO: Setting the data phase to 20 for uplink 4
15:43:13:setup_element:INFO: Setting the data phase to 17 for uplink 5
15:43:13:setup_element:INFO: Setting the data phase to 12 for uplink 6
15:43:13:setup_element:INFO: Setting the data phase to 8 for uplink 7
15:43:13:setup_element:INFO: Setting the data phase to 2 for uplink 8
15:43:13:setup_element:INFO: Setting the data phase to 7 for uplink 9
15:43:13:setup_element:INFO: Setting the data phase to 3 for uplink 10
15:43:13:setup_element:INFO: Setting the data phase to 7 for uplink 11
15:43:13:setup_element:INFO: Setting the data phase to 4 for uplink 12
15:43:13:setup_element:INFO: Setting the data phase to 7 for uplink 13
15:43:13:setup_element:INFO: Setting the data phase to 3 for uplink 14
15:43:13:setup_element:INFO: Setting the data phase to 6 for uplink 15
15:43:13:setup_element:INFO: Beginning SMX ASICs map scan
15:43:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:43:13:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:43:13:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
15:43:13:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
15:43:13:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
15:43:13:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
15:43:14:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
15:43:14:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
15:43:14:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
15:43:14:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
15:43:14:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
15:43:14:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
15:43:14:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
15:43:14:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
15:43:14:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
15:43:14:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
15:43:14:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
15:43:15:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
15:43:15:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
15:43:15:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
15:43:15:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
15:43:16:setup_element:INFO: Performing Elink synchronization
15:43:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:43:16:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:43:16:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
15:43:16:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
15:43:16:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
15:43:16:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
15:43:17:febtest:INFO: Init all SMX (CSA): 30
15:43:34:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:43:34:febtest:INFO: 01-00 | XA-000-08-003-000-004-024-05 | 44.1 | 1141.9
15:43:34:febtest:INFO: 08-01 | XA-000-08-003-000-004-008-02 | 47.3 | 1130.0
15:43:34:febtest:INFO: 03-02 | XA-000-08-003-000-004-009-02 | 15.6 | 1236.2
15:43:35:febtest:INFO: 10-03 | XA-000-08-003-000-004-013-02 | 25.1 | 1206.9
15:43:35:febtest:INFO: 05-04 | XA-000-08-003-000-004-014-02 | 25.1 | 1195.1
15:43:35:febtest:INFO: 12-05 | XA-000-08-003-000-004-017-05 | 40.9 | 1147.8
15:43:35:febtest:INFO: 07-06 | XA-000-08-003-000-004-018-05 | 34.6 | 1177.4
15:43:35:febtest:INFO: 14-07 | XA-000-08-003-000-004-012-02 | 28.2 | 1189.2
15:43:36:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
15:43:38:ST3_smx:INFO: chip: 1-0 44.073563 C 1153.732915 mV
15:43:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:43:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:43:38:ST3_smx:INFO: Electrons
15:43:38:ST3_smx:INFO: # loops 0
15:43:40:ST3_smx:INFO: # loops 1
15:43:42:ST3_smx:INFO: # loops 2
15:43:44:ST3_smx:INFO: Total # of broken channels: 0
15:43:44:ST3_smx:INFO: List of broken channels: []
15:43:44:ST3_smx:INFO: Total # of broken channels: 0
15:43:44:ST3_smx:INFO: List of broken channels: []
15:43:46:ST3_smx:INFO: chip: 8-1 47.250730 C 1147.806000 mV
15:43:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:43:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:43:46:ST3_smx:INFO: Electrons
15:43:46:ST3_smx:INFO: # loops 0
15:43:48:ST3_smx:INFO: # loops 1
15:43:49:ST3_smx:INFO: # loops 2
15:43:52:ST3_smx:INFO: Total # of broken channels: 0
15:43:52:ST3_smx:INFO: List of broken channels: []
15:43:52:ST3_smx:INFO: Total # of broken channels: 0
15:43:52:ST3_smx:INFO: List of broken channels: []
15:43:53:ST3_smx:INFO: chip: 3-2 15.590880 C 1247.887635 mV
15:43:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:43:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:43:53:ST3_smx:INFO: Electrons
15:43:53:ST3_smx:INFO: # loops 0
15:43:55:ST3_smx:INFO: # loops 1
15:43:57:ST3_smx:INFO: # loops 2
15:43:59:ST3_smx:INFO: Total # of broken channels: 0
15:43:59:ST3_smx:INFO: List of broken channels: []
15:43:59:ST3_smx:INFO: Total # of broken channels: 0
15:43:59:ST3_smx:INFO: List of broken channels: []
15:44:01:ST3_smx:INFO: chip: 10-3 25.062742 C 1218.600960 mV
15:44:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:44:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:44:01:ST3_smx:INFO: Electrons
15:44:01:ST3_smx:INFO: # loops 0
15:44:03:ST3_smx:INFO: # loops 1
15:44:05:ST3_smx:INFO: # loops 2
15:44:07:ST3_smx:INFO: Total # of broken channels: 0
15:44:07:ST3_smx:INFO: List of broken channels: []
15:44:07:ST3_smx:INFO: Total # of broken channels: 0
15:44:07:ST3_smx:INFO: List of broken channels: []
15:44:09:ST3_smx:INFO: chip: 5-4 25.062742 C 1212.728715 mV
15:44:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:44:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:44:09:ST3_smx:INFO: Electrons
15:44:09:ST3_smx:INFO: # loops 0
15:44:11:ST3_smx:INFO: # loops 1
15:44:13:ST3_smx:INFO: # loops 2
15:44:15:ST3_smx:INFO: Total # of broken channels: 0
15:44:15:ST3_smx:INFO: List of broken channels: []
15:44:15:ST3_smx:INFO: Total # of broken channels: 0
15:44:15:ST3_smx:INFO: List of broken channels: []
15:44:17:ST3_smx:INFO: chip: 12-5 40.898880 C 1159.654860 mV
15:44:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:44:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:44:17:ST3_smx:INFO: Electrons
15:44:17:ST3_smx:INFO: # loops 0
15:44:19:ST3_smx:INFO: # loops 1
15:44:21:ST3_smx:INFO: # loops 2
15:44:22:ST3_smx:INFO: Total # of broken channels: 0
15:44:22:ST3_smx:INFO: List of broken channels: []
15:44:22:ST3_smx:INFO: Total # of broken channels: 0
15:44:23:ST3_smx:INFO: List of broken channels: []
15:44:24:ST3_smx:INFO: chip: 7-6 34.556970 C 1183.292940 mV
15:44:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:44:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:44:24:ST3_smx:INFO: Electrons
15:44:24:ST3_smx:INFO: # loops 0
15:44:26:ST3_smx:INFO: # loops 1
15:44:28:ST3_smx:INFO: # loops 2
15:44:30:ST3_smx:INFO: Total # of broken channels: 0
15:44:30:ST3_smx:INFO: List of broken channels: []
15:44:30:ST3_smx:INFO: Total # of broken channels: 0
15:44:30:ST3_smx:INFO: List of broken channels: []
15:44:31:ST3_smx:INFO: chip: 14-7 31.389742 C 1195.082160 mV
15:44:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:44:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:44:31:ST3_smx:INFO: Electrons
15:44:31:ST3_smx:INFO: # loops 0
15:44:34:ST3_smx:INFO: # loops 1
15:44:36:ST3_smx:INFO: # loops 2
15:44:38:ST3_smx:INFO: Total # of broken channels: 0
15:44:38:ST3_smx:INFO: List of broken channels: []
15:44:38:ST3_smx:INFO: Total # of broken channels: 0
15:44:38:ST3_smx:INFO: List of broken channels: []
15:44:38:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:44:38:febtest:INFO: 01-00 | XA-000-08-003-000-004-024-05 | 44.1 | 1183.3
15:44:39:febtest:INFO: 08-01 | XA-000-08-003-000-004-008-02 | 47.3 | 1165.6
15:44:39:febtest:INFO: 03-02 | XA-000-08-003-000-004-009-02 | 18.7 | 1265.4
15:44:39:febtest:INFO: 10-03 | XA-000-08-003-000-004-013-02 | 28.2 | 1242.0
15:44:39:febtest:INFO: 05-04 | XA-000-08-003-000-004-014-02 | 28.2 | 1230.3
15:44:39:febtest:INFO: 12-05 | XA-000-08-003-000-004-017-05 | 40.9 | 1183.3
15:44:40:febtest:INFO: 07-06 | XA-000-08-003-000-004-018-05 | 37.7 | 1206.9
15:44:40:febtest:INFO: 14-07 | XA-000-08-003-000-004-012-02 | 31.4 | 1218.6
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_08_08-15_43_05
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3064| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.4900', '1.851', '1.9260', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9730', '1.850', '2.3150', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9300', '1.850', '0.5116', '0.000', '0.0000', '0.000', '0.0000']