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FEB_3066 07.08.24 13:30:39
Info
13:30:39:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:30:39:ST3_Shared:INFO: FEB-Microcable
13:30:39:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:30:39:febtest:INFO: Testing FEB with SN 3066
13:30:41:smx_tester:INFO: Scanning setup
13:30:41:elinks:INFO: Disabling clock on downlink 0
13:30:41:elinks:INFO: Disabling clock on downlink 1
13:30:41:elinks:INFO: Disabling clock on downlink 2
13:30:41:elinks:INFO: Disabling clock on downlink 3
13:30:41:elinks:INFO: Disabling clock on downlink 4
13:30:41:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:30:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:30:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:30:41:elinks:INFO: Disabling clock on downlink 0
13:30:41:elinks:INFO: Disabling clock on downlink 1
13:30:41:elinks:INFO: Disabling clock on downlink 2
13:30:41:elinks:INFO: Disabling clock on downlink 3
13:30:41:elinks:INFO: Disabling clock on downlink 4
13:30:41:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:30:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:30:41:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
13:30:41:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
13:30:41:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
13:30:41:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
13:30:41:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
13:30:41:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
13:30:41:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
13:30:41:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
13:30:41:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
13:30:41:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
13:30:41:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
13:30:41:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
13:30:41:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
13:30:41:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
13:30:41:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
13:30:41:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
13:30:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:30:41:elinks:INFO: Disabling clock on downlink 0
13:30:41:elinks:INFO: Disabling clock on downlink 1
13:30:41:elinks:INFO: Disabling clock on downlink 2
13:30:41:elinks:INFO: Disabling clock on downlink 3
13:30:41:elinks:INFO: Disabling clock on downlink 4
13:30:41:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:30:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:30:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:30:41:elinks:INFO: Disabling clock on downlink 0
13:30:41:elinks:INFO: Disabling clock on downlink 1
13:30:41:elinks:INFO: Disabling clock on downlink 2
13:30:41:elinks:INFO: Disabling clock on downlink 3
13:30:41:elinks:INFO: Disabling clock on downlink 4
13:30:41:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:30:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:30:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:30:41:elinks:INFO: Disabling clock on downlink 0
13:30:41:elinks:INFO: Disabling clock on downlink 1
13:30:41:elinks:INFO: Disabling clock on downlink 2
13:30:41:elinks:INFO: Disabling clock on downlink 3
13:30:42:elinks:INFO: Disabling clock on downlink 4
13:30:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:30:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:30:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:30:42:setup_element:INFO: Scanning clock phase
13:30:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:30:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:30:42:setup_element:INFO: Clock phase scan results for group 0, downlink 1
13:30:42:setup_element:INFO: Eye window for uplink 0 : _________________________________________________________________________XXXXX__
Clock Delay: 35
13:30:42:setup_element:INFO: Eye window for uplink 1 : _________________________________________________________________________XXXXX__
Clock Delay: 35
13:30:42:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________________
Clock Delay: 40
13:30:42:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________________
Clock Delay: 40
13:30:42:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:30:42:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:30:42:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXX_____
Clock Delay: 32
13:30:42:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXX_____
Clock Delay: 32
13:30:42:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXX_______
Clock Delay: 31
13:30:42:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXX_______
Clock Delay: 31
13:30:42:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
13:30:42:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
13:30:42:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
13:30:42:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
13:30:42:setup_element:INFO: Eye window for uplink 14: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
13:30:42:setup_element:INFO: Eye window for uplink 15: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
13:30:42:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1
13:30:42:setup_element:INFO: Scanning data phases
13:30:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:30:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:30:47:setup_element:INFO: Data phase scan results for group 0, downlink 1
13:30:47:setup_element:INFO: Eye window for uplink 0 : _____XXXXXXX____________________________
Data delay found: 28
13:30:47:setup_element:INFO: Eye window for uplink 1 : _XXXXXX_________________________________
Data delay found: 23
13:30:47:setup_element:INFO: Eye window for uplink 2 : XXXXXXXX_______________________________X
Data delay found: 23
13:30:47:setup_element:INFO: Eye window for uplink 3 : XXXXX______________________________XXXXX
Data delay found: 19
13:30:47:setup_element:INFO: Eye window for uplink 4 : XXXXX_______________________________XXXX
Data delay found: 20
13:30:47:setup_element:INFO: Eye window for uplink 5 : X_______________________________XXXXXXXX
Data delay found: 16
13:30:47:setup_element:INFO: Eye window for uplink 6 : ______________________________XXXXXXXX__
Data delay found: 13
13:30:47:setup_element:INFO: Eye window for uplink 7 : __________________________XXXXXXXX______
Data delay found: 9
13:30:47:setup_element:INFO: Eye window for uplink 8 : _________________XXXXXXX________________
Data delay found: 0
13:30:47:setup_element:INFO: Eye window for uplink 9 : ______________________XXXXXXX___________
Data delay found: 5
13:30:47:setup_element:INFO: Eye window for uplink 10: __________________XXXXXXXX__XXXXXXXXXXXX
Data delay found: 8
13:30:47:setup_element:INFO: Eye window for uplink 11: _______________________XXXXXXXXXXXXXXXXX
Data delay found: 11
13:30:47:setup_element:INFO: Eye window for uplink 12: _____________________XXXXXX_____________
Data delay found: 3
13:30:47:setup_element:INFO: Eye window for uplink 13: _________________________XXXXX__________
Data delay found: 7
13:30:47:setup_element:INFO: Eye window for uplink 14: ____________________XXXXXX______________
Data delay found: 2
13:30:47:setup_element:INFO: Eye window for uplink 15: ______________________XXXXXX____________
Data delay found: 4
13:30:47:setup_element:INFO: Setting the data phase to 28 for uplink 0
13:30:47:setup_element:INFO: Setting the data phase to 23 for uplink 1
13:30:47:setup_element:INFO: Setting the data phase to 23 for uplink 2
13:30:47:setup_element:INFO: Setting the data phase to 19 for uplink 3
13:30:47:setup_element:INFO: Setting the data phase to 20 for uplink 4
13:30:47:setup_element:INFO: Setting the data phase to 16 for uplink 5
13:30:47:setup_element:INFO: Setting the data phase to 13 for uplink 6
13:30:47:setup_element:INFO: Setting the data phase to 9 for uplink 7
13:30:47:setup_element:INFO: Setting the data phase to 0 for uplink 8
13:30:47:setup_element:INFO: Setting the data phase to 5 for uplink 9
13:30:47:setup_element:INFO: Setting the data phase to 8 for uplink 10
13:30:47:setup_element:INFO: Setting the data phase to 11 for uplink 11
13:30:47:setup_element:INFO: Setting the data phase to 3 for uplink 12
13:30:47:setup_element:INFO: Setting the data phase to 7 for uplink 13
13:30:47:setup_element:INFO: Setting the data phase to 2 for uplink 14
13:30:47:setup_element:INFO: Setting the data phase to 4 for uplink 15
13:30:47:setup_element:INFO: Beginning SMX ASICs map scan
13:30:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:30:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:30:47:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:30:47:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:30:47:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:30:47:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
13:30:47:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
13:30:48:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:30:48:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:30:48:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
13:30:48:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
13:30:48:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:30:48:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:30:48:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:30:48:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:30:48:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:30:48:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:30:48:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:30:49:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:30:49:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:30:49:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:30:50:setup_element:INFO: Performing Elink synchronization
13:30:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:30:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:30:50:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:30:50:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:30:50:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
13:30:50:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
13:30:51:febtest:INFO: Init all SMX (CSA): 30
13:31:09:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:31:09:febtest:INFO: 01-00 | XA-000-08-003-000-004-057-11 | 31.4 | 1183.3
13:31:09:febtest:INFO: 08-01 | XA-000-08-003-000-004-050-11 | 15.6 | 1236.2
13:31:09:febtest:INFO: 03-02 | XA-000-08-003-000-004-053-11 | 31.4 | 1177.4
13:31:09:febtest:INFO: 10-03 | XA-000-08-003-000-004-049-11 | 28.2 | 1201.0
13:31:10:febtest:INFO: 05-04 | XA-000-08-003-000-004-054-11 | 37.7 | 1159.7
13:31:10:febtest:INFO: 12-05 | XA-000-08-003-000-004-051-11 | 37.7 | 1171.5
13:31:10:febtest:INFO: 07-06 | XA-000-08-003-000-004-056-11 | 28.2 | 1189.2
13:31:10:febtest:INFO: 14-07 | XA-000-08-003-000-004-052-11 | 34.6 | 1159.7
13:31:11:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:31:13:ST3_smx:INFO: chip: 1-0 31.389742 C 1195.082160 mV
13:31:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:31:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:31:13:ST3_smx:INFO: Electrons
13:31:13:ST3_smx:INFO: # loops 0
13:31:15:ST3_smx:INFO: # loops 1
13:31:17:ST3_smx:INFO: # loops 2
13:31:19:ST3_smx:INFO: Total # of broken channels: 0
13:31:19:ST3_smx:INFO: List of broken channels: []
13:31:19:ST3_smx:INFO: Total # of broken channels: 0
13:31:19:ST3_smx:INFO: List of broken channels: []
13:31:21:ST3_smx:INFO: chip: 8-1 18.745682 C 1247.887635 mV
13:31:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:31:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:31:21:ST3_smx:INFO: Electrons
13:31:21:ST3_smx:INFO: # loops 0
13:31:23:ST3_smx:INFO: # loops 1
13:31:25:ST3_smx:INFO: # loops 2
13:31:28:ST3_smx:INFO: Total # of broken channels: 0
13:31:28:ST3_smx:INFO: List of broken channels: []
13:31:28:ST3_smx:INFO: Total # of broken channels: 0
13:31:28:ST3_smx:INFO: List of broken channels: []
13:31:29:ST3_smx:INFO: chip: 3-2 34.556970 C 1189.190035 mV
13:31:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:31:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:31:29:ST3_smx:INFO: Electrons
13:31:29:ST3_smx:INFO: # loops 0
13:31:32:ST3_smx:INFO: # loops 1
13:31:34:ST3_smx:INFO: # loops 2
13:31:36:ST3_smx:INFO: Total # of broken channels: 0
13:31:36:ST3_smx:INFO: List of broken channels: []
13:31:36:ST3_smx:INFO: Total # of broken channels: 0
13:31:36:ST3_smx:INFO: List of broken channels: []
13:31:38:ST3_smx:INFO: chip: 10-3 28.225000 C 1212.728715 mV
13:31:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:31:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:31:38:ST3_smx:INFO: Electrons
13:31:38:ST3_smx:INFO: # loops 0
13:31:40:ST3_smx:INFO: # loops 1
13:31:42:ST3_smx:INFO: # loops 2
13:31:44:ST3_smx:INFO: Total # of broken channels: 0
13:31:44:ST3_smx:INFO: List of broken channels: []
13:31:44:ST3_smx:INFO: Total # of broken channels: 0
13:31:44:ST3_smx:INFO: List of broken channels: []
13:31:45:ST3_smx:INFO: chip: 5-4 40.898880 C 1165.571835 mV
13:31:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:31:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:31:45:ST3_smx:INFO: Electrons
13:31:45:ST3_smx:INFO: # loops 0
13:31:47:ST3_smx:INFO: # loops 1
13:31:49:ST3_smx:INFO: # loops 2
13:31:51:ST3_smx:INFO: Total # of broken channels: 0
13:31:51:ST3_smx:INFO: List of broken channels: []
13:31:51:ST3_smx:INFO: Total # of broken channels: 0
13:31:51:ST3_smx:INFO: List of broken channels: []
13:31:52:ST3_smx:INFO: chip: 12-5 37.726682 C 1183.292940 mV
13:31:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:31:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:31:52:ST3_smx:INFO: Electrons
13:31:52:ST3_smx:INFO: # loops 0
13:31:54:ST3_smx:INFO: # loops 1
13:31:56:ST3_smx:INFO: # loops 2
13:31:58:ST3_smx:INFO: Total # of broken channels: 0
13:31:58:ST3_smx:INFO: List of broken channels: []
13:31:58:ST3_smx:INFO: Total # of broken channels: 0
13:31:58:ST3_smx:INFO: List of broken channels: []
13:32:00:ST3_smx:INFO: chip: 7-6 31.389742 C 1195.082160 mV
13:32:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:32:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:32:00:ST3_smx:INFO: Electrons
13:32:00:ST3_smx:INFO: # loops 0
13:32:02:ST3_smx:INFO: # loops 1
13:32:04:ST3_smx:INFO: # loops 2
13:32:06:ST3_smx:INFO: Total # of broken channels: 0
13:32:06:ST3_smx:INFO: List of broken channels: []
13:32:06:ST3_smx:INFO: Total # of broken channels: 0
13:32:06:ST3_smx:INFO: List of broken channels: []
13:32:07:ST3_smx:INFO: chip: 14-7 37.726682 C 1171.483840 mV
13:32:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:32:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:32:07:ST3_smx:INFO: Electrons
13:32:07:ST3_smx:INFO: # loops 0
13:32:09:ST3_smx:INFO: # loops 1
13:32:11:ST3_smx:INFO: # loops 2
13:32:13:ST3_smx:INFO: Total # of broken channels: 0
13:32:13:ST3_smx:INFO: List of broken channels: []
13:32:13:ST3_smx:INFO: Total # of broken channels: 0
13:32:13:ST3_smx:INFO: List of broken channels: []
13:32:14:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:32:14:febtest:INFO: 01-00 | XA-000-08-003-000-004-057-11 | 34.6 | 1218.6
13:32:14:febtest:INFO: 08-01 | XA-000-08-003-000-004-050-11 | 18.7 | 1271.2
13:32:14:febtest:INFO: 03-02 | XA-000-08-003-000-004-053-11 | 37.7 | 1212.7
13:32:15:febtest:INFO: 10-03 | XA-000-08-003-000-004-049-11 | 28.2 | 1236.2
13:32:15:febtest:INFO: 05-04 | XA-000-08-003-000-004-054-11 | 40.9 | 1189.2
13:32:15:febtest:INFO: 12-05 | XA-000-08-003-000-004-051-11 | 40.9 | 1201.0
13:32:15:febtest:INFO: 07-06 | XA-000-08-003-000-004-056-11 | 31.4 | 1218.6
13:32:15:febtest:INFO: 14-07 | XA-000-08-003-000-004-052-11 | 37.7 | 1189.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_08_07-13_30_39
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3066| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5480', '1.850', '1.9680', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9910', '1.850', '2.4870', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9640', '1.850', '0.5239', '0.000', '0.0000', '0.000', '0.0000']