FEB_3067 06.08.24 13:07:11
Info
13:07:11:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:07:11:ST3_Shared:INFO: FEB-Microcable
13:07:11:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:07:11:febtest:INFO: Testing FEB with SN 3067
13:07:13:smx_tester:INFO: Scanning setup
13:07:13:elinks:INFO: Disabling clock on downlink 0
13:07:13:elinks:INFO: Disabling clock on downlink 1
13:07:13:elinks:INFO: Disabling clock on downlink 2
13:07:13:elinks:INFO: Disabling clock on downlink 3
13:07:13:elinks:INFO: Disabling clock on downlink 4
13:07:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:07:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:07:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:07:13:elinks:INFO: Disabling clock on downlink 0
13:07:13:elinks:INFO: Disabling clock on downlink 1
13:07:13:elinks:INFO: Disabling clock on downlink 2
13:07:13:elinks:INFO: Disabling clock on downlink 3
13:07:13:elinks:INFO: Disabling clock on downlink 4
13:07:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:07:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:07:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
13:07:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
13:07:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
13:07:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
13:07:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
13:07:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
13:07:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
13:07:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
13:07:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
13:07:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
13:07:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
13:07:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
13:07:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
13:07:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
13:07:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
13:07:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
13:07:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:07:13:elinks:INFO: Disabling clock on downlink 0
13:07:13:elinks:INFO: Disabling clock on downlink 1
13:07:13:elinks:INFO: Disabling clock on downlink 2
13:07:13:elinks:INFO: Disabling clock on downlink 3
13:07:13:elinks:INFO: Disabling clock on downlink 4
13:07:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:07:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:07:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:07:13:elinks:INFO: Disabling clock on downlink 0
13:07:13:elinks:INFO: Disabling clock on downlink 1
13:07:13:elinks:INFO: Disabling clock on downlink 2
13:07:13:elinks:INFO: Disabling clock on downlink 3
13:07:13:elinks:INFO: Disabling clock on downlink 4
13:07:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:07:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:07:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:07:13:elinks:INFO: Disabling clock on downlink 0
13:07:13:elinks:INFO: Disabling clock on downlink 1
13:07:13:elinks:INFO: Disabling clock on downlink 2
13:07:13:elinks:INFO: Disabling clock on downlink 3
13:07:13:elinks:INFO: Disabling clock on downlink 4
13:07:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:07:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:07:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:07:13:setup_element:INFO: Scanning clock phase
13:07:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:07:13:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:07:14:setup_element:INFO: Clock phase scan results for group 0, downlink 1
13:07:14:setup_element:INFO: Eye window for uplink 0 : _________________________________________________________________________XXXXX__
Clock Delay: 35
13:07:14:setup_element:INFO: Eye window for uplink 1 : _________________________________________________________________________XXXXX__
Clock Delay: 35
13:07:14:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXX____
Clock Delay: 33
13:07:14:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXX____
Clock Delay: 33
13:07:14:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________XXXXX___
Clock Delay: 34
13:07:14:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________XXXXX___
Clock Delay: 34
13:07:14:setup_element:INFO: Eye window for uplink 6 : _________________________________________________________________________XXXX___
Clock Delay: 34
13:07:14:setup_element:INFO: Eye window for uplink 7 : _________________________________________________________________________XXXX___
Clock Delay: 34
13:07:14:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXX_____
Clock Delay: 31
13:07:14:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXX_____
Clock Delay: 31
13:07:14:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________________
Clock Delay: 40
13:07:14:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________________
Clock Delay: 40
13:07:14:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXX____
Clock Delay: 32
13:07:14:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXX____
Clock Delay: 32
13:07:14:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXX_____
Clock Delay: 32
13:07:14:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXX_____
Clock Delay: 32
13:07:14:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
13:07:14:setup_element:INFO: Scanning data phases
13:07:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:07:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:07:19:setup_element:INFO: Data phase scan results for group 0, downlink 1
13:07:19:setup_element:INFO: Eye window for uplink 0 : ______XXXXXXX___________________________
Data delay found: 29
13:07:19:setup_element:INFO: Eye window for uplink 1 : __XXXXXXX_______________________________
Data delay found: 25
13:07:19:setup_element:INFO: Eye window for uplink 2 : XXXXX_________________________________XX
Data delay found: 21
13:07:19:setup_element:INFO: Eye window for uplink 3 : X_________________________________XXXXXX
Data delay found: 17
13:07:19:setup_element:INFO: Eye window for uplink 4 : XXXXXX__________________________________
Data delay found: 22
13:07:19:setup_element:INFO: Eye window for uplink 5 : XX_________________________________XXXXX
Data delay found: 18
13:07:19:setup_element:INFO: Eye window for uplink 6 : X_____________________________XXXXXXXXX_
Data delay found: 15
13:07:19:setup_element:INFO: Eye window for uplink 7 : ___________________________XXXXXXXX_____
Data delay found: 10
13:07:19:setup_element:INFO: Eye window for uplink 8 : ________________XXXXXXXX________________
Data delay found: 39
13:07:19:setup_element:INFO: Eye window for uplink 9 : ______________________XXXXXX____________
Data delay found: 4
13:07:19:setup_element:INFO: Eye window for uplink 10: ___________________XXXXXXX______________
Data delay found: 2
13:07:19:setup_element:INFO: Eye window for uplink 11: ________________________XXXXXX__________
Data delay found: 6
13:07:19:setup_element:INFO: Eye window for uplink 12: __________________XXXXXXX_______________
Data delay found: 1
13:07:19:setup_element:INFO: Eye window for uplink 13: ______________________XXXXXXX___________
Data delay found: 5
13:07:19:setup_element:INFO: Eye window for uplink 14: ________________XXXXXXXXXXX_____________
Data delay found: 1
13:07:19:setup_element:INFO: Eye window for uplink 15: ________________XXXXXXXXXXXXXX__________
Data delay found: 2
13:07:19:setup_element:INFO: Setting the data phase to 29 for uplink 0
13:07:19:setup_element:INFO: Setting the data phase to 25 for uplink 1
13:07:19:setup_element:INFO: Setting the data phase to 21 for uplink 2
13:07:19:setup_element:INFO: Setting the data phase to 17 for uplink 3
13:07:19:setup_element:INFO: Setting the data phase to 22 for uplink 4
13:07:19:setup_element:INFO: Setting the data phase to 18 for uplink 5
13:07:19:setup_element:INFO: Setting the data phase to 15 for uplink 6
13:07:19:setup_element:INFO: Setting the data phase to 10 for uplink 7
13:07:19:setup_element:INFO: Setting the data phase to 39 for uplink 8
13:07:19:setup_element:INFO: Setting the data phase to 4 for uplink 9
13:07:19:setup_element:INFO: Setting the data phase to 2 for uplink 10
13:07:19:setup_element:INFO: Setting the data phase to 6 for uplink 11
13:07:19:setup_element:INFO: Setting the data phase to 1 for uplink 12
13:07:19:setup_element:INFO: Setting the data phase to 5 for uplink 13
13:07:19:setup_element:INFO: Setting the data phase to 1 for uplink 14
13:07:19:setup_element:INFO: Setting the data phase to 2 for uplink 15
13:07:19:setup_element:INFO: Beginning SMX ASICs map scan
13:07:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:07:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:07:19:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:07:19:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:07:19:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:07:19:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
13:07:19:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
13:07:19:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:07:19:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:07:19:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
13:07:19:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
13:07:20:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:07:20:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:07:20:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:07:20:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:07:20:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:07:20:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:07:20:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:07:20:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:07:20:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:07:20:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:07:22:setup_element:INFO: Performing Elink synchronization
13:07:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:07:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:07:22:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:07:22:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:07:22:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
13:07:22:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
13:07:22:febtest:INFO: Init all SMX (CSA): 30
13:07:38:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:07:38:febtest:INFO: 01-00 | XA-000-08-003-000-003-134-00 | 44.1 | 1130.0
13:07:38:febtest:INFO: 08-01 | XA-000-08-003-000-004-029-05 | 31.4 | 1177.4
13:07:39:febtest:INFO: 03-02 | XA-000-08-003-000-003-201-05 | 40.9 | 1147.8
13:07:39:febtest:INFO: 10-03 | XA-000-08-003-000-004-034-12 | 37.7 | 1165.6
13:07:39:febtest:INFO: 05-04 | XA-000-08-003-000-004-058-11 | 31.4 | 1171.5
13:07:39:febtest:INFO: 12-05 | XA-000-08-003-000-004-038-12 | 21.9 | 1242.0
13:07:39:febtest:INFO: 07-06 | XA-000-08-003-000-003-200-05 | 31.4 | 1189.2
13:07:40:febtest:INFO: 14-07 | XA-000-08-003-000-004-028-05 | 44.1 | 1147.8
13:07:41:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:07:42:ST3_smx:INFO: chip: 1-0 44.073563 C 1141.874115 mV
13:07:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:07:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:07:42:ST3_smx:INFO: Electrons
13:07:42:ST3_smx:INFO: # loops 0
13:07:44:ST3_smx:INFO: # loops 1
13:07:46:ST3_smx:INFO: # loops 2
13:07:47:ST3_smx:INFO: Total # of broken channels: 0
13:07:47:ST3_smx:INFO: List of broken channels: []
13:07:47:ST3_smx:INFO: Total # of broken channels: 0
13:07:47:ST3_smx:INFO: List of broken channels: []
13:07:49:ST3_smx:INFO: chip: 8-1 31.389742 C 1189.190035 mV
13:07:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:07:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:07:49:ST3_smx:INFO: Electrons
13:07:49:ST3_smx:INFO: # loops 0
13:07:51:ST3_smx:INFO: # loops 1
13:07:52:ST3_smx:INFO: # loops 2
13:07:54:ST3_smx:INFO: Total # of broken channels: 0
13:07:54:ST3_smx:INFO: List of broken channels: []
13:07:54:ST3_smx:INFO: Total # of broken channels: 0
13:07:54:ST3_smx:INFO: List of broken channels: []
13:07:56:ST3_smx:INFO: chip: 3-2 40.898880 C 1159.654860 mV
13:07:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:07:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:07:56:ST3_smx:INFO: Electrons
13:07:56:ST3_smx:INFO: # loops 0
13:07:57:ST3_smx:INFO: # loops 1
13:07:59:ST3_smx:INFO: # loops 2
13:08:01:ST3_smx:INFO: Total # of broken channels: 0
13:08:01:ST3_smx:INFO: List of broken channels: []
13:08:01:ST3_smx:INFO: Total # of broken channels: 0
13:08:01:ST3_smx:INFO: List of broken channels: []
13:08:02:ST3_smx:INFO: chip: 10-3 37.726682 C 1177.390875 mV
13:08:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:08:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:08:02:ST3_smx:INFO: Electrons
13:08:02:ST3_smx:INFO: # loops 0
13:08:04:ST3_smx:INFO: # loops 1
13:08:05:ST3_smx:INFO: # loops 2
13:08:07:ST3_smx:INFO: Total # of broken channels: 0
13:08:07:ST3_smx:INFO: List of broken channels: []
13:08:07:ST3_smx:INFO: Total # of broken channels: 0
13:08:07:ST3_smx:INFO: List of broken channels: []
13:08:08:ST3_smx:INFO: chip: 5-4 34.556970 C 1183.292940 mV
13:08:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:08:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:08:09:ST3_smx:INFO: Electrons
13:08:09:ST3_smx:INFO: # loops 0
13:08:10:ST3_smx:INFO: # loops 1
13:08:12:ST3_smx:INFO: # loops 2
13:08:13:ST3_smx:INFO: Total # of broken channels: 0
13:08:13:ST3_smx:INFO: List of broken channels: []
13:08:13:ST3_smx:INFO: Total # of broken channels: 0
13:08:13:ST3_smx:INFO: List of broken channels: []
13:08:15:ST3_smx:INFO: chip: 12-5 21.902970 C 1259.567515 mV
13:08:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:08:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:08:15:ST3_smx:INFO: Electrons
13:08:15:ST3_smx:INFO: # loops 0
13:08:17:ST3_smx:INFO: # loops 1
13:08:18:ST3_smx:INFO: # loops 2
13:08:20:ST3_smx:INFO: Total # of broken channels: 0
13:08:20:ST3_smx:INFO: List of broken channels: []
13:08:20:ST3_smx:INFO: Total # of broken channels: 0
13:08:20:ST3_smx:INFO: List of broken channels: []
13:08:21:ST3_smx:INFO: chip: 7-6 34.556970 C 1200.969315 mV
13:08:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:08:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:08:21:ST3_smx:INFO: Electrons
13:08:21:ST3_smx:INFO: # loops 0
13:08:23:ST3_smx:INFO: # loops 1
13:08:24:ST3_smx:INFO: # loops 2
13:08:26:ST3_smx:INFO: Total # of broken channels: 0
13:08:26:ST3_smx:INFO: List of broken channels: []
13:08:26:ST3_smx:INFO: Total # of broken channels: 0
13:08:26:ST3_smx:INFO: List of broken channels: []
13:08:27:ST3_smx:INFO: chip: 14-7 47.250730 C 1159.654860 mV
13:08:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:08:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:08:28:ST3_smx:INFO: Electrons
13:08:28:ST3_smx:INFO: # loops 0
13:08:29:ST3_smx:INFO: # loops 1
13:08:31:ST3_smx:INFO: # loops 2
13:08:32:ST3_smx:INFO: Total # of broken channels: 0
13:08:32:ST3_smx:INFO: List of broken channels: []
13:08:32:ST3_smx:INFO: Total # of broken channels: 0
13:08:32:ST3_smx:INFO: List of broken channels: []
13:08:32:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:08:33:febtest:INFO: 01-00 | XA-000-08-003-000-003-134-00 | 44.1 | 1165.6
13:08:33:febtest:INFO: 08-01 | XA-000-08-003-000-004-029-05 | 34.6 | 1212.7
13:08:33:febtest:INFO: 03-02 | XA-000-08-003-000-003-201-05 | 40.9 | 1177.4
13:08:33:febtest:INFO: 10-03 | XA-000-08-003-000-004-034-12 | 40.9 | 1195.1
13:08:33:febtest:INFO: 05-04 | XA-000-08-003-000-004-058-11 | 34.6 | 1201.0
13:08:34:febtest:INFO: 12-05 | XA-000-08-003-000-004-038-12 | 21.9 | 1294.5
13:08:34:febtest:INFO: 07-06 | XA-000-08-003-000-003-200-05 | 34.6 | 1224.5
13:08:34:febtest:INFO: 14-07 | XA-000-08-003-000-004-028-05 | 47.3 | 1183.3
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_08_06-13_07_11
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3067| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5560', '1.850', '1.9420', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0090', '1.850', '2.4700', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9640', '1.850', '0.5204', '0.000', '0.0000', '0.000', '0.0000']