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FEB_3068 05.08.24 16:15:38
Info
16:15:38:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
16:15:38:ST3_Shared:INFO: FEB-Microcable
16:15:38:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
16:15:38:febtest:INFO: Testing FEB with SN 3068
16:15:40:smx_tester:INFO: Scanning setup
16:15:40:elinks:INFO: Disabling clock on downlink 0
16:15:40:elinks:INFO: Disabling clock on downlink 1
16:15:40:elinks:INFO: Disabling clock on downlink 2
16:15:40:elinks:INFO: Disabling clock on downlink 3
16:15:40:elinks:INFO: Disabling clock on downlink 4
16:15:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
16:15:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
16:15:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
16:15:40:elinks:INFO: Disabling clock on downlink 0
16:15:40:elinks:INFO: Disabling clock on downlink 1
16:15:40:elinks:INFO: Disabling clock on downlink 2
16:15:40:elinks:INFO: Disabling clock on downlink 3
16:15:40:elinks:INFO: Disabling clock on downlink 4
16:15:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
16:15:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
16:15:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
16:15:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
16:15:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
16:15:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
16:15:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
16:15:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
16:15:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
16:15:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
16:15:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
16:15:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
16:15:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
16:15:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
16:15:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
16:15:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
16:15:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
16:15:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
16:15:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
16:15:40:elinks:INFO: Disabling clock on downlink 0
16:15:40:elinks:INFO: Disabling clock on downlink 1
16:15:40:elinks:INFO: Disabling clock on downlink 2
16:15:40:elinks:INFO: Disabling clock on downlink 3
16:15:40:elinks:INFO: Disabling clock on downlink 4
16:15:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
16:15:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
16:15:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
16:15:40:elinks:INFO: Disabling clock on downlink 0
16:15:40:elinks:INFO: Disabling clock on downlink 1
16:15:40:elinks:INFO: Disabling clock on downlink 2
16:15:40:elinks:INFO: Disabling clock on downlink 3
16:15:40:elinks:INFO: Disabling clock on downlink 4
16:15:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
16:15:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
16:15:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
16:15:40:elinks:INFO: Disabling clock on downlink 0
16:15:40:elinks:INFO: Disabling clock on downlink 1
16:15:40:elinks:INFO: Disabling clock on downlink 2
16:15:40:elinks:INFO: Disabling clock on downlink 3
16:15:40:elinks:INFO: Disabling clock on downlink 4
16:15:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
16:15:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
16:15:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
16:15:41:setup_element:INFO: Scanning clock phase
16:15:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
16:15:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
16:15:41:setup_element:INFO: Clock phase scan results for group 0, downlink 1
16:15:41:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
16:15:41:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
16:15:41:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
16:15:41:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
16:15:41:setup_element:INFO: Eye window for uplink 4 : _____________________________________________________________________XXXXXX_____
Clock Delay: 31
16:15:41:setup_element:INFO: Eye window for uplink 5 : _____________________________________________________________________XXXXXX_____
Clock Delay: 31
16:15:41:setup_element:INFO: Eye window for uplink 6 : _____________________________________________________________________XXXXXX_____
Clock Delay: 31
16:15:41:setup_element:INFO: Eye window for uplink 7 : _____________________________________________________________________XXXXXX_____
Clock Delay: 31
16:15:41:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXX_____
Clock Delay: 31
16:15:41:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXX_____
Clock Delay: 31
16:15:41:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
16:15:41:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
16:15:41:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
16:15:41:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
16:15:41:setup_element:INFO: Eye window for uplink 14: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
16:15:41:setup_element:INFO: Eye window for uplink 15: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
16:15:41:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1
16:15:41:setup_element:INFO: Scanning data phases
16:15:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
16:15:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
16:15:46:setup_element:INFO: Data phase scan results for group 0, downlink 1
16:15:46:setup_element:INFO: Eye window for uplink 0 : _____XXXXXXX____________________________
Data delay found: 28
16:15:46:setup_element:INFO: Eye window for uplink 1 : XXXXXXX________________________________X
Data delay found: 22
16:15:46:setup_element:INFO: Eye window for uplink 2 : XXXXXXX________________________________X
Data delay found: 22
16:15:46:setup_element:INFO: Eye window for uplink 3 : XXX_________________________________XXXX
Data delay found: 19
16:15:46:setup_element:INFO: Eye window for uplink 4 : XXX________________________________XXXXX
Data delay found: 18
16:15:46:setup_element:INFO: Eye window for uplink 5 : _______________________________XXXXXXX__
Data delay found: 14
16:15:46:setup_element:INFO: Eye window for uplink 6 : _____________________________XXXXXXXX___
Data delay found: 12
16:15:46:setup_element:INFO: Eye window for uplink 7 : _________________________XXXXXX_________
Data delay found: 7
16:15:46:setup_element:INFO: Eye window for uplink 8 : _______________XXXXXXX__________________
Data delay found: 38
16:15:46:setup_element:INFO: Eye window for uplink 9 : _____________________XXXXXX_____________
Data delay found: 3
16:15:46:setup_element:INFO: Eye window for uplink 10: __________________XXXXXXX_______________
Data delay found: 1
16:15:46:setup_element:INFO: Eye window for uplink 11: ______________________XXXXXX____________
Data delay found: 4
16:15:46:setup_element:INFO: Eye window for uplink 12: ___________________XXXXXXXXXXX__________
Data delay found: 4
16:15:46:setup_element:INFO: Eye window for uplink 13: ________________________XXXXXX__________
Data delay found: 6
16:15:46:setup_element:INFO: Eye window for uplink 14: ___________________XXXXXX_______________
Data delay found: 1
16:15:46:setup_element:INFO: Eye window for uplink 15: _____________________XXXXXXX____________
Data delay found: 4
16:15:46:setup_element:INFO: Setting the data phase to 28 for uplink 0
16:15:46:setup_element:INFO: Setting the data phase to 22 for uplink 1
16:15:46:setup_element:INFO: Setting the data phase to 22 for uplink 2
16:15:46:setup_element:INFO: Setting the data phase to 19 for uplink 3
16:15:46:setup_element:INFO: Setting the data phase to 18 for uplink 4
16:15:46:setup_element:INFO: Setting the data phase to 14 for uplink 5
16:15:46:setup_element:INFO: Setting the data phase to 12 for uplink 6
16:15:46:setup_element:INFO: Setting the data phase to 7 for uplink 7
16:15:46:setup_element:INFO: Setting the data phase to 38 for uplink 8
16:15:46:setup_element:INFO: Setting the data phase to 3 for uplink 9
16:15:46:setup_element:INFO: Setting the data phase to 1 for uplink 10
16:15:46:setup_element:INFO: Setting the data phase to 4 for uplink 11
16:15:46:setup_element:INFO: Setting the data phase to 4 for uplink 12
16:15:46:setup_element:INFO: Setting the data phase to 6 for uplink 13
16:15:46:setup_element:INFO: Setting the data phase to 1 for uplink 14
16:15:46:setup_element:INFO: Setting the data phase to 4 for uplink 15
16:15:46:setup_element:INFO: Beginning SMX ASICs map scan
16:15:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
16:15:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
16:15:46:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
16:15:46:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
16:15:46:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
16:15:46:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
16:15:46:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
16:15:46:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
16:15:46:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
16:15:47:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
16:15:47:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
16:15:47:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
16:15:47:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
16:15:47:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
16:15:47:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
16:15:47:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
16:15:47:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
16:15:47:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
16:15:47:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
16:15:47:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
16:15:47:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
16:15:49:setup_element:INFO: Performing Elink synchronization
16:15:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
16:15:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
16:15:49:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
16:15:49:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
16:15:49:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
16:15:49:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0_1 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_0__upli_1
16:15:50:febtest:INFO: Init all SMX (CSA): 30
16:16:04:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
16:16:04:febtest:INFO: 01-00 | XA-000-08-003-000-003-117-06 | 18.7 | 1224.5
16:16:05:febtest:INFO: 08-01 | XA-000-08-003-000-003-123-06 | 21.9 | 1206.9
16:16:05:febtest:INFO: 03-02 | XA-000-08-003-000-003-122-06 | 34.6 | 1177.4
16:16:05:febtest:INFO: 10-03 | XA-000-08-003-000-003-127-06 | 47.3 | 1118.1
16:16:05:febtest:INFO: 05-04 | XA-000-08-003-000-003-126-06 | 31.4 | 1189.2
16:16:05:febtest:INFO: 12-05 | XA-000-08-003-000-003-119-06 | 31.4 | 1183.3
16:16:06:febtest:INFO: 07-06 | XA-000-08-003-000-003-118-06 | 34.6 | 1177.4
16:16:06:febtest:INFO: 14-07 | XA-000-08-003-000-003-124-06 | 37.7 | 1159.7
16:16:07:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
16:16:09:ST3_smx:INFO: chip: 1-0 18.745682 C 1236.187875 mV
16:16:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:16:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:16:09:ST3_smx:INFO: Electrons
16:16:09:ST3_smx:INFO: # loops 0
16:16:10:ST3_smx:INFO: # loops 1
16:16:12:ST3_smx:INFO: # loops 2
16:16:13:ST3_smx:INFO: Total # of broken channels: 0
16:16:13:ST3_smx:INFO: List of broken channels: []
16:16:13:ST3_smx:INFO: Total # of broken channels: 0
16:16:13:ST3_smx:INFO: List of broken channels: []
16:16:15:ST3_smx:INFO: chip: 8-1 21.902970 C 1224.468235 mV
16:16:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:16:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:16:15:ST3_smx:INFO: Electrons
16:16:15:ST3_smx:INFO: # loops 0
16:16:16:ST3_smx:INFO: # loops 1
16:16:18:ST3_smx:INFO: # loops 2
16:16:20:ST3_smx:INFO: Total # of broken channels: 0
16:16:20:ST3_smx:INFO: List of broken channels: []
16:16:20:ST3_smx:INFO: Total # of broken channels: 3
16:16:20:ST3_smx:INFO: List of broken channels: [1, 3, 5]
16:16:21:ST3_smx:INFO: chip: 3-2 34.556970 C 1189.190035 mV
16:16:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:16:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:16:21:ST3_smx:INFO: Electrons
16:16:21:ST3_smx:INFO: # loops 0
16:16:23:ST3_smx:INFO: # loops 1
16:16:24:ST3_smx:INFO: # loops 2
16:16:26:ST3_smx:INFO: Total # of broken channels: 0
16:16:26:ST3_smx:INFO: List of broken channels: []
16:16:26:ST3_smx:INFO: Total # of broken channels: 2
16:16:26:ST3_smx:INFO: List of broken channels: [1, 3]
16:16:28:ST3_smx:INFO: chip: 10-3 47.250730 C 1129.995435 mV
16:16:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:16:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:16:28:ST3_smx:INFO: Electrons
16:16:28:ST3_smx:INFO: # loops 0
16:16:29:ST3_smx:INFO: # loops 1
16:16:31:ST3_smx:INFO: # loops 2
16:16:32:ST3_smx:INFO: Total # of broken channels: 0
16:16:32:ST3_smx:INFO: List of broken channels: []
16:16:32:ST3_smx:INFO: Total # of broken channels: 1
16:16:32:ST3_smx:INFO: List of broken channels: [1]
16:16:34:ST3_smx:INFO: chip: 5-4 31.389742 C 1200.969315 mV
16:16:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:16:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:16:34:ST3_smx:INFO: Electrons
16:16:34:ST3_smx:INFO: # loops 0
16:16:36:ST3_smx:INFO: # loops 1
16:16:37:ST3_smx:INFO: # loops 2
16:16:39:ST3_smx:INFO: Total # of broken channels: 0
16:16:39:ST3_smx:INFO: List of broken channels: []
16:16:39:ST3_smx:INFO: Total # of broken channels: 15
16:16:39:ST3_smx:INFO: List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 94, 120]
16:16:40:ST3_smx:INFO: chip: 12-5 31.389742 C 1200.969315 mV
16:16:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:16:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:16:40:ST3_smx:INFO: Electrons
16:16:40:ST3_smx:INFO: # loops 0
16:16:42:ST3_smx:INFO: # loops 1
16:16:44:ST3_smx:INFO: # loops 2
16:16:45:ST3_smx:INFO: Total # of broken channels: 0
16:16:45:ST3_smx:INFO: List of broken channels: []
16:16:45:ST3_smx:INFO: Total # of broken channels: 2
16:16:45:ST3_smx:INFO: List of broken channels: [3, 5]
16:16:47:ST3_smx:INFO: chip: 7-6 37.726682 C 1189.190035 mV
16:16:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:16:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:16:47:ST3_smx:INFO: Electrons
16:16:47:ST3_smx:INFO: # loops 0
16:16:48:ST3_smx:INFO: # loops 1
16:16:50:ST3_smx:INFO: # loops 2
16:16:52:ST3_smx:INFO: Total # of broken channels: 0
16:16:52:ST3_smx:INFO: List of broken channels: []
16:16:52:ST3_smx:INFO: Total # of broken channels: 0
16:16:52:ST3_smx:INFO: List of broken channels: []
16:16:53:ST3_smx:INFO: chip: 14-7 40.898880 C 1171.483840 mV
16:16:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:16:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:16:53:ST3_smx:INFO: Electrons
16:16:53:ST3_smx:INFO: # loops 0
16:16:55:ST3_smx:INFO: # loops 1
16:16:57:ST3_smx:INFO: # loops 2
16:16:58:ST3_smx:INFO: Total # of broken channels: 0
16:16:58:ST3_smx:INFO: List of broken channels: []
16:16:58:ST3_smx:INFO: Total # of broken channels: 0
16:16:58:ST3_smx:INFO: List of broken channels: []
16:16:59:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
16:16:59:febtest:INFO: 01-00 | XA-000-08-003-000-003-117-06 | 21.9 | 1259.6
16:16:59:febtest:INFO: 08-01 | XA-000-08-003-000-003-123-06 | 25.1 | 1247.9
16:16:59:febtest:INFO: 03-02 | XA-000-08-003-000-003-122-06 | 37.7 | 1212.7
16:16:59:febtest:INFO: 10-03 | XA-000-08-003-000-003-127-06 | 50.4 | 1153.7
16:17:00:febtest:INFO: 05-04 | XA-000-08-003-000-003-126-06 | 34.6 | 1218.6
16:17:00:febtest:INFO: 12-05 | XA-000-08-003-000-003-119-06 | 34.6 | 1218.6
16:17:00:febtest:INFO: 07-06 | XA-000-08-003-000-003-118-06 | 37.7 | 1212.7
16:17:00:febtest:INFO: 14-07 | XA-000-08-003-000-003-124-06 | 44.1 | 1189.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_08_05-16_15_38
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3068| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.4820', '1.850', '1.8400', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9620', '1.849', '2.4220', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9570', '1.850', '0.5232', '0.000', '0.0000', '0.000', '0.0000']