FEB_3069 29.10.24 07:51:42
Info
07:51:42:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:51:42:ST3_Shared:INFO: FEB-Microcable
07:51:42:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:51:42:febtest:INFO: Testing FEB with SN 3069
07:51:44:smx_tester:INFO: Scanning setup
07:51:44:elinks:INFO: Disabling clock on downlink 0
07:51:44:elinks:INFO: Disabling clock on downlink 1
07:51:44:elinks:INFO: Disabling clock on downlink 2
07:51:44:elinks:INFO: Disabling clock on downlink 3
07:51:44:elinks:INFO: Disabling clock on downlink 4
07:51:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:51:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:51:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:51:44:elinks:INFO: Disabling clock on downlink 0
07:51:44:elinks:INFO: Disabling clock on downlink 1
07:51:44:elinks:INFO: Disabling clock on downlink 2
07:51:44:elinks:INFO: Disabling clock on downlink 3
07:51:44:elinks:INFO: Disabling clock on downlink 4
07:51:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:51:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:51:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
07:51:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
07:51:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
07:51:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
07:51:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
07:51:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
07:51:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
07:51:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
07:51:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
07:51:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
07:51:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
07:51:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
07:51:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
07:51:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
07:51:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
07:51:44:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
07:51:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:51:44:elinks:INFO: Disabling clock on downlink 0
07:51:44:elinks:INFO: Disabling clock on downlink 1
07:51:44:elinks:INFO: Disabling clock on downlink 2
07:51:44:elinks:INFO: Disabling clock on downlink 3
07:51:44:elinks:INFO: Disabling clock on downlink 4
07:51:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:51:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:51:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:51:44:elinks:INFO: Disabling clock on downlink 0
07:51:44:elinks:INFO: Disabling clock on downlink 1
07:51:44:elinks:INFO: Disabling clock on downlink 2
07:51:44:elinks:INFO: Disabling clock on downlink 3
07:51:44:elinks:INFO: Disabling clock on downlink 4
07:51:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:51:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
07:51:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:51:44:elinks:INFO: Disabling clock on downlink 0
07:51:44:elinks:INFO: Disabling clock on downlink 1
07:51:44:elinks:INFO: Disabling clock on downlink 2
07:51:44:elinks:INFO: Disabling clock on downlink 3
07:51:44:elinks:INFO: Disabling clock on downlink 4
07:51:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:51:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
07:51:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:51:44:setup_element:INFO: Scanning clock phase
07:51:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:51:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:51:45:setup_element:INFO: Clock phase scan results for group 0, downlink 1
07:51:45:setup_element:INFO: Eye window for uplink 0 : __________________________________________________________________________XXXXX_
Clock Delay: 36
07:51:45:setup_element:INFO: Eye window for uplink 1 : __________________________________________________________________________XXXXX_
Clock Delay: 36
07:51:45:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:51:45:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:51:45:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:51:45:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:51:45:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________________XXXXX_____
Clock Delay: 32
07:51:45:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________________XXXXX_____
Clock Delay: 32
07:51:45:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
07:51:45:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
07:51:45:setup_element:INFO: Eye window for uplink 10: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
07:51:45:setup_element:INFO: Eye window for uplink 11: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
07:51:45:setup_element:INFO: Eye window for uplink 12: _______________________________________________________________________XXXXX____
Clock Delay: 33
07:51:45:setup_element:INFO: Eye window for uplink 13: _______________________________________________________________________XXXXX____
Clock Delay: 33
07:51:45:setup_element:INFO: Eye window for uplink 14: _____________________________________________________________________XXXXX______
Clock Delay: 31
07:51:45:setup_element:INFO: Eye window for uplink 15: _____________________________________________________________________XXXXX______
Clock Delay: 31
07:51:45:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
07:51:45:setup_element:INFO: Scanning data phases
07:51:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:51:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:51:50:setup_element:INFO: Data phase scan results for group 0, downlink 1
07:51:50:setup_element:INFO: Eye window for uplink 0 : _________XXXXXXX________________________
Data delay found: 32
07:51:50:setup_element:INFO: Eye window for uplink 1 : ____XXXXXXX_____________________________
Data delay found: 27
07:51:50:setup_element:INFO: Eye window for uplink 2 : ____XXXXXXX_____________________________
Data delay found: 27
07:51:50:setup_element:INFO: Eye window for uplink 3 : _XXXXXX_________________________________
Data delay found: 23
07:51:50:setup_element:INFO: Eye window for uplink 4 : XXXXXXXXXXXXXXXXXXXXXXXXXXX_____________
Data delay found: 33
07:51:50:setup_element:INFO: Eye window for uplink 5 : XXXXXXXXXXXXXXXXXXXXXXXXXXX_________XXXX
Data delay found: 31
07:51:50:setup_element:INFO: Eye window for uplink 6 : ______________________________XXXXXXXX__
Data delay found: 13
07:51:50:setup_element:INFO: Eye window for uplink 7 : ____________________________XXXXXX______
Data delay found: 10
07:51:50:setup_element:INFO: Eye window for uplink 8 : _________________XXXXXXX________________
Data delay found: 0
07:51:50:setup_element:INFO: Eye window for uplink 9 : ______________________XXXXXXX___________
Data delay found: 5
07:51:50:setup_element:INFO: Eye window for uplink 10: __________________XXXXXX________________
Data delay found: 0
07:51:50:setup_element:INFO: Eye window for uplink 11: _______________________XXXXX____________
Data delay found: 5
07:51:50:setup_element:INFO: Eye window for uplink 12: ______________________XXXXXXX___________
Data delay found: 5
07:51:50:setup_element:INFO: Eye window for uplink 13: _________________________XXXXXXX________
Data delay found: 8
07:51:50:setup_element:INFO: Eye window for uplink 14: ___________________XXXXXXXX_____________
Data delay found: 2
07:51:50:setup_element:INFO: Eye window for uplink 15: ______________________XXXXXX____________
Data delay found: 4
07:51:50:setup_element:INFO: Setting the data phase to 32 for uplink 0
07:51:50:setup_element:INFO: Setting the data phase to 27 for uplink 1
07:51:50:setup_element:INFO: Setting the data phase to 27 for uplink 2
07:51:50:setup_element:INFO: Setting the data phase to 23 for uplink 3
07:51:50:setup_element:INFO: Setting the data phase to 33 for uplink 4
07:51:50:setup_element:INFO: Setting the data phase to 31 for uplink 5
07:51:50:setup_element:INFO: Setting the data phase to 13 for uplink 6
07:51:50:setup_element:INFO: Setting the data phase to 10 for uplink 7
07:51:50:setup_element:INFO: Setting the data phase to 0 for uplink 8
07:51:50:setup_element:INFO: Setting the data phase to 5 for uplink 9
07:51:50:setup_element:INFO: Setting the data phase to 0 for uplink 10
07:51:50:setup_element:INFO: Setting the data phase to 5 for uplink 11
07:51:50:setup_element:INFO: Setting the data phase to 5 for uplink 12
07:51:50:setup_element:INFO: Setting the data phase to 8 for uplink 13
07:51:50:setup_element:INFO: Setting the data phase to 2 for uplink 14
07:51:50:setup_element:INFO: Setting the data phase to 4 for uplink 15
07:51:50:setup_element:INFO: Beginning SMX ASICs map scan
07:51:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:51:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:51:50:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
07:51:50:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
07:51:50:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
07:51:50:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
07:51:50:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
07:51:50:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
07:51:50:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
07:51:50:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
07:51:50:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
07:51:50:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
07:51:51:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
07:51:51:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
07:51:51:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
07:51:51:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
07:51:51:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
07:51:51:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
07:51:51:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
07:51:51:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
07:51:51:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
07:51:53:setup_element:INFO: Performing Elink synchronization
07:51:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:51:53:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:51:53:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
07:51:53:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
07:51:53:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
07:51:53:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
07:51:53:febtest:INFO: Init all SMX (CSA): 30
07:52:07:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:52:07:febtest:INFO: 01-00 | XA-000-08-003-000-005-230-14 | 44.1 | 1135.9
07:52:07:febtest:INFO: 08-01 | XA-000-08-003-000-004-230-03 | 40.9 | 1153.7
07:52:08:febtest:INFO: 03-02 | XA-000-08-003-000-005-164-11 | 21.9 | 1212.7
07:52:08:febtest:INFO: 10-03 | XA-000-08-003-000-004-231-03 | 25.1 | 1212.7
07:52:08:febtest:INFO: 05-04 | XA-000-08-003-000-005-157-02 | 25.1 | 1195.1
07:52:08:febtest:INFO: 12-05 | XA-000-08-003-000-005-036-01 | 40.9 | 1159.7
07:52:08:febtest:INFO: 07-06 | XA-000-08-003-000-005-085-13 | 31.4 | 1171.5
07:52:09:febtest:INFO: 14-07 | XA-000-08-003-000-004-233-03 | 28.2 | 1189.2
07:52:10:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
07:52:12:ST3_smx:INFO: chip: 1-0 44.073563 C 1147.806000 mV
07:52:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:52:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:52:12:ST3_smx:INFO: Electrons
07:52:12:ST3_smx:INFO: # loops 0
07:52:13:ST3_smx:INFO: # loops 1
07:52:15:ST3_smx:INFO: # loops 2
07:52:16:ST3_smx:INFO: Total # of broken channels: 1
07:52:16:ST3_smx:INFO: List of broken channels: [104]
07:52:16:ST3_smx:INFO: Total # of broken channels: 1
07:52:16:ST3_smx:INFO: List of broken channels: [104]
07:52:18:ST3_smx:INFO: chip: 8-1 40.898880 C 1171.483840 mV
07:52:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:52:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:52:18:ST3_smx:INFO: Electrons
07:52:18:ST3_smx:INFO: # loops 0
07:52:20:ST3_smx:INFO: # loops 1
07:52:21:ST3_smx:INFO: # loops 2
07:52:23:ST3_smx:INFO: Total # of broken channels: 0
07:52:23:ST3_smx:INFO: List of broken channels: []
07:52:23:ST3_smx:INFO: Total # of broken channels: 0
07:52:23:ST3_smx:INFO: List of broken channels: []
07:52:25:ST3_smx:INFO: chip: 3-2 21.902970 C 1224.468235 mV
07:52:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:52:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:52:25:ST3_smx:INFO: Electrons
07:52:25:ST3_smx:INFO: # loops 0
07:52:26:ST3_smx:INFO: # loops 1
07:52:28:ST3_smx:INFO: # loops 2
07:52:30:ST3_smx:INFO: Total # of broken channels: 0
07:52:30:ST3_smx:INFO: List of broken channels: []
07:52:30:ST3_smx:INFO: Total # of broken channels: 0
07:52:30:ST3_smx:INFO: List of broken channels: []
07:52:31:ST3_smx:INFO: chip: 10-3 28.225000 C 1224.468235 mV
07:52:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:52:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:52:31:ST3_smx:INFO: Electrons
07:52:31:ST3_smx:INFO: # loops 0
07:52:33:ST3_smx:INFO: # loops 1
07:52:35:ST3_smx:INFO: # loops 2
07:52:37:ST3_smx:INFO: Total # of broken channels: 0
07:52:37:ST3_smx:INFO: List of broken channels: []
07:52:37:ST3_smx:INFO: Total # of broken channels: 0
07:52:37:ST3_smx:INFO: List of broken channels: []
07:52:38:ST3_smx:INFO: chip: 5-4 28.225000 C 1206.851500 mV
07:52:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:52:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:52:38:ST3_smx:INFO: Electrons
07:52:38:ST3_smx:INFO: # loops 0
07:52:40:ST3_smx:INFO: # loops 1
07:52:42:ST3_smx:INFO: # loops 2
07:52:44:ST3_smx:INFO: Total # of broken channels: 0
07:52:44:ST3_smx:INFO: List of broken channels: []
07:52:44:ST3_smx:INFO: Total # of broken channels: 0
07:52:44:ST3_smx:INFO: List of broken channels: []
07:52:45:ST3_smx:INFO: chip: 12-5 40.898880 C 1171.483840 mV
07:52:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:52:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:52:45:ST3_smx:INFO: Electrons
07:52:45:ST3_smx:INFO: # loops 0
07:52:47:ST3_smx:INFO: # loops 1
07:52:49:ST3_smx:INFO: # loops 2
07:52:51:ST3_smx:INFO: Total # of broken channels: 0
07:52:51:ST3_smx:INFO: List of broken channels: []
07:52:51:ST3_smx:INFO: Total # of broken channels: 0
07:52:51:ST3_smx:INFO: List of broken channels: []
07:52:52:ST3_smx:INFO: chip: 7-6 34.556970 C 1183.292940 mV
07:52:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:52:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:52:52:ST3_smx:INFO: Electrons
07:52:52:ST3_smx:INFO: # loops 0
07:52:54:ST3_smx:INFO: # loops 1
07:52:55:ST3_smx:INFO: # loops 2
07:52:57:ST3_smx:INFO: Total # of broken channels: 0
07:52:57:ST3_smx:INFO: List of broken channels: []
07:52:57:ST3_smx:INFO: Total # of broken channels: 0
07:52:57:ST3_smx:INFO: List of broken channels: []
07:52:58:ST3_smx:INFO: chip: 14-7 31.389742 C 1200.969315 mV
07:52:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:52:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:52:58:ST3_smx:INFO: Electrons
07:52:58:ST3_smx:INFO: # loops 0
07:53:00:ST3_smx:INFO: # loops 1
07:53:02:ST3_smx:INFO: # loops 2
07:53:03:ST3_smx:INFO: Total # of broken channels: 0
07:53:03:ST3_smx:INFO: List of broken channels: []
07:53:03:ST3_smx:INFO: Total # of broken channels: 0
07:53:03:ST3_smx:INFO: List of broken channels: []
07:53:03:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:53:04:febtest:INFO: 01-00 | XA-000-08-003-000-005-230-14 | 44.1 | 1171.5
07:53:04:febtest:INFO: 08-01 | XA-000-08-003-000-004-230-03 | 44.1 | 1189.2
07:53:04:febtest:INFO: 03-02 | XA-000-08-003-000-005-164-11 | 25.1 | 1247.9
07:53:04:febtest:INFO: 10-03 | XA-000-08-003-000-004-231-03 | 28.2 | 1247.9
07:53:04:febtest:INFO: 05-04 | XA-000-08-003-000-005-157-02 | 28.2 | 1230.3
07:53:05:febtest:INFO: 12-05 | XA-000-08-003-000-005-036-01 | 40.9 | 1189.2
07:53:05:febtest:INFO: 07-06 | XA-000-08-003-000-005-085-13 | 34.6 | 1206.9
07:53:05:febtest:INFO: 14-07 | XA-000-08-003-000-004-233-03 | 34.6 | 1218.6
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_10_29-07_51_42
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
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| FEB_SN : 3069| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5230', '1.852', '3.0120', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0080', '1.850', '2.3270', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9760', '1.850', '0.5260', '0.000', '0.0000', '0.000', '0.0000']